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2749 Commits

Author SHA1 Message Date
Lang Hames
ffd1326ff8 Improved tracking of value number kills. VN kills are now represented 
as an (index,bool) pair. The bool flag records whether the kill is a
PHI kill or not. This code will be used to enable splitting of live
intervals containing PHI-kills.

A slight change to live interval weights introduced an extra spill
into lsr-code-insertion (outside the critical sections). The test 
condition has been updated to reflect this.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75097 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-09 03:57:02 +00:00
Chris Lattner
39f56b6d16 remove eh, convert to FileCheck style 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75087 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-09 01:07:22 +00:00
Chris Lattner
f4a9774e2b we have no tests for dllimport/export. Add one. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75085 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-09 00:53:44 +00:00
Chris Lattner
9f44b3a411 * add some assertions for sanity checking. 
* remove some old code that was needed when we'd put ESP in the scale instead of 
  the base of some instructions.
* Fix a bug with the P modifier in inline asm that caused us to drop it.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75077 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-09 00:27:29 +00:00
Chris Lattner
600f175834 add a test for dale's recent change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75074 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-09 00:00:16 +00:00
Chris Lattner
ab711cc593 switch test to FileCheck-style and test the P and non-P cases. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75071 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 23:44:06 +00:00
Chris Lattner
e5646ccf66 rename a test to make it a feature test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75070 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 23:40:57 +00:00
David Goodwin
f1daf7d8ab Use common code for both ARM and Thumb-2 instruction and register info. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75067 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 23:10:31 +00:00
Bob Wilson
2ed334694f Implement NEON vst1 instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75037 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 20:32:02 +00:00
Chris Lattner
515cdbe49d add some more check for vector compares. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75024 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 18:51:25 +00:00
Chris Lattner
57e56cd72a convert a test to "FileCheck" style. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75023 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 18:48:24 +00:00
Bob Wilson
205a5ca6cf Implement NEON vld1 instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75019 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 18:11:30 +00:00
David Goodwin
a928f27d23 Add rev16 test... xfail for now 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75012 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 16:15:06 +00:00
David Goodwin
334c26473b Checkpoint Thumb2 Instr info work. Generalized base code so that it can be shared between ARM and Thumb2. Not yet activated because register information must be generalized first. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75010 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 16:09:28 +00:00
Chris Lattner
a47d9669b7 eliminate the v[if]cmp versions of these tests, now that [if]cmp+sext works. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74980 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 00:49:35 +00:00
Chris Lattner
b2773e1ada Change these tests to use [fi]cmp+sext instead of v[fi]cmp. No 
functionality change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74979 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 00:46:57 +00:00
Chris Lattner
2b7a271c71 dag combine sext(setcc) -> vsetcc before legalize. To make this safe, 
VSETCC must define all bits, which is different than it was documented
to before.  Since all targets that implement VSETCC already have this
behavior, and we don't optimize based on this, just change the 
documentation.  We now get nice code for vec_compare.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74978 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-08 00:31:33 +00:00
Chris Lattner
c2c27b3627 add support for legalizing an icmp where the result is illegal (4xi1) but 
the input is legal (4 x i32)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74964 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-07 23:03:54 +00:00
Chris Lattner
cb178c61e4 add a trivial test that vector compares work. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74963 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-07 22:51:09 +00:00
Chris Lattner
5962ed0a36 implement support for spliting and scalarizing vector setcc's. This 
finishes off enough support for vector compares to get the icmp/fcmp
version of 2008-07-23-VSetCC.ll passing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74961 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-07 22:47:46 +00:00
Chris Lattner
33d6a3451b verify that the fcmp version of this works just as well as the 
vfcmp version.  We actually get better code for this silly testcase.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74954 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-07 22:07:47 +00:00
Evan Cheng
e253c951b3 Add Thumb2 movcc instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74946 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-07 20:39:03 +00:00
Evan Cheng
35bd43da76 Add missing tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74945 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-07 20:38:08 +00:00
Evan Cheng
40289b041a Add Thumb2 pkhbt / pkhtb. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74895 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-07 05:35:52 +00:00
Evan Cheng
5b9fcd1c8e Add some more Thumb2 multiplication instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74889 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-07 01:17:28 +00:00
Evan Cheng
36a0aebac2 Add bfc to armv6t2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74868 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-06 22:23:46 +00:00
Evan Cheng
edcbada3d0 Added ARM::mls for armv6t2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74866 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-06 22:05:45 +00:00
Evan Cheng
2c4d96dfe9 Avoid adding a duplicate def. This fixes PR4478. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74857 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-06 21:34:05 +00:00
Evan Cheng
d27c9fc403 Add thumb2 sign / zero extend with rotate instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74755 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-03 01:43:10 +00:00
Evan Cheng
6d94f11196 Added indexed stores. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74740 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-03 00:06:39 +00:00
Evan Cheng
4fbb9960ad Sign extending pre/post indexed loads. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74736 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-02 23:16:11 +00:00
Evan Cheng
e88d5cee9d Thumb2 pre/post indexed loads. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74696 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-02 07:28:31 +00:00
Chris Lattner
cd714b12fc @GOTPCREL is also rip-relative. Fix fast-isel to do the right thing. 
This fixes an llvm-gcc bootstrap problem I introduced.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74691 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-02 04:22:01 +00:00
Chris Lattner
27598ec1e2 Fix yet-another bug I introduced into fastisel, this time handling 
constant pool references that weren't getting properly rip-relative.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74689 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-02 03:14:25 +00:00
Chris Lattner
4fb75e5425 Fix codegen for references to available_externally symbols. This fixes 
PR4482.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74613 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-01 16:53:44 +00:00
Evan Cheng
498c2903e2 CommuteChangesDestination() should check if to-be-commuted instruction defines any register. Also teaches the default commuteInstruction() to commute instruction without definitions (e.g. X86::test / ARM::tsp). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74602 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-01 08:29:08 +00:00
Evan Cheng
459a7c6b6a Remove special handling of implicit_def. Fix a couple more bugs in liveintervalanalysis and coalescer handling of implicit_def. 
Note, isUndef marker must be placed even on implicit_def def operand or else the scavenger will not ignore it. This is necessary because -O0 path does not use liveintervalanalysis, it treats implicit_def just like any other def.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74601 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-01 08:19:36 +00:00
Chris Lattner
35c28eca62 Fix some fast-isel problems selecting global variable addressing in 
pic mode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74582 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-01 03:27:19 +00:00
Evan Cheng
2578ba26e7 Handle IMPLICIT_DEF with isUndef operand marker, part 2. This patch moves the code to annotate machineoperands to LiveIntervalAnalysis. It also add markers for implicit_def that define physical registers. The rest, is just a lot of details. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74580 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-01 01:59:31 +00:00
David Goodwin
d1fa120aee Add PIC load and store patterns for Thumb-2. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74577 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-01 00:01:13 +00:00
David Goodwin
73b8f16b36 Add thumb-2 store word, halfword, and byte. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74555 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-30 22:11:34 +00:00
David Goodwin
c9a59b5960 Improve Thumb-2 jump table support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74549 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-30 19:50:22 +00:00
Rafael Espindola
af5f6ba32d Fix PR4485. 
Avoid unnecessary duplication of operand 0 of X86::FpSET_ST0_80. This duplication would
cause one register to remain on the stack at the function return.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74534 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-30 16:40:03 +00:00
Rafael Espindola
f55715c5c7 Fix PR4484. 
This was caused by me confounding FP0 and ST(0).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74523 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-30 12:18:16 +00:00
Evan Cheng
50564ebc9e Temporarily restore the scavenger implicit_def checking code. MachineOperand isUndef mark is not being put on implicit_def of physical registers (created for parameter passing, etc.). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74519 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-30 09:19:42 +00:00
Evan Cheng
4784f1fc73 Add a bit IsUndef to MachineOperand. This indicates the def / use register operand is defined by an implicit_def. That means it can def / use any register and passes (e.g. register scavenger) can feel free to ignore them. 
The register allocator, when it allocates a register to a virtual register defined by an implicit_def, can allocate any physical register without worrying about overlapping live ranges. It should mark all of operands of the said virtual register so later passes will do the right thing.

This is not the best solution. But it should be a lot less fragile to having the scavenger try to track what is defined by implicit_def.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74518 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-30 08:49:04 +00:00
Evan Cheng
f3c21b857b A few more load instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74500 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-30 02:15:48 +00:00
David Goodwin
4ff863c257 Enhance tests to include shifted-register operand testing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74490 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-30 01:02:20 +00:00
David Goodwin
baeb911d60 Add Thumb-2 support for TEQ amd TST. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74468 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-29 22:49:42 +00:00
David Goodwin
8ba221d5c5 Thumb-2 tests 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74464 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-29 22:25:22 +00:00
Rafael Espindola
63de5c3b7e FIX PR 4459. 
Not sure I understand how the temp register gets used,
but this fixes a bug and introduces no regressions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74446 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-29 20:29:59 +00:00
David Goodwin
c0309b48b5 Rename ARMcmpNZ to ARMcmpZ and use it to represent comparisons that set only the Z flag (i.e. eq and ne). Make ARMcmpZ commutative. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74423 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-29 15:33:01 +00:00
Evan Cheng
055b0310f8 Implement Thumb2 ldr. 
After much back and forth, I decided to deviate from ARM design and split LDR into 4 instructions (r + imm12, r + imm8, r + r << imm12, constantpool). The advantage of this is 1) it follows the latest ARM technical manual, and 2) makes it easier to reduce the width of the instruction later. The down side is this creates more inconsistency between the two sub-targets. We should split ARM LDR instruction in a similar fashion later. I've added a README entry for this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74420 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-29 07:51:04 +00:00
Chris Lattner
74d3f50a80 factor some logic out into a helper function, allow remat of loads from constant 
globals.  This implements remat-constant.ll even without aggressive-remat.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74373 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-27 04:38:55 +00:00
Chris Lattner
18c5987fa3 Reimplement rip-relative addressing in the X86-64 backend. The new 
implementation primarily differs from the former in that the asmprinter
doesn't make a zillion decisions about whether or not something will be
RIP relative or not.  Instead, those decisions are made by isel lowering
and propagated through to the asm printer.  To achieve this, we:

1. Represent RIP relative addresses by setting the base of the X86 addr
   mode to X86::RIP.
2. When ISel Lowering decides that it is safe to use RIP, it lowers to
   X86ISD::WrapperRIP.  When it is unsafe to use RIP, it lowers to
   X86ISD::Wrapper as before.
3. This removes isRIPRel from X86ISelAddressMode, representing it with
   a basereg of RIP instead.
4. The addressing mode matching logic in isel is greatly simplified.
5. The asmprinter is greatly simplified, notably the "NotRIPRel" predicate
   passed through various printoperand routines is gone now.
6. The various symbol printing routines in asmprinter now no longer infer
   when to emit (%rip), they just print the symbol.

I think this is a big improvement over the previous situation.  It does have
two small caveats though: 1. I implemented a horrible "no-rip" modifier for
the inline asm "P" constraint modifier.  This is a short term hack, there is
a much better, but more involved, solution.  2. I had to xfail an 
-aggressive-remat testcase because it isn't handling the use of RIP in the
constant-pool reading instruction.  This specific test is easy to fix without
-aggressive-remat, which I intend to do next.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74372 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-27 04:16:01 +00:00
Chris Lattner
600d006cc7 remove some unneeded eh info. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74371 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-27 04:07:31 +00:00
Chris Lattner
18eed20051 testcase for PR4466 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74367 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-27 01:33:35 +00:00
David Goodwin
dcdaebc592 When possible, use "mvn ra, rb" instead of "eor ra, rb, -1" because mvn has a narrow version and eor(i) does not. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74355 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 23:13:13 +00:00
Dan Gohman
16bdfdb178 Add some testcases for some of the recent ScalarEvolution bug fixes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74353 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 22:54:11 +00:00
David Goodwin
7f98cac93a Thumb-2 tests 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74345 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 22:37:07 +00:00
Chris Lattner
93677c99a4 remove unwind info, add test for asmprinting of jump table labels with (%rip) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74337 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 22:16:49 +00:00
Evan Cheng
2c2fb823b9 Add x86 support for 'n' inline asm modifier. This will be handled target independently as part of MC work. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74336 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 22:00:19 +00:00
David Goodwin
24062ac5be Thumb-2 has CLZ. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74322 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 20:47:43 +00:00
David Goodwin
7ce720b448 Use "adcs/sbcs" only when the carry-out is live, otherwise use "adc/sbc". 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74321 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 20:45:56 +00:00
Daniel Dunbar
d2deed0091 More spelling Count as count. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74306 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 18:35:07 +00:00
Daniel Dunbar
039c43dccc Spell Count as count. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74298 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 18:21:54 +00:00
David Goodwin
2634e98a93 Add Thumb-2 tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74295 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 18:10:30 +00:00
David Goodwin
93d95bd2c3 ADC used to implement adde should use "adcs" opcode instead of "adc". 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74293 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 18:07:25 +00:00
David Goodwin
caffbd7b01 ORN and BIC tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74289 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 16:20:06 +00:00
David Goodwin
83b3593478 Currently there is a pattern for the thumb-2 MOV 16-bit immediate instruction. That instruction cannot write the flags so it should use T2I instead of T2sI. 
Also, added a pattern for the thumb-2 MOV of shifted immediate since that can encode immediates not encodable by the 16-bit immediate.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74288 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 16:10:07 +00:00
Evan Cheng
6677f51127 Fix tests: Count -> count. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74282 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 07:05:57 +00:00
Evan Cheng
c0ad80fd9e Fix a CodeGenDAGPatterns bug. Check if top level predicates match when it's looking for duplicates. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74276 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 05:59:16 +00:00
Daniel Dunbar
12cccf10a7 Fix spelling of 'count' 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74249 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-26 01:33:02 +00:00
Evan Cheng
6267422318 Select ADC, SBC, and RSC instead of the ADCS, SBCS, and RSCS when the carry bit def is not used. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74228 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-25 23:34:10 +00:00
David Goodwin
0919a916bf Use MVN for ~t2_so_imm immediates. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74223 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-25 23:11:21 +00:00
Bill Wendling
06b76b834f Don't grep the -debug output. This isn't the way to test changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74211 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-25 21:59:32 +00:00
Chris Lattner
5f04d1e522 down with unwind info :) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74206 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-25 21:48:17 +00:00
Evan Cheng
1e249e3705 ISD::ADDE / ISD::SUBE updates the carry bit so they should isle to ADCS and SBCS / RSCS. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74200 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-25 20:59:23 +00:00
Evan Cheng
a09b9ca10f Add Thumb2 pc relative add. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74141 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-24 23:47:58 +00:00
Evan Cheng
2e1af3529b We should run these tests as well. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74121 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-24 21:36:26 +00:00
Chris Lattner
7556bfd6af unwind info not needed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74112 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-24 19:48:04 +00:00
Evan Cheng
9f76ed5127 Move thumb and thumb2 tests into separate directories. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74068 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-24 06:36:07 +00:00
Evan Cheng
ef5d070bbe Fix support for inline asm input / output operand tying when operand spans across multiple registers (e.g. two i64 operands in 32-bit mode). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74053 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-24 02:05:51 +00:00
Dan Gohman
40a5a1b39e Extend ScalarEvolution's multiple-exit support to compute exact 
trip counts in more cases.

Generalize ScalarEvolution's isLoopGuardedByCond code to recognize
And and Or conditions, splitting the code out into an
isNecessaryCond helper function so that it can evaluate Ands and Ors
recursively, and make SCEVExpander be much more aggressive about
hoisting instructions out of loops.

test/CodeGen/X86/pr3495.ll has an additional instruction now, but
it appears to be due to an arbitrary register allocation difference.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74048 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-24 01:18:18 +00:00
Evan Cheng
a67efd1226 Proper patterns for thumb2 shift and rotate instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73987 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-23 19:39:13 +00:00
Bob Wilson
5bafff36c7 Add support for ARM's Advanced SIMD (NEON) instruction set. 
This is still a work in progress but most of the NEON instruction set
is supported.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73919 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-22 23:27:02 +00:00
Evan Cheng
524961e57f It's coalescer, not coaleser. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73902 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-22 21:09:17 +00:00
Bob Wilson
54fc124d72 For Darwin on ARMv6 and newer, make register r9 available for use as a 
caller-saved register.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73901 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-22 21:01:46 +00:00
Evan Cheng
81909b7423 Fix another register coalescer crash: forgot to check if the instruction being updated has already been coalesced. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73898 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-22 20:49:32 +00:00
Evan Cheng
8dcbbdd00e hasFP should return true if frame address is taken. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73893 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-22 18:38:48 +00:00
Rafael Espindola
1c3329f707 Fix PR4185. 
Handle FpSET_ST0_80 being used when ST0 is still alive.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73850 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-21 12:02:51 +00:00
Chris Lattner
5c0b16d0c4 change TLS_ADDR lowering to lower to a real mem operand, instead of matching as 
a global with that gets printed with the :mem modifier.  All operands to lea's 
should be handled with the lea32mem operand kind, and this allows the TLS stuff
to do this.  There are several better ways to do this, but I went for the minimal
change since I can't really test this (beyond make check).

This also makes the use of EBX explicit in the operand list in the 32-bit, 
instead of implicit in the instruction.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73834 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-20 20:38:48 +00:00
Chris Lattner
6bfb669f82 no need for unwind info 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73832 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-20 19:48:26 +00:00
Chris Lattner
811ac0b088 no need for unwind info here. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73831 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-20 19:43:09 +00:00
Evan Cheng
694f6c81e8 Fix PR4419: handle defs of partial uses. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73816 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-20 04:34:51 +00:00
Dan Gohman
2781f30eac Re-apply r73718, now that the fix in r73787 is in, and add a 
hand-crafted testcase which demonstrates the bug that was exposed
in 254.gap.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73793 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-19 23:23:27 +00:00
Evan Cheng
ae69a2a12b Enable arm pre-allocation load / store multiple optimization pass. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73791 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-19 23:17:27 +00:00
Evan Cheng
73a76736fb Revert 73718. It's breaking 254.gap. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73783 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-19 21:15:06 +00:00
Eli Friedman
7e2242be71 Fix for PR2484: add an SSE1 pattern for a shuffle we normally prefer to 
handle with an SSE2 instruction.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73760 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-19 07:00:55 +00:00
Eli Friedman
6b7bb42c36 Mark a few Thumb instructions commutable; just happened to spot this 
while experimenting.  I'm reasonably sure this is correct, but please 
tell me if these instructions have some strange property which makes this
change unsafe.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@73746 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-06-19 01:43:08 +00:00