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a648df2871
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1440 Commits

Author SHA1 Message Date
Chris Lattner
a648df2871 add note about div by power of 2 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26253 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-17 04:20:13 +00:00
Evan Cheng
7634ac4a9b Remind ourselves to revisit the "pxor vs. xorps/xorpd to clear XMM registers" 
issue. Need to do more experiments.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26247 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-17 00:04:28 +00:00
Nate Begeman
4c5dcf54ff Kill the x86 pattern isel. boom. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26246 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-17 00:03:04 +00:00
Evan Cheng
dc8acb6420 Remove the entry about using movapd for SSE reg-reg moves. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26245 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-17 00:00:58 +00:00
Evan Cheng
39d1761c70 pxor (for FLD0SS) encoding was missing the OpSize prefix. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26244 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-16 23:59:30 +00:00
Evan Cheng
fe5cb19405 1. Use pxor instead of xoraps / xorapd to clear FR32 / FR64 registers. This 
proves to be worth 20% on Ptrdist/ks. Might be related to dependency
   breaking support.
2. Added FsMOVAPSrr and FsMOVAPDrr as aliases to MOVAPSrr and MOVAPDrr. These
   are used for FR32 / FR64 reg-to-reg copies.
3. Tell reg-allocator to generate MOVSSrm / MOVSDrm and MOVSSmr / MOVSDmr to
   spill / restore FsMOVAPSrr and FsMOVAPDrr.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26241 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-16 22:45:17 +00:00
Evan Cheng
19ade3bf9c Use movaps / movapd to spill / restore V4F4 / V2F8 registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26240 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-16 21:20:26 +00:00
Nate Begeman
368e18d56a Rework the SelectionDAG-based implementations of SimplifyDemandedBits 
and ComputeMaskedBits to match the new improved versions in instcombine.
Tested against all of multisource/benchmarks on ppc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26238 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-16 21:11:51 +00:00
Evan Cheng
77dea9b3c3 MOVAPSrr and MOVAPDrr instruction format should be MRMSrcReg. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26234 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-16 19:34:41 +00:00
Evan Cheng
d51425a82d Use movaps / movapd (instead of movss / movsd) to do FR32 / FR64 reg to reg 
transfer.

According to the Intel P4 Optimization Manual:

Moves that write a portion of a register can introduce unwanted
dependences. The movsd reg, reg instruction writes only the bottom
64 bits of a register, not to all 128 bits. This introduces a dependence on
the preceding instruction that produces the upper 64 bits (even if those
bits are not longer wanted). The dependence inhibits register renaming,
and thereby reduces parallelism.

Not to mention movaps is shorter than movss.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26226 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-16 01:50:02 +00:00
Evan Cheng
18a8452f3d A bit more memset / memcpy optimization. 
Turns them into calls to memset / memcpy if 1) buffer(s) are not DWORD aligned,
2) size is not known to be greater or equal to some minimum value (currently 128).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26224 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-16 00:21:07 +00:00
Evan Cheng
2354f5a46b Remove an entry. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26197 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-15 01:56:48 +00:00
Evan Cheng
17ef92eda7 Use .zerofill on x86/darwin. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26196 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-15 01:56:23 +00:00
Evan Cheng
f3f0a9c587 cvtsd2ss / cvtss2sd encoding bug. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26193 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-15 00:31:03 +00:00
Evan Cheng
7335f9beea movaps, movapd encoding bug. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26192 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-15 00:11:37 +00:00
Chris Lattner
ae302ab9cb new note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26186 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-14 22:19:54 +00:00
Evan Cheng
ee50a1ae27 Don't special case XS, XD prefixes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26183 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-14 21:52:51 +00:00
Evan Cheng
576c141921 Bug fix: XS, XD prefixes were being emitted twice. 
XMM registers were not being handled.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26182 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-14 21:45:24 +00:00
Evan Cheng
ddf7532442 Duh 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26180 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-14 20:37:37 +00:00
Evan Cheng
968c178172 Remove -disable-x86-sse 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26179 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-14 20:30:14 +00:00
Evan Cheng
a03a5dc7ce Rename maxStoresPerMemSet to maxStoresPerMemset, etc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26174 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-14 08:38:30 +00:00
Evan Cheng
952b7d6a1e Add a entry. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26173 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-14 08:25:32 +00:00
Evan Cheng
87ed716d21 Set maxStoresPerMemSet to 16. Ditto for maxStoresPerMemCpy and 
maxStoresPerMemMove. Although the last one is not used.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26172 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-14 08:25:08 +00:00
Evan Cheng
82eaf628b4 Enable SSE (for the right subtargets) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26169 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-14 08:07:58 +00:00
Chris Lattner
94dd29216c Switch targets over to using SelectionDAG::getCALLSEQ_START to create 
CALLSEQ_START nodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26143 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-13 09:00:43 +00:00
Evan Cheng
2486af1b53 Prevent certain nodes that have already been selected from being folded into 
X86 addressing mode. Currently we do not allow any node whose target node
produces a chain as well as any node that is at the root of the addressing
mode expression tree.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26117 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-11 02:05:36 +00:00
Evan Cheng
23addc061c Nicer code. :-) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26111 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-10 22:46:26 +00:00
Evan Cheng
f597dc78f8 Added X86 isel debugging stuff. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26110 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-10 22:24:32 +00:00
Evan Cheng
c57e5c17bc Remove a completed entry; add a new entry about fisttp op 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26105 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-10 05:48:15 +00:00
Evan Cheng
7d82d607c5 Match tblgen change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26096 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-09 22:12:53 +00:00
Evan Cheng
7e9b26fc73 Match getTargetNode() changes (now return SDNode* instead of SDOperand). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26085 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-09 07:17:49 +00:00
Chris Lattner
23c574a841 provide an explicit alignment for cp entries 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26069 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-09 02:15:30 +00:00
Evan Cheng
34167215a8 Change Select() from 
SDOperand Select(SDOperand N);
to
void Select(SDOperand &Result, SDOperand N);


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26067 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-09 00:37:58 +00:00
Chris Lattner
418caa1356 Darwin doesn't support #APP/#NO_APP 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26066 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-08 23:42:22 +00:00
Chris Lattner
dba382b16a add a simple optimization 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26062 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-08 17:47:22 +00:00
Chris Lattner
cb298907ab more email -> README moving 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26054 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-08 07:12:07 +00:00
Chris Lattner
8f77b73430 Add some random notes, not high-prio 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26052 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-08 06:52:06 +00:00
Evan Cheng
5ada370f42 Fixed a local common symbol bug. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26044 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-07 23:32:58 +00:00
Evan Cheng
315421e77c For ELF, .comm takes alignment value as the optional 3rd argument. It must be 
specified in bytes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26043 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-07 21:54:08 +00:00
Evan Cheng
2338c5cb0e Darwin ABI issues: weak, linkonce, etc. dynamic-no-pic support is complete. 
Also fixed a function stub bug. Added weak and linkonce support for
x86 Linux.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26038 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-07 08:38:37 +00:00
Evan Cheng
183fff997c Remind myself to add PIC and static asm printer support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26037 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-07 08:35:44 +00:00
Chris Lattner
a3b8c57b9e Eliminate the printCallOperand method, using a 'call' modifier on 
printOperand instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26025 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-06 23:41:19 +00:00
Evan Cheng
5e35168b11 - Update load folding checks to match those auto-generated by tblgen. 
- Manually select SDOperand's returned by TryFoldLoad which make up the
  load address.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26012 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-06 06:02:33 +00:00
Evan Cheng
ba2f0a9ee5 Use SelectRoot() as entry of any tblgen based isel. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25997 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-05 06:46:41 +00:00
Evan Cheng
7dd281b3e5 Re-commit the last bit of change that was backed out. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25983 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-05 05:25:07 +00:00
Chris Lattner
ff805b50f8 Use getPreferredAlignmentLog. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25980 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-05 01:45:04 +00:00
Chris Lattner
b46ef67679 Temporarily revert this patch, which probably breaks with the 
tblgen patch reverted.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25971 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-04 09:24:16 +00:00
Evan Cheng
9c4815a036 Complex pattern's custom matcher should not call Select() on any operands. 
Select them afterwards if it returns true.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25968 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-04 08:50:49 +00:00
Evan Cheng
72f514cf39 Remove an unnecessary predicate. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25954 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-04 02:23:01 +00:00
Evan Cheng
e3de85b447 Separate FILD and FILD_FLAG, the later is only used for SSE2. It produces a 
flag so it can be flagged to a FST.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25953 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-04 02:20:30 +00:00