Johnny Chen
b68a3ee82a
Second try of initial ARM/Thumb disassembler check-in. It consists of a tablgen
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backend (ARMDecoderEmitter) which emits the decoder functions for ARM and Thumb,
and the disassembler core which invokes the decoder function and builds up the
MCInst based on the decoded Opcode.
Reviewed by Chris Latter and Bob Wilson.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100233 91177308-0d34-0410-b5e6-96231b3b80d8
2010-04-02 22:27:38 +00:00
Daniel Dunbar
1de558b71f
MC/Mach-O/x86_64: Support @GOTPCREL on symbols, even for non-PCrel relocations!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99853 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-29 23:56:40 +00:00
Bob Wilson
86afec7730
Reapply Kevin's change 94440, now that Chris has fixed the limitation on
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opcode values fitting in one byte (svn r99494).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99514 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-25 16:36:14 +00:00
Daniel Dunbar
e9cfd685f5
MC: Fix refacto in MCExpr evaluation, I mistakenly replaced a fragment address with a symbol address.
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- This fixes the integrated-as nightly test regressions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99466 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-25 01:03:17 +00:00
Bob Wilson
014dc4e720
Speculatively revert this to see if it fixes buildbot failures.
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--- Reverse-merging r99440 into '.':
U test/MC/AsmParser/X86/x86_32-bit_cat.s
U test/MC/AsmParser/X86/x86_32-encoding.s
U include/llvm/IntrinsicsX86.td
U include/llvm/CodeGen/SelectionDAGNodes.h
U lib/Target/X86/X86InstrSSE.td
U lib/Target/X86/X86ISelLowering.h
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99450 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-24 23:26:29 +00:00
Kevin Enderby
760c2f34d9
Added the Advanced Encryption Standard (AES) Instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99440 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-24 22:33:33 +00:00
Kevin Enderby
044be39090
Fixed the SS42AI template for the SSE 4.2 instructions with TA prefix so it does
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not get an "Unknown immediate size" assert failure when used. All instructions
of this form have an 8-bit immediate. Also added a test case of an example
instruction that is of this form.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99435 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-24 22:28:42 +00:00
Daniel Dunbar
78fcf53a18
MC/Mach-O: Remove Darwin host specific tests, we don't need them anymore.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99100 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-20 22:36:32 +00:00
Daniel Dunbar
57a49a202f
MC/Mach-O: Tweak optimal_nop test to be host independent.
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- This also avoids us running valgrind on /usr/bin/as, which has leaks. :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99099 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-20 22:36:29 +00:00
Kevin Enderby
b46b03b36f
Fixed the encoding problems of the crc32 instructions. All had the Operand size
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override prefix and only the r/m16 forms should have had that. Also for variant
one, the AT&T syntax, added suffixes to all forms. Also added the missing
64-bit form for 'CRC32 r64, r/m8'. Plus added test cases for all forms and
tweaked one test case to add the needed suffixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98980 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-19 20:04:42 +00:00
Daniel Dunbar
602b40f0d0
MC/Mach-O/x86_64: Add relocation support.
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- This is "extraordinarily" Darwin 'as' compatible. See the litany of FIXMEs littered about for more information.
- There are a few cases which seem to clearly be 'as' bugs which I have left unsupported, and there is one cases where we diverge but should fix if it blocks diffing .o files (Darwin 'as' ends up widening a jump unnecessarily).
- 403.gcc build, runs, and diffs equivalently to the 'as' built version now (using llvm-mc). However, it builds so slowly that I wouldn't recommend trying it quite yet. :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98974 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-19 18:07:55 +00:00
Daniel Dunbar
0180daee02
MC/X86: Rename alternate spellings of {ADD64,CMP64} and mark as "code gen only" so they don't get selected by the asm matcher.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98972 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-19 18:07:48 +00:00
Daniel Dunbar
939f8d7ca2
MC/Mach-O: Factor out isScatteredFixupFullyResolvedSimple predicate, and fix some corner cases.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98924 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-19 03:18:12 +00:00
Daniel Dunbar
c28c7689fc
X86: Fix encoding for TEST64rr.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98919 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-19 01:15:03 +00:00
Daniel Dunbar
9fdac902d4
X86MCCodeEmitter: Fix two minor issues with reloc_riprel_4byte_movq_load, we
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were missing it on some movq instructions and were not including the appropriate
PCrel bias.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98880 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-18 21:53:54 +00:00
Daniel Dunbar
f98bc6320b
MC/X86/AsmMatcher: Use the new instruction cleanup routine to implement a
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temporary workaround for matching inc/dec on x86_64 to the correct instruction.
- This hack will eventually be replaced with a robust mechanism for handling
matching instructions based on the available target features.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98858 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-18 20:06:02 +00:00
Chris Lattner
618d0ed4bc
fix an x86-64 encoding bug Daniel found.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98855 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-18 20:04:36 +00:00
Chris Lattner
0f53cf2236
add a special relocation type for movq loads for object
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files that produce special relocation types where the
linker changes movq's into lea's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98839 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-18 18:10:56 +00:00
Daniel Dunbar
d6e59084d0
MC/Mach-O/x86_64: Temporary labels in cstring sections require symbols (and external relocations, but we don't have x86_64 relocations yet).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98583 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-15 21:56:50 +00:00
Chris Lattner
3b39f89006
xfail properly
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98479 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-14 07:55:34 +00:00
Chris Lattner
9e2dab7dbe
xfail these tests temporarily to get teh buildbots back to happy land.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98476 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-14 07:32:48 +00:00
Daniel Dunbar
859c9dc867
X86: Fix ADD64i32 encoding.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98457 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-13 22:49:39 +00:00
Daniel Dunbar
5691e74f97
MC/X86_64: Symbol support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98456 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-13 22:49:35 +00:00
Daniel Dunbar
ee0d89245e
MC/Mach-O: Initial x86_64 support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98454 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-13 22:10:17 +00:00
Daniel Dunbar
96e2cec9c7
MC/X86_64: Fix matching of leaq.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98444 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-13 19:31:44 +00:00
Daniel Dunbar
989ac72981
MC/X86_64: Fix matching of callq.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98443 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-13 19:31:38 +00:00
Daniel Dunbar
da3e9f760c
MC/Mach-O: PCrel relocations weren't using the right base address, they are
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relative to the fragment address, not its offset. This was masked by the text
section normally being at address 0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98420 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-13 02:38:00 +00:00
Daniel Dunbar
d5e7705a05
MC/X86: Add temporary hack to match shrl $1,%eax correctly, to support testing
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other functionality on 403.gcc compiled at -O0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98405 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-13 00:47:29 +00:00
Daniel Dunbar
69c695ee47
MC/X86: Add an XFAIL test where we aren't matching the correct instruction
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because we don't understand how the specific instruction is doing sign
extension.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98404 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-13 00:47:25 +00:00
Daniel Dunbar
f08fde41f3
MC/Mach-O: Implement initial support for relaxation.
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- The implementation is currently very brain dead and inefficient, but I have a
clear plan on how to fix it.
- The good news is, it works and correctly assembles 403.gcc (when built with
Clang, at '-Os', '-Os -g', and '-O3'). Even better, at '-Os' and '-Os -g',
the resulting binary is exactly equivalent to that when built with the system
assembler. So it probably works! :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98396 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-12 22:07:14 +00:00
Daniel Dunbar
979ba5b3c7
MC/Mach-O: Implement "absolutizing" semantics of .set, by evaluating the assembly time value of variables.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98241 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-11 05:53:37 +00:00
Daniel Dunbar
a015c1c876
MC/Mach-O: Use the SECTDIFF relocation type for (A - B + constant) where A is external.
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- I'm not sure why, but this is what 'as' does.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98115 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-10 00:58:25 +00:00
Daniel Dunbar
f291be3159
MC/X86: Rename alternate spellings of ADD{8,16,32} and mark as "code gen only" so they don't get selected by the asm matcher.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98098 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-09 22:50:46 +00:00
Daniel Dunbar
1e8ee89c21
MC/X86: Rename alternate spellings of CMP{8,16,32} and mark as "code gen only" so they don't get selected by the asm matcher.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98097 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-09 22:50:40 +00:00
Daniel Dunbar
f3a066f7c3
MC/Mach-O: For PCrel relocations, we need to compensate for the PCrel adjustment when determining if we need a scattered relocation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98082 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-09 21:27:58 +00:00
Kevin Enderby
0e822407b2
Fix the vmxon entry in the X86InstrInfo.td so it has the correct prefix bytes
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for the encoding and is not the same as vmptrld.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97992 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-08 22:17:26 +00:00
Daniel Dunbar
b2b4acd757
MC/Macho-O: Align the zerofill section itself to the maximum alignment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97991 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-08 22:03:42 +00:00
Daniel Dunbar
37fad5ce4d
MC/Mach-O: Fix address compution for zero fill sections.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97984 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-08 21:10:42 +00:00
Daniel Dunbar
b93c72cda4
X86: Fix encoding for TEST{8,16,32}rr.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97982 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-08 21:10:36 +00:00
Kevin Enderby
d74acb0c78
This is a patch to the assembler frontend to detect when aligning a text
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section with TextAlignFillValue and calls EmitCodeAlignment() instead of
calling EmitValueToAlignment(). This allows x86 assembly code to be aligned
with optimal nops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97158 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-25 18:46:04 +00:00
Chris Lattner
a08b587494
make pcrel immediate values relative to the start of the field,
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not the end of the field, fixing rdar://7651978
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96330 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-16 05:03:17 +00:00
Chris Lattner
b779033a23
add encoder support and tests for rdtscp
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96076 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-13 03:42:24 +00:00
Daniel Dunbar
e9a60eb498
MC/AsmParser: Attempt to constant fold expressions up-front. This ensures we avoid fixups for obvious cases like '-(16)'.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96064 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-13 01:28:07 +00:00
Chris Lattner
f068304b1f
rip out the 'heinous' x86 MCCodeEmitter implementation.
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We still have the templated X86 JIT emitter, *and* the
almost-copy in X86InstrInfo for getting instruction sizes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96059 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-13 00:49:29 +00:00
Chris Lattner
a599de2410
remove special cases for vmlaunch, vmresume, vmxoff, and swapgs
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fix swapgs to be spelled right.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96058 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-13 00:41:14 +00:00
Daniel Dunbar
9c60f534cb
MC/X86: Push immediate operands as immediates not expressions when possible.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96055 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-13 00:17:21 +00:00
Chris Lattner
ca3eeb33a8
add some disassemble testcases for weird instructions
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96045 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 23:46:48 +00:00
Chris Lattner
4a2e5edb94
implement the rest of correct x86-64 encoder support for
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rip-relative addresses, and add a testcase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96040 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 23:24:09 +00:00
Chris Lattner
c4d3f662fc
fix the encodings of monitor and mwait, which were completely
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busted in both encoders. I'm not bothering to fix it in the
old one at this point.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95947 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-12 01:06:22 +00:00
Kevin Enderby
1c5bcac7d5
Remove the few # TAILCALL comments that snuck in. As they may fail on linux.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@95827 91177308-0d34-0410-b5e6-96231b3b80d8
2010-02-11 00:18:12 +00:00