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a83ce98d5f
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38240 Commits

Author SHA1 Message Date
Devang Patel
a83ce98d5f DO not push DBG_VALUE machine instructions for inlined fuction arguments in entry block. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102653 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-29 18:50:36 +00:00
Duncan Sands
e704d9d89c Verify metadata harder. In particular, check that module 
level metadata does not have any function local operands.
This would have caught the problem found in PR6112.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102620 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-29 16:10:30 +00:00
Evan Cheng
8fed76115e Add comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102606 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-29 06:58:53 +00:00
Evan Cheng
a36acad67d Re-enable 102565 with fixes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102602 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-29 06:33:38 +00:00
Evan Cheng
3f54c64a98 Load folding tail call should not use ebp / rbp after it's popped. PEI 
should use esp / rsp to reference frame instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102596 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-29 05:08:22 +00:00
Mon P Wang
b9a01bcf48 Add support for assemblers that don't support periods in a name 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102594 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-29 04:00:56 +00:00
Evan Cheng
16e4ace951 Temporarily disable my changes to unbreak the build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102590 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-29 03:34:19 +00:00
Evan Cheng
9e8a2b9346 Do not generate duplicate dbg_value instructions for function arguments. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102585 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-29 01:40:30 +00:00
Dan Gohman
c924556dd5 Fix missing #include. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102584 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-29 01:39:13 +00:00
Evan Cheng
ee1d91a830 Avoid emitting a dbg_value machineinstr that's not going to be inserted into entry block. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102581 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-29 01:23:55 +00:00
Evan Cheng
8601a3d4de Frame index can be negative. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102577 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-29 01:13:30 +00:00
Evan Cheng
1deef27b0a Check Reg against zero. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102573 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-29 00:59:34 +00:00
Evan Cheng
6691a8935c - Really preserve dbg_value instructions when the register is spilled. 
- Also, update dbg_value is the value is being re-matted from a frame slot, e.g. fixed slots for arguments.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102565 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-28 23:52:26 +00:00
Devang Patel
f38c6c89f1 tidy up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102558 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-28 23:24:13 +00:00
Kevin Enderby
9ac7282117 Fixed the word sized Bit Scan Forward/Reverse instructions, they needed the 
Operand size override prefix to be part of their records.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102556 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-28 23:20:40 +00:00
Evan Cheng
2ad0fcf794 Replace r102368 with code that's less fragile. This creates DBG_VALUE instructions for function arguments early and insert them after instruction selection is done. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102554 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-28 23:08:54 +00:00
Jim Grosbach
d100755bab Add sizes non-floating point versions for the eh sjlj intrinsic expansions. 
rdar://7895451



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102526 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-28 20:33:09 +00:00
Chris Lattner
f3f325b82f fix PR6112 - When globalopt (or any other pass) does RAUW(@G, %G), 
metadata references in non-function-local MDNodes should drop to 
null.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102519 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-28 20:16:12 +00:00
Evan Cheng
59b3655564 Pretty print DBG_VALUE machine instructions. 
Before:
DBG_VALUE %RSI, 0, !-1; dbg:SimpleRegisterCoalescing.cpp:2707
Now:
DBG_VALUE %RSI, 0, !"this"; dbg:SimpleRegisterCoalescing.cpp:2707


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102518 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-28 20:03:13 +00:00
Chris Lattner
e87f7bb50e Rework global alignment computation again. Now we do round up 
alignment of globals to the preferred alignment, but only when
there is no section specified on the global (by far the common
case).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102515 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-28 19:58:07 +00:00
Devang Patel
54fc4d6a48 While lowering dbg_declare, emit DBG_VALUE machine instruction if alloca matching llvm.dbg.declare intrinsic is missing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102513 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-28 19:27:33 +00:00
Jakob Stoklund Olesen
0fd109963a Recompute kill flags from live intervals after coalescing instead of trying to 
update them. Computing kill flags is notoriously difficult, and the coalescer
would get it wrong sometimes, and it would completely skip physical registers.

Now we simply remove kill flags based on the live intervals after coalescing.
This is a few percent slower, but now we get correct kill flags for physical
registers after coalescing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102510 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-28 18:28:39 +00:00
Jakob Stoklund Olesen
7261fb2a6f Teach X86FloatingPoint that a register can be killed multiple times by the same 
instruction.

This instruction would crash the pass:

  INLINEASM <es:foo $0 $1>, 9, %FP0<kill>, 9, %FP0<kill>, 14, %EFLAGS<earlyclobber,def,dead>

Now it doesn't.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102509 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-28 18:28:37 +00:00
Evan Cheng
2bce5f4b56 Enable i16 to i32 promotion by default. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102493 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-28 08:30:49 +00:00
Evan Cheng
b3a3d5e858 Try operation promotion only if regular dag combine and target-specific ones failed to do anything. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102492 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-28 07:10:39 +00:00
Evan Cheng
39cfeecae5 Unbreak the build. Only form shld / shrd after legalization. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102488 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-28 02:25:18 +00:00
Devang Patel
28ff35d030 Emit debug info for byval parameters. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102486 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-28 01:39:28 +00:00
Evan Cheng
8b1190a540 Rather than having a ton of patterns for double shift instructions, e.g. SHLD16rrCL, just perform custom dag combine to form x86 specific dag so they match to the same pattern. This also makes sure later dag combine do not cause isel to miss them (e.g. promoting i16 to i32). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102485 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-28 01:18:01 +00:00
Chris Lattner
a7b611c10d further simplify EmitAlignment by eliminating the 
ForcedAlignBits argument, tweaking the single client of it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102484 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-28 01:08:40 +00:00
Chris Lattner
755824756c remove a dead argument to EmitAlignment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102483 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-28 01:06:02 +00:00
Chris Lattner
059ea138a6 remove some default arguments to EmitAlignment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102482 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-28 01:05:45 +00:00
Devang Patel
a43098d388 Refactor. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102481 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-28 01:03:09 +00:00
Stuart Hastings
5a6a65be46 Tweak x86 INC/DEC generation to look for CopyToReg or SETCC. Radar 7866163. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102477 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-28 00:35:10 +00:00
Chris Lattner
2d4b8ee1d9 further clarify alignment of globals, fix instcombine 
to not increase the alignment of globals with an assigned
alignment and section.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102476 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-28 00:31:12 +00:00
Devang Patel
a00adba6a7 Use MachineOperand::is* predicates. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102472 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-27 22:24:37 +00:00
Devang Patel
97303ee27d Use isReg(), isImm() and isFPImm(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102470 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-27 22:04:41 +00:00
Devang Patel
dcde3db38e Check operand type first. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102468 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-27 21:49:04 +00:00
Evan Cheng
1c45acf510 Fix obvious typos. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102467 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-27 21:46:03 +00:00
Devang Patel
0f9d952542 Ignore DBG_VALUE instructions that points to undef values. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102463 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-27 20:54:45 +00:00
Evan Cheng
b3716e3e28 SRA promotion is also not free. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102456 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-27 19:48:31 +00:00
Evan Cheng
ac7eae5b89 - When legal, promote a load to zextload rather than ext load. 
- Catch more further dag combine opportunities as result of operand promotion, e.g. (i32 anyext (i16 trunc (i32 x))) -> (i32 x)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102455 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-27 19:48:13 +00:00
Devang Patel
eac9c07fde Identify when a lexical scope is split in to multiple instruction ranges. Emit such ranges using DW_AT_ranges. 
This patch fixes bug (PR6894) introduced by previous version of this patch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102454 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-27 19:46:33 +00:00
Evan Cheng
ed33b13a10 Do not count kill, implicit_def instructions as printed instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102453 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-27 19:38:45 +00:00
Chris Lattner
4c4d0c0cc5 round zero-byte .zerofill directives up to 1 byte. This 
should fix some "g++.dg-struct-layout-1" failures, 
rdar://7886017


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102421 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-27 07:41:44 +00:00
Dale Johannesen
fc0b860bcc Revert a small part of 102372; this fixes at least one 
of the dbg testsuite regressions.  I don't think this is
really the right fix; this change exposed an existing problem
upstream somewhere.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102410 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-27 02:10:05 +00:00
Chris Lattner
c6f0aadc3b Fix a problem that lower invoke has with allocas (PR6694), and 
add a version of createLowerInvokePass that allows the client
to specify whether it wants "expensive" or "cheap" lowering.

Patch by Alex Mac!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102402 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-26 23:49:32 +00:00
Chris Lattner
d61647d306 add a comment in verbose-asm mode indicating why a noop is being generated. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102401 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-26 23:41:43 +00:00
Chris Lattner
ee9eb411ff on darwin empty functions need to codegen into something of non-zero length, 
otherwise labels get incorrectly merged.  We handled this by emitting a 
".byte 0", but this isn't correct on thumb/arm targets where the text segment
needs to be a multiple of 2/4 bytes.  Handle this by emitting a noop.  This
is more gross than it should be because arm/ppc are not fully mc'ized yet.

This fixes rdar://7908505



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102400 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-26 23:37:21 +00:00
Bob Wilson
5dfa87ecc6 Handle register-to-register copies within the tGPR class. 
Radar 7896289


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102396 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-26 23:20:08 +00:00
Bob Wilson
cc7354e993 Avoid adding a null MD node operand, which crashes with "-debug" when trying 
to print the operand.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@102395 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-26 22:56:56 +00:00