Commit Graph

11201 Commits

Author SHA1 Message Date
Michael Kuperstein
acd5f13c88 [X86] Convert esp-relative movs of function arguments to pushes, step 2
This moves the transformation introduced in r223757 into a separate MI pass.
This allows it to cover many more cases (not only cases where there must be a 
reserved call frame), and perform rudimentary call folding. It still doesn't 
have a heuristic, so it is enabled only for optsize/minsize, with stack 
alignment <= 8, where it ought to be a fairly clear win.

(Re-commit of r227728)

Differential Revision: http://reviews.llvm.org/D6789


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227752 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-01 16:56:04 +00:00
Michael Kuperstein
5b61b8f53c Revert r227728 due to bad line endings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227746 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-01 16:15:07 +00:00
Chandler Carruth
b71d385494 [multiversion] Switch the TTI queries from TargetMachine to Subtarget
now that we have a correct and cached subtarget specific to the
function.

Also, finish providing a cached per-function subtarget in the core
LLVMTargetMachine -- that layer hadn't switched over yet.

The only use of the TargetMachine was to re-lookup a subtarget for
a particular function to work around the fact that TTI was immutable.
Now that it is per-function and we haved a cached subtarget, use it.

This still leaves a few interfaces with real warts on them where we were
passing Function objects through the TTI interface. I'll remove these
and clean their usage up in subsequent commits now that this isn't
necessary.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227738 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-01 14:22:17 +00:00
Chandler Carruth
d0bfb83efb [multiversion] Remove the cached TargetMachine pointer from the
intermediate TTI implementation template and instead query up to the
derived class for both the TargetMachine and the TargetLowering.

Most of the derived types had a TLI cached already and there is no need
to store a less precisely typed target machine pointer.

This will in turn make it much cleaner to look up the TLI via
a per-function subtarget instead of the generic subtarget, and it will
pave the way toward pulling the subtarget used for unroll preferences
into the same form once we are *always* using the function to look up
the correct subtarget.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227737 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-01 14:01:15 +00:00
Chandler Carruth
6e89e1316a [multiversion] Switch all of the targets over to use the
TargetIRAnalysis access path directly rather than implementing getTTI.

This even removes getTTI from the interface. It's more efficient for
each target to just register a precise callback that creates their
specific TTI.

As part of this, all of the targets which are building their subtargets
individually per-function now build their TTI instance with the function
and thus look up the correct subtarget and cache it. NVPTX, R600, and
XCore currently don't leverage this functionality, but its trivial for
them to add it now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227735 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-01 13:20:00 +00:00
Chandler Carruth
d12af8754e [multiversion] Remove a false freedom to leave the TargetMachine pointer
null.

For some reason some of the original TTI code supported a null target
machine. This seems to have been legacy, and I made matters worse when
refactoring this code by spreading that pattern further through the
various targets.

The TargetMachine can't actually be null, and it doesn't make sense to
support that use case. I've now consistently removed it and removed all
of the code trying to cope with that situation. This is probably good,
as several targets *didn't* cope with it being null despite the null
default argument in their constructors. =]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227734 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-01 12:38:24 +00:00
Michael Kuperstein
59d9986259 [X86] Convert esp-relative movs of function arguments to pushes, step 2
This moves the transformation introduced in r223757 into a separate MI pass.
This allows it to cover many more cases (not only cases where there must be a 
reserved call frame), and perform rudimentary call folding. It still doesn't 
have a heuristic, so it is enabled only for optsize/minsize, with stack 
alignment <= 8, where it ought to be a fairly clear win.

Differential Revision: http://reviews.llvm.org/D6789

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227728 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-01 11:44:44 +00:00
Craig Topper
270f7a2669 [X86] Add a few target specific nodes to 'getTargetNodeName'
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227720 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-01 10:00:37 +00:00
Chandler Carruth
685c2add65 [PM] Remove a bunch of stale TTI creation method declarations. I nuked
their definitions, but forgot to clean up all the declarations which are
in different files.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227698 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-01 00:22:15 +00:00
Saleem Abdulrasool
7708f5b68a X86: silence a GCC warning
GCC 4.9 gives the following warning:
  warning: enumeral and non-enumeral type in conditional expression
Cast the enumeral value to an integer within the ternary operation.  NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227692 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-31 17:56:11 +00:00
Diego Novillo
96a563ccfa Remove unused variable.
Summary:
This variable is only used inside an assert. This breaks builds with
asserts disabled.

OK for trunk?

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D7314

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227691 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-31 17:17:33 +00:00
Aaron Ballman
2376747a12 Removed a spurious semicolon; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227690 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-31 15:18:47 +00:00
Simon Pilgrim
4c91d590d5 Removed SSE lane blend findCommutedOpIndices overrides. NFCI.
The default op indices frmo TargetInstrInfo::findCommutedOpIndices are being commuted so we don't need to do this.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227689 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-31 15:16:30 +00:00
Simon Pilgrim
982005c23e [X86][SSE] Shuffle mask decode support for zero extend, scalar float/double moves and integer load instructions
This patch adds shuffle mask decodes for integer zero extends (pmovzx** and movq xmm,xmm) and scalar float/double loads/moves (movss/movsd).

Also adds shuffle mask decodes for integer loads (movd/movq).

Differential Revision: http://reviews.llvm.org/D7228

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227688 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-31 14:09:36 +00:00
Chandler Carruth
1937233a22 [PM] Switch the TargetMachine interface from accepting a pass manager
base which it adds a single analysis pass to, to instead return the type
erased TargetTransformInfo object constructed for that TargetMachine.

This removes all of the pass variants for TTI. There is now a single TTI
*pass* in the Analysis layer. All of the Analysis <-> Target
communication is through the TTI's type erased interface itself. While
the diff is large here, it is nothing more that code motion to make
types available in a header file for use in a different source file
within each target.

I've tried to keep all the doxygen comments and file boilerplate in line
with this move, but let me know if I missed anything.

With this in place, the next step to making TTI work with the new pass
manager is to introduce a really simple new-style analysis that produces
a TTI object via a callback into this routine on the target machine.
Once we have that, we'll have the building blocks necessary to accept
a function argument as well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227685 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-31 11:17:59 +00:00
Chandler Carruth
a6a87b595d [PM] Change the core design of the TTI analysis to use a polymorphic
type erased interface and a single analysis pass rather than an
extremely complex analysis group.

The end result is that the TTI analysis can contain a type erased
implementation that supports the polymorphic TTI interface. We can build
one from a target-specific implementation or from a dummy one in the IR.

I've also factored all of the code into "mix-in"-able base classes,
including CRTP base classes to facilitate calling back up to the most
specialized form when delegating horizontally across the surface. These
aren't as clean as I would like and I'm planning to work on cleaning
some of this up, but I wanted to start by putting into the right form.

There are a number of reasons for this change, and this particular
design. The first and foremost reason is that an analysis group is
complete overkill, and the chaining delegation strategy was so opaque,
confusing, and high overhead that TTI was suffering greatly for it.
Several of the TTI functions had failed to be implemented in all places
because of the chaining-based delegation making there be no checking of
this. A few other functions were implemented with incorrect delegation.
The message to me was very clear working on this -- the delegation and
analysis group structure was too confusing to be useful here.

The other reason of course is that this is *much* more natural fit for
the new pass manager. This will lay the ground work for a type-erased
per-function info object that can look up the correct subtarget and even
cache it.

Yet another benefit is that this will significantly simplify the
interaction of the pass managers and the TargetMachine. See the future
work below.

The downside of this change is that it is very, very verbose. I'm going
to work to improve that, but it is somewhat an implementation necessity
in C++ to do type erasure. =/ I discussed this design really extensively
with Eric and Hal prior to going down this path, and afterward showed
them the result. No one was really thrilled with it, but there doesn't
seem to be a substantially better alternative. Using a base class and
virtual method dispatch would make the code much shorter, but as
discussed in the update to the programmer's manual and elsewhere,
a polymorphic interface feels like the more principled approach even if
this is perhaps the least compelling example of it. ;]

Ultimately, there is still a lot more to be done here, but this was the
huge chunk that I couldn't really split things out of because this was
the interface change to TTI. I've tried to minimize all the other parts
of this. The follow up work should include at least:

1) Improving the TargetMachine interface by having it directly return
   a TTI object. Because we have a non-pass object with value semantics
   and an internal type erasure mechanism, we can narrow the interface
   of the TargetMachine to *just* do what we need: build and return
   a TTI object that we can then insert into the pass pipeline.
2) Make the TTI object be fully specialized for a particular function.
   This will include splitting off a minimal form of it which is
   sufficient for the inliner and the old pass manager.
3) Add a new pass manager analysis which produces TTI objects from the
   target machine for each function. This may actually be done as part
   of #2 in order to use the new analysis to implement #2.
4) Work on narrowing the API between TTI and the targets so that it is
   easier to understand and less verbose to type erase.
5) Work on narrowing the API between TTI and its clients so that it is
   easier to understand and less verbose to forward.
6) Try to improve the CRTP-based delegation. I feel like this code is
   just a bit messy and exacerbating the complexity of implementing
   the TTI in each target.

Many thanks to Eric and Hal for their help here. I ended up blocked on
this somewhat more abruptly than I expected, and so I appreciate getting
it sorted out very quickly.

Differential Revision: http://reviews.llvm.org/D7293

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227669 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-31 03:43:40 +00:00
Eric Christopher
9003c8d02f Remove the last vestiges of resetOperationActions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227648 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-31 00:21:17 +00:00
Reid Kleckner
e359929517 Win64: Put a REX_W prefix on all TAILJMP* instructions
MSDN's x64 software conventions page says that this is one of the fixed
list of legal epilogues:
https://msdn.microsoft.com/en-us/library/tawsa7cb.aspx

Presumably this is how the unwinder distinguishes epilogue jumps from
in-function control flow.

Also normalize the way we place "## TAILCALL" comments on such jumps.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227611 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-30 21:03:31 +00:00
Sanjay Patel
3460950d15 tidy up; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227582 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-30 16:58:58 +00:00
Reid Kleckner
4c757e0907 x86: Remove unused variables not caught by MSVC =P
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227520 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-30 00:05:39 +00:00
Reid Kleckner
c9fbc97e95 x86: Fix large model calls to __chkstk for dynamic allocas
In the large code model, we now put __chkstk in %r11 before calling it.

Refactor the code so that we only do this once. Simplify things by using
__chkstk_ms instead of __chkstk on cygming. We already use that symbol
in the prolog emission, and it simplifies our logic.

Second half of PR18582.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227519 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-29 23:58:04 +00:00
Sanjay Patel
65d9a05c76 Change SmallVector param to the more general ArrayRef; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227514 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-29 23:35:04 +00:00
Reid Kleckner
850420cd14 x86: Remove the W64ALLOCA pseudo
This is just an alias for CALL64pcrel32, and we can just use that opcode
with explicit defs in the MI.

No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227508 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-29 23:09:37 +00:00
Reid Kleckner
cb867e4ac4 Update comments to use unreachable instead of llvm.trap, as implemented now
win64: Call __chkstk through a register with the large code model

Fixes half of PR18582. True dynamic allocas will still have a
CALL64pcrel32 which will fail.

Reviewers: majnemer

Differential Revision: http://reviews.llvm.org/D7267

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227503 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-29 22:33:00 +00:00
David Blaikie
1ba26f8da1 DebugInfo: Teach Fast ISel to respect the debug location of comparisons in jumps
The use of the DbgLoc in FastISel is probably something we should fix.
It's prone to leaking the wrong location into instructions - we should
have a clear chain of custody from the debug location of an IR
Instruction to that of a MachineInstr to avoid such leakage.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227481 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-29 19:09:18 +00:00
Robert Lougher
1031549bec [X86] Use single add/sub for large stack offsets
For large stack offsets the compiler generates multiple immediate mode
sub/add instructions in the prologue/epilogue.  This patch makes the
compiler place the final amount to be added/subtracted into a register,
which is then added/substracted with a single operation.

Differential Revision: http://reviews.llvm.org/D7226


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227458 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-29 16:18:29 +00:00
Simon Pilgrim
d0e8688ebc Spelling fixes. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227376 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 22:03:52 +00:00
Simon Pilgrim
5d8772fef5 Line endings fix. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227374 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 21:56:52 +00:00
Sanjay Patel
143826f71b invert check for less indentation; use local vars to reduce duplication; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227355 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 19:44:21 +00:00
Sanjay Patel
9598bbc542 use SDValue methods directly instead of getNode()->* ; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227334 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 18:01:31 +00:00
Michael Kuperstein
837fe4388b [x32] Change the condition from bitness to LP64 for TCRETURNdi64.
TCRETURNmi64, which was mistakenly changed in r227307 will wait for another day.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227317 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 16:11:35 +00:00
Michael Kuperstein
0906c8fc1c [X86] Reduce some 32-bit imuls into lea + shl
Reduce integer multiplication by a constant of the form k*2^c, where k is in {3,5,9} into a lea + shl. Previously it was only done for imulq on 64-bit platforms, but it makes sense for imull and 32-bit as well.

Differential Revision: http://reviews.llvm.org/D7196

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227308 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 14:08:22 +00:00
Michael Kuperstein
e5b95695ea [x32] Enable sibcall optimization on x32.
This includes two things:
1) Fix TCRETURNdi and TCRETURN64di patterns to check the right thing (LP64 as opposed to target bitness).
2) Allow LEA64_32 in MatchingStackOffset.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227307 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 13:38:48 +00:00
Elena Demikhovsky
b9d3801cd2 AVX-512: Added FMA intrinsics with rounding mode
By Asaf Badouh and Elena Demikhovsky

Added special nodes for rounding: FMADD_RND, FMSUB_RND..
It will prevent merge between nodes with rounding and other standard nodes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227303 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 10:21:27 +00:00
Craig Topper
aef361807e [X86] Teach disassembler to handle illegal immediates on AVX512 integer compare instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227302 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 10:09:56 +00:00
Craig Topper
f3a2214da8 [X86] Merge printSSECC and printAVXCC. They only differed by an assertion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227301 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-28 10:09:52 +00:00
Alexey Samsonov
00b7a940e7 Revert "[x86] Combine x86mmx/i64 to v2i64 conversion to use scalar_to_vector"
This reverts commits r226953 and r226974.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227248 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-27 21:34:11 +00:00
Simon Pilgrim
44513da617 [X86][SSE] Float comparisons can sometimes be safely commuted
For ordered, unordered, equal and not-equal tests, packed float and double comparison instructions can be safely commuted without affecting the results. This patch checks the comparison mode of the (v)cmpps + (v)cmppd instructions and commutes the result if it can.

Differential Revision: http://reviews.llvm.org/D7178

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227145 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-26 22:29:24 +00:00
Simon Pilgrim
3ba85ab23a [X86][PCLMUL] Enable commutation for PCLMUL instructions
Patch to allow (v)pclmulqdq to be commuted - swaps the src registers and inverts the immediate (low/high) src mask.

Differential Revision: http://reviews.llvm.org/D7180

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227141 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-26 22:00:18 +00:00
Alex Rosenberg
8da9a6686a Use a different encoding for debugtrap on PS4.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227116 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-26 19:09:27 +00:00
Eric Christopher
04bcc11905 Move DataLayout back to the TargetMachine from TargetSubtargetInfo
derived classes.

Since global data alignment, layout, and mangling is often based on the
DataLayout, move it to the TargetMachine. This ensures that global
data is going to be layed out and mangled consistently if the subtarget
changes on a per function basis. Prior to this all targets(*) have
had subtarget dependent code moved out and onto the TargetMachine.

*One target hasn't been migrated as part of this change: R600. The
R600 port has, as a subtarget feature, the size of pointers and
this affects global data layout. I've currently hacked in a FIXME
to enable progress, but the port needs to be updated to either pass
the 64-bitness to the TargetMachine, or fix the DataLayout to
avoid subtarget dependent features.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227113 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-26 19:03:15 +00:00
Sanjay Patel
956d6f0cf5 Model sqrtsd as a binary operation with one source operand tied to the destination (PR14221)
This patch fixes the following miscompile:

define void @sqrtsd(<2 x double> %a) nounwind uwtable ssp {
  %0 = tail call <2 x double> @llvm.x86.sse2.sqrt.sd(<2 x double> %a) nounwind 
  %a0 = extractelement <2 x double> %0, i32 0
  %conv = fptrunc double %a0 to float
  %a1 = extractelement <2 x double> %0, i32 1
  %conv3 = fptrunc double %a1 to float
  tail call void @callee2(float %conv, float %conv3) nounwind
  ret void
}

Current codegen:

sqrtsd	%xmm0, %xmm1        ## high element of %xmm1 is undef here
xorps	%xmm0, %xmm0
cvtsd2ss	%xmm1, %xmm0
shufpd	$1, %xmm1, %xmm1
cvtsd2ss	%xmm1, %xmm1 ## operating on undef value
jmp	_callee

This is a continuation of http://llvm.org/viewvc/llvm-project?view=revision&revision=224624 ( http://reviews.llvm.org/D6330 ) 
which was itself a continuation of r167064 ( http://llvm.org/viewvc/llvm-project?view=revision&revision=167064 ).

All of these patches are partial fixes for PR14221 ( http://llvm.org/bugs/show_bug.cgi?id=14221 ); 
this should be the final patch needed to resolve that bug.

Differential Revision: http://reviews.llvm.org/D6885



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227111 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-26 18:42:16 +00:00
Elena Demikhovsky
717d41d8c3 AVX-512: Changes in operations on masks registers for KNL and SKX
- Added KSHIFTB/D/Q for skx
- Added KORTESTB/D/Q for skx
- Fixed store operation for v8i1 type for KNL
- Store size of v8i1, v4i1 and v2i1 are changed to 8 bits



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227043 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-25 12:47:15 +00:00
Craig Topper
ff763041d2 [X86] Give scalar VRNDSCALE instructions priority in AVX512 mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227039 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-25 08:49:22 +00:00
Craig Topper
e3792c042d Simplify a multiclass. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227038 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-25 08:49:19 +00:00
Craig Topper
e237954ed8 Remove tab characters. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227036 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-25 08:45:32 +00:00
Elena Demikhovsky
70bae89669 Implemented cost model for masked load/store operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227035 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-25 08:44:46 +00:00
Craig Topper
896c1e9b70 [X86] Replace i32i8imm on SSE/AVX instructions with i32u8imm which will make the assembler bounds check them. It will also make them print as unsigned.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227032 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-25 02:21:16 +00:00
Craig Topper
046047ccc3 [X86] Use u8imm in several places that used i32i8imm that don't require an i32 type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227031 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-25 02:21:13 +00:00
Craig Topper
a92d03bb7a Remove tab characters. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227030 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-25 02:21:11 +00:00