(1) Cannot use ANDN(ot), ORN, and XORN for boolean ops, only bitwise ops.
(2) Conditional move instructions must distinguish signed and unsigned
condition codes, e.g., MOVLE vs. MOVLEU.
(3) Conditional-move-on-register was using the cond-move-on-cc opcodes,
which produces a valid-looking instruction with bogus registers!
(4) Here's a really cute one: dividing-by-2^k for negative numbers needs to
add 2^k-1 before shifting, not add 1 after shifting. Sadly, these
are the same when k=0 so our poor test case worked fine.
(5) Casting between signed and unsigned values was not correct:
completely reimplemented.
(6) Zero-extension on unsigned values was bogus: I was only doing the
SRL and not the SLLX before it. Don't know WHAT I was thinking!
(7) And the most important class of changes: Sign-extensions on signed values.
Signed values are not sign-extended after ordinary operations,
so they must be sign-extended before the following cases:
-- passing to an external or unknown function
-- returning from a function
-- using as operand 2 of DIV or REM
-- using as either operand of condition-code setting operation
(currently only SUBCC), with smaller than 32-bit operands
Also, a couple of improvements:
(1) Fold cast-to-bool into Not(bool). Need to do this for And, Or, XOR also.
(2) Convert SetCC-Const into a conditional-move-on-register (case 41)
if the constant is 0. This was only being done for branch-on-SetCC-Const
when the branch is folded with the SetCC-Const.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7159 91177308-0d34-0410-b5e6-96231b3b80d8
(1) An int CC live range must be spilled if there are any interferences,
even if no other "neighbour" in the interf. graph has been allocated
that reg. yet. This is actually true of any class with only one reg!
(2) SparcIntCCRegClass::colorIGNode sets the color even if the LR must
be spilled so that the machine-independent spill code doesn't have to
make the machine-dependent decision of which CC name to use based on
operand type: %xcc or %icc. (These are two halves of the same
register.)
(3) LR->isMarkedForSpill() is no longer the same as LR->hasColor().
These should never have been the same, and this is necessary now for #2.
(4) All RDCCR and WRCCR instructions are directly generated with the
phony number for %ccr so that EmitAssembly/EmitBinary doesn't have to
deal with this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7152 91177308-0d34-0410-b5e6-96231b3b80d8
(1) An int CC live range must be spilled if there are any interferences,
even if no other "neighbour" in the interf. graph has been allocated
that reg. yet. This is actually true of any class with only one reg!
(2) SparcIntCCRegClass::colorIGNode sets the color even if the LR must
be spilled so that the machine-independent spill code doesn't have to
make the machine-dependent decision of which CC name to use based on
operand type: %xcc or %icc. (These are two halves of the same register.)
(3) LR->isMarkedForSpill() is no longer the same as LR->hasColor().
These should never have been the same, and this is necessary now for #2.
(4) All RDCCR and WRCCR instructions are directly generated with the
phony number for %ccr so that EmitAssembly/EmitBinary doesn't have to
deal with this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7151 91177308-0d34-0410-b5e6-96231b3b80d8
Corrected capitalization of subheadings.
Created a new subsection for compiling the C front end and moved all references
to it there.
Updated the disk space requirements to reflect the need for the binary C front
end and the optional C front end source.
Added information on unpacking the distribution to the summary section.
Moved autoconf environment variables to the autoconf section.
Changed make to gmake.
Removed some of the precise directions for unpacking the archives.
Fixed some formatting inconsistencies (headings that were not centered).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7132 91177308-0d34-0410-b5e6-96231b3b80d8
Unfortunately, reallocation also means that the pointer numbering will
change, so increase table size to try to avoid it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7130 91177308-0d34-0410-b5e6-96231b3b80d8
taking out the rule for compiling the test driver.
We need the native libraries for libinstr because they are directly
linked into the native CBE or LLC code. That is the only practical
way to debug them!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7129 91177308-0d34-0410-b5e6-96231b3b80d8
* Made error messages print out what directory failed chdir()
* Put quotes around search arguments to grep
* Use `egrep' instead of `grep -e' because they are equivalent but `grep' does
not have the `-e' option on Sparc/Solaris
* Added `--enable-jit' to the ./configure command because both X86 and Sparc
have JITs and we want them to be tested
* Fixed the regular expressions parsing the changes in CVS which were causing
the script to die
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7118 91177308-0d34-0410-b5e6-96231b3b80d8
integer overflow):
We need to use %icc and not %xcc for comparisons on 32-bit or smaller
integer values.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7111 91177308-0d34-0410-b5e6-96231b3b80d8
correct: empirically, "regType" is wrong for a number of registers. Thus, one
can only rely on the "regClass" to figure out what kind of register one is
dealing with.
This change switches to using only "regClass" and adds a few extra DEBUG() print
statements and a few clean-ups in comments and code, mostly minor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7103 91177308-0d34-0410-b5e6-96231b3b80d8
Attempted to better structure and order the document.
Added more information about autoconf, the build system, and how to build LLVM.
Added directions on how to build the C front end.
Added a section on common problems and their solutions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7096 91177308-0d34-0410-b5e6-96231b3b80d8
