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2755 Commits

Author SHA1 Message Date
Benjamin Kramer
aede8118ad Forgot to update the most important part of the gtest modifications readme. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105396 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-03 17:11:49 +00:00
Benjamin Kramer
2e3f44eab2 Disable pthread support in googletest if llvm was configured without threads. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105390 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-03 15:17:04 +00:00
Benjamin Kramer
8ef297e945 Turns out gtest still prefers the system <tr1/tuple> over it's own 
implementation. Force the internal one to unbreak clang selfhost on linux.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105386 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-03 07:51:58 +00:00
Nate Begeman
162d3ba464 arm_neon.h now makes it through clang and generates appropriate code for those functions which can use 
generic vector operators rather than __builtin_neon_*


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105380 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-03 04:04:09 +00:00
Benjamin Kramer
4839d872fc Update Readme and Makefiles for the new gtest. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105355 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-02 22:02:57 +00:00
Benjamin Kramer
57240ff6e2 Merge gtest-1.5.0. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105354 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-02 22:02:30 +00:00
Benjamin Kramer
190f8ee25a Merge gtest-1.4.0. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105353 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-02 22:02:11 +00:00
Benjamin Kramer
e4b9c93fc1 Merge gtest-1.3.0. 
OSX users: make sure that CrashReporter is disabled when running unit tests.
Death tests are enabled now so you'll get a ton of message boxes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105352 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-02 22:01:25 +00:00
Nate Begeman
7c8c8830a9 arm_neon.h emitter now mostly complete for the purposes of initial testing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105349 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-02 21:53:00 +00:00
Duncan Sands
8dbbacedcd Pacify recent gcc: remove a pointless const qualifier. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105318 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-02 08:37:30 +00:00
Nate Begeman
e66aab553c Checkpoint; handle 'int' and 'void' correctly 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105316 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-02 07:14:28 +00:00
Nate Begeman
af905efc61 Emit full function prototypes. Definitions & typedefs to come. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105315 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-02 06:17:19 +00:00
Nate Begeman
22237771d8 Checkpoint arm_neon.h generation with tablegen 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105307 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-02 00:34:55 +00:00
Sean Hunt
891f27380c Fix comment 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105297 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-01 23:29:39 +00:00
Dan Gohman
c6e1f67b17 Fix extra fread after EOF, non-wires-crossed version. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105270 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-06-01 14:09:29 +00:00
Chris Lattner
caa3dcfc76 revert r105223 which broke all my testing. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105225 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-31 17:10:45 +00:00
Dan Gohman
b6bd72ee7c Fix count so that it doesn't make an extra fread call after 
EOF is detected.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105223 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-31 16:13:45 +00:00
Sean Hunt
c10a62b0d5 Allow for creation of clang DeclNodes tables. 
The StmtNodes generator has been generalized to allow for the
creation of DeclNodes tables as well, and another emitter was
added for DeclContexts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105164 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-30 07:21:42 +00:00
Jakob Stoklund Olesen
7c9a6e3284 Emit TargetRegisterInfo::composeSubRegIndices(). 
Also verify that all subregister indices compose unambiguously.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105064 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 23:48:31 +00:00
Nate Begeman
e8f0349439 Comment out some code in prep for actual .td file checkpoint. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104927 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 02:19:08 +00:00
Eli Friedman
a4fda2c757 Fix build breakage. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104912 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 01:15:28 +00:00
Nate Begeman
5ddb087f7f Add support to tablegen for auto-generating arm_neon.h from a tablegen description 
of the intrinsics.  The goal is to auto-generate both support for GCC-style (vector)
and ARM-style (struct of vector) intrinsics.

This is work in progress, but will be completed soon.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104910 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-28 01:08:32 +00:00
Dan Gohman
756a96a328 When handling raw_ostream errors manually, use clear_error() so that 
raw_ostream doesn't try to do its own error handling.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104881 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-27 20:17:28 +00:00
Dan Gohman
9d2cbffed0 Simplify raw_ostream usage. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104874 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-27 19:48:08 +00:00
Dan Gohman
098d3a41e1 Minor code simplification. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104845 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-27 16:25:05 +00:00
Daniel Dunbar
368a456503 AsmMatcher: Ensure classes are totally ordered, so we can std::sort them reliably. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104806 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-27 05:31:32 +00:00
Jakob Stoklund Olesen
6f0ff1d578 Check that inherited subregisters all have a direct SubRegIndex. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104755 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 22:15:07 +00:00
Jakob Stoklund Olesen
160a3bf74d Add StringRef::compare_numeric and use it to sort TableGen register records. 
This means that our Registers are now ordered R7, R8, R9, R10, R12, ...
Not R1, R10, R11, R12, R2, R3, ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104745 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 21:47:28 +00:00
Jakob Stoklund Olesen
f86a619314 Suppress emmission of empty subreg/superreg/alias sets. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104741 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 21:35:55 +00:00
Jakob Stoklund Olesen
ca561ffcf3 Replace the SubRegSet tablegen class with a less error-prone mechanism. 
A Register with subregisters must also provide SubRegIndices for adressing the
subregisters. TableGen automatically inherits indices for sub-subregisters to
minimize typing.

CompositeIndices may be specified for the weirder cases such as the XMM sub_sd
index that returns the same register, and ARM NEON Q registers where both D
subregs have ssub_0 and ssub_1 sub-subregs.

It is now required that all subregisters are named by an index, and a future
patch will also require inherited subregisters to be named. This is necessary to
allow composite subregister indices to be reduced to a single index.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104704 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 17:27:12 +00:00
Jakob Stoklund Olesen
b555609e73 Revert "Replace the SubRegSet tablegen class with a less error-prone mechanism." 
This reverts commit 104654.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104660 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 01:21:14 +00:00
Jakob Stoklund Olesen
6a45d681e5 Replace the SubRegSet tablegen class with a less error-prone mechanism. 
A Register with subregisters must also provide SubRegIndices for adressing the
subregisters. TableGen automatically inherits indices for sub-subregisters to
minimize typing.

CompositeIndices may be specified for the weirder cases such as the XMM sub_sd
index that returns the same register, and ARM NEON Q registers where both D
subregs have ssub_0 and ssub_1 sub-subregs.

It is now required that all subregisters are named by an index, and a future
patch will also require inherited subregisters to be named. This is necessary to
allow composite subregister indices to be reduced to a single index.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104654 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-26 00:28:19 +00:00
Jakob Stoklund Olesen
76f0ad7bf5 Drop the SuperregHashTable. It is essentially the same as SubregHashTable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104650 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-25 23:43:18 +00:00
Jakob Stoklund Olesen
1fc8e759a7 Print symbolic SubRegIndex names on machine operands. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104628 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-25 19:49:38 +00:00
Jakob Stoklund Olesen
48d0c163fb Ignore NumberHack and give each SubRegIndex instance a unique enum value instead. 
This passes lit tests, but I'll give it a go through the buildbots to smoke out
any remaining places that depend on the old SubRegIndex numbering.

Then I'll remove NumberHack entirely.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104615 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-25 17:21:04 +00:00
Jakob Stoklund Olesen
33276d95ef Switch SubRegSet to using symbolic SubRegIndices 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104571 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-24 23:03:18 +00:00
Chris Lattner
ec5a0b336a diaggroup categories should take precedence over diag-specific groups. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104567 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-24 21:55:47 +00:00
Jakob Stoklund Olesen
09bc029865 Replace the tablegen RegisterClass field SubRegClassList with an alist-like data 
structure that represents a mapping without any dependencies on SubRegIndex
numbering.

This brings us closer to being able to remove the explicit SubRegIndex
numbering, and it is now possible to specify any mapping without inventing
*_INVALID register classes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104563 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-24 21:46:58 +00:00
Jakob Stoklund Olesen
73ea7bf450 Add the SubRegIndex TableGen class. 
This is the beginning of purely symbolic subregister indices, but we need a bit
of jiggling before the explicit numeric indices can be completely removed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104492 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-24 14:48:12 +00:00
Daniel Dunbar
54ddf3d9c7 tblgen/AsmMatcher: Change AsmOperandClass to allow a list of superclasses instead of just one. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104452 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-22 21:02:29 +00:00
Daniel Dunbar
4072886a69 tblgen/Target: Add a isAsmParserOnly bit, and teach the disassembler to honor 
it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104270 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-20 20:20:32 +00:00
Daniel Dunbar
b0ac8677fd lit: Add another place to look for bash. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104189 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-19 23:56:09 +00:00
Sean Hunt
853197557c Replace FIRST_* and LAST_* macros with a generic STMT_RANGE macro 
Also rename ABSTRACT to ABSTRACT_STMT

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104018 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-18 06:22:50 +00:00
Evan Cheng
22c687b642 Added a QQQQ register file to model 4-consecutive Q registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103760 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-14 02:13:41 +00:00
Evan Cheng
dbf67fefea Adding a v8i64 512-bit vector type. This will be used to model ARM NEON intrinsics which translate into a pair of vld / vst instructions that can load / store 8 consecutive 64-bit (D) registers. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103746 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-13 23:55:47 +00:00
Chandler Carruth
93ca7b60bf Update tablegen to generate shorts instead of chars for subgroup arrays. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103704 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-13 07:43:47 +00:00
Daniel Dunbar
bd4fa2efd3 lit: Fix a sh lexing bug which caused annotate-token.m to fail when run with the 
internal shell parser; we weren't lexing the quotes in a command like::

  clang -DFOO='hello'

correctly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103652 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-12 21:47:58 +00:00
Daniel Dunbar
473a09d80a lit: Fix OneCommandPerFileTest format when tests are specified directly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103626 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-12 17:56:44 +00:00
Daniel Dunbar
b14c699fe0 lit: Add support for 'lit ... @foo', which reads a list of tests to run from 
foo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103625 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-12 17:56:42 +00:00
Dan Gohman
a6cb641f48 Add initial kill flag support to FastISel. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103529 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-05-11 23:54:07 +00:00