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Author SHA1 Message Date
Sanjay Patel
9e03e85cac fixed to test feature, not CPU 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@231513 91177308-0d34-0410-b5e6-96231b3b80d8
 2015-03-06 20:51:25 +00:00
Sanjay Patel
2b918388ab Lower FNEG ( FABS (x) ) -> FNABS (x) [X86 codegen] PR20578 
Negative FABS of either a scalar or vector should be handled the same way
on x86 with SSE/AVX: a single OR instruction of the FP operand with a
constant to light up the sign bit(s).

http://llvm.org/bugs/show_bug.cgi?id=20578

Differential Revision: http://reviews.llvm.org/D5201



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218822 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-10-01 21:20:06 +00:00