Commit Graph

78812 Commits

Author SHA1 Message Date
Chad Rosier
14d622dce6 Fix comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146109 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-08 00:11:31 +00:00
Peter Collingbourne
d40e103ea5 EngineBuilder: support for custom TargetOptions. Fixes the
ExceptionDemo example.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146108 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 23:58:57 +00:00
Chad Rosier
0c89f7fda2 Fix comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146107 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 23:57:55 +00:00
Jim Grosbach
af4edea67b ARM assembly, allow 'asl' as a synonym for 'lsl' in shifted-register operands.
For 'gas' compatibility.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146106 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 23:40:58 +00:00
Akira Hatanaka
08a7d92da6 Modify class ReadHardware and add definition of 64-bit version of instruction
RDHWR. 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146101 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 23:31:26 +00:00
Akira Hatanaka
f99c1e5a19 Add newline.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146100 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 23:26:03 +00:00
Akira Hatanaka
be7b67368c Add 64-bit HWR29 register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146099 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 23:23:52 +00:00
Akira Hatanaka
da86fa14f0 32 to 64-bit anyext pattern.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146097 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 23:21:19 +00:00
Akira Hatanaka
0a18cdc372 32 to 64-bit zext pattern.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146096 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 23:14:41 +00:00
Jim Grosbach
9fa0a743e6 ARM two-operand aliases for VAND/VEOR/VORR instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146095 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 23:08:12 +00:00
Jim Grosbach
30a264eb7f ARM two-operand aliases for VADDW instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146093 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 23:01:10 +00:00
Jim Grosbach
d900441e13 ARM two-operand aliases for VADD instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146091 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 22:52:54 +00:00
Chad Rosier
32c5981005 Flesh out a bit more of the bitcode use-list ordering preservation code.
Nothing too interesting at this point, but comments are welcome.
Part of rdar://9860654 and PR5680.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146090 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 22:49:05 +00:00
Bruno Cardoso Lopes
d1bcf0dbc1 Variable cleanup. Based on past patch submittals variable names have
been normalized and more descriptive comments added. Patch by Reed
Kotler and Jack Carter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146088 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 22:35:30 +00:00
Eli Friedman
0e6307f642 Make sure we correctly set LiveRegGens when a call is unscheduled. <rdar://problem/10460321>. No testcase because this is very sensitive to scheduling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146087 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 22:24:28 +00:00
Akira Hatanaka
2c78be01f6 64-bit WrapperPICPat patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146086 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 22:11:43 +00:00
Daniel Dunbar
d45162be31 configure: Don't warn about compiler-rt checked out into projects/.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146084 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 22:07:03 +00:00
Eli Friedman
30c44e18bf Fix an assertion in the scheduler. PR11386. No testcase included because it's rather delicate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146083 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 22:06:02 +00:00
Akira Hatanaka
20aa12ae5c Define base class for WrapperPICPat.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146081 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 21:54:54 +00:00
Akira Hatanaka
7398bf01c2 Modify LowerFCOPYSIGN to handle Mips64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146080 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 21:48:50 +00:00
Chad Rosier
837b4e4a44 Update bcanalyzer to handle new USELIST_BLOCK/USELIST_CODE_ENTRY.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146079 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 21:45:13 +00:00
Chad Rosier
cbbb09687f Begin adding experimental support for preserving use-list ordering of bitcode
files.  First, add a new block USELIST_BLOCK to the bitcode format.  This is 
where USELIST_CODE_ENTRYs will be stored.  The format of the USELIST_CODE_ENTRYs
have not yet been defined.  Add support in the BitcodeReader for parsing the
USELIST_BLOCK.
Part of rdar://9860654 and PR5680.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146078 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 21:44:12 +00:00
Nick Lewycky
e77ae2d692 These global variables aren't thread-safe, STATISTIC is. Andy Trick tells me
that he isn't using these any more, so just delete them.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146076 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 21:35:59 +00:00
Duncan Sands
6de29c5715 Have cmake build llvm-cov. Patch by arrowdodger.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146071 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 20:54:41 +00:00
Chad Rosier
4e6c03fc3d ValueEnumerator - debug dump().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146070 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 20:44:46 +00:00
Akira Hatanaka
bd15090aa2 Fix comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146063 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 20:15:01 +00:00
Akira Hatanaka
3bdc03a592 Fix comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146062 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 20:13:53 +00:00
Akira Hatanaka
4d0eb637f0 Fix 64-bit immediate patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146059 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 20:10:24 +00:00
Jim Grosbach
4f66a050a2 Nuke inadvertant debugging commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146057 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 19:56:16 +00:00
Jim Grosbach
577b09155f Darwin assembler improved relocs when w/o subsections_via_symbols.
When the file isn't being built with subsections-via-symbols, symbol
differences involving non-local symbols can be resolved more aggressively.
Needed for gas compatibility.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146054 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 19:46:59 +00:00
Jakub Staszak
feb468ab24 Remove unneeded semicolon.
Skip two looking up at BlockChain.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146053 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 19:46:10 +00:00
Jim Grosbach
8524bca750 Thumb2 alias for long-form pop and friends.
rdar://10542474

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146046 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 18:32:28 +00:00
Bill Wendling
996ff1469f Also pass in correct initializer here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146044 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 18:18:11 +00:00
Jim Grosbach
9a70df99ca ARM support the .arm and .thumb directives for assembly mode switching.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146042 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 18:04:19 +00:00
Bill Wendling
465becf481 Correct initializer in example.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146041 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 18:02:44 +00:00
Jim Grosbach
470855b24f ARM NEON VCLT(register) is a pseudo aliasing VCGT(register).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146039 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 17:51:15 +00:00
Jim Grosbach
d552a644be Tidy up. Move MachO tests to MachO directory.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146038 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 17:50:28 +00:00
Duncan Sands
0ea3a0c236 Remove unused include.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146037 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 17:18:31 +00:00
Duncan Sands
a3e585d4c2 When doing "opt -O2" verify the bitcode like is done for
"opt -std-compile-opts".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146036 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 17:14:20 +00:00
Craig Topper
d802326335 Fix a bunch of SSE/AVX patterns to use proper memop types. In particular, not using integer loads other than v2i64/v4i64 since the others are all promoted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146031 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 08:30:53 +00:00
Bill Wendling
b3ec329c14 Adjust the stack by one pointer size for all frameless stacks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146030 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 07:58:55 +00:00
Bill Wendling
c61751373a Fix off-by-one error when encoding the stack size for a frameless stack.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146029 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 07:49:49 +00:00
Evan Cheng
5a96b3dad2 Add bundle aware API for querying instruction properties and switch the code
generator to it. For non-bundle instructions, these behave exactly the same
as the MC layer API.

For properties like mayLoad / mayStore, look into the bundle and if any of the
bundled instructions has the property it would return true.
For properties like isPredicable, only return true if *all* of the bundled
instructions have the property.
For properties like canFoldAsLoad, isCompare, conservatively return false for
bundles.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146026 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 07:15:52 +00:00
David Blaikie
5729c5848c Adding missing anchor to DATDeltaAlgorithm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146025 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 06:44:23 +00:00
Hal Finkel
234bb38d6c make CR spill and restore 64-bit clean (no functional change), and fix some other problems found with -verify-machineinstrs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146024 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 06:34:06 +00:00
Hal Finkel
6d0e014b1f make base register selection used in eliminateFrameIndex 64-bit clean
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146023 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 06:34:02 +00:00
Hal Finkel
ae37cd0a37 set mayStore and mayLoad on CR pseudos
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146022 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 06:33:57 +00:00
Hal Finkel
7ad6b7d359 64-bit LR8 load should use X11 not R11
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146021 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 06:32:37 +00:00
Jakob Stoklund Olesen
2fe71c5ef4 Eliminate delta argument from AdjustBBOffsetsAfter.
The block offset can be computed from the previous block. That is more
robust than keeping track of a delta.

Eliminate one redundant AdjustBBOffsetsAfter call.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146018 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 05:17:30 +00:00
Jakob Stoklund Olesen
a26811ec83 Compute some alignment information for each basic block.
These fields are not used for anything yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146017 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 04:17:35 +00:00