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b12a754cce
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46017 Commits

Author SHA1 Message Date
Andrew Trick
b12a754cce Added isValidRewrite() to check the result of ScalarEvolutionExpander. 
SCEV may generate expressions composed of multiple pointers, which can
lead to invalid GEP expansion. Until we can teach SCEV to follow strict
pointer rules, make sure no bad GEPs creep into IR.
Fixes rdar://problem/9038671.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127839 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-17 23:51:11 +00:00
Andrew Trick
ead71d59a7 whitespace 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127837 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-17 23:46:48 +00:00
Rafael Espindola
9916d2ac39 Use RequiresNullTerminator to create buffers without a null terminator 
instead of copying.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127835 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-17 22:18:42 +00:00
Devang Patel
813c9a0f19 Try to not lose variable's debug info during instcombine. 
This is done by lowering dbg.declare intrinsic into dbg.value intrinsic.
Radar 9143931.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127834 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-17 22:18:16 +00:00
Johnny Chen
e68d8ec252 It used to be that t_addrmode_s4 was used for both: 
o A8.6.195 STR (register) -- Encoding T1
o A8.6.193 STR (immediate, Thumb) -- Encoding T1

It has been changed so that now they use different addressing modes
and thus different MC representation (Operand Infos).  Modify the
disassembler to reflect the change, and add relevant tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127833 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-17 22:04:05 +00:00
Devang Patel
5ee20680c7 Refactor into a separate utility function. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127832 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-17 21:58:19 +00:00
Benjamin Kramer
1c10b8de46 BuildUDIV: If the divisor is even we can simplify the fixup of the multiplied value by introducing an early shift. 
This allows us to compile "unsigned foo(unsigned x) { return x/28; }" into
	shrl	$2, %edi
	imulq	$613566757, %rdi, %rax
	shrq	$32, %rax
	ret

instead of
	movl    %edi, %eax
	imulq   $613566757, %rax, %rcx
	shrq    $32, %rcx
	subl    %ecx, %eax
	shrl    %eax
	addl    %ecx, %eax
	shrl    $4, %eax

on x86_64

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127829 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-17 20:39:14 +00:00
Benjamin Kramer
d9103df51b Add an argument to APInt's magic udiv calculation to specify the number of bits that are known zero in the divided number. 
This will come in handy soon.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127828 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-17 20:39:06 +00:00
Jakob Stoklund Olesen
6a3dbd3b25 Dead code elimination may separate the live interval into multiple connected components. 
I have convinced myself that it can only happen when a phi value dies. When it
happens, allocate new virtual registers for the components.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127827 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-17 20:37:07 +00:00
Richard Osborne
11bd0784d9 Add XCore intrinsic for setpsc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127821 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-17 18:42:05 +00:00
Daniel Dunbar
8d06ffca9b MC/Mach-O: Fix regression introduced in r126127, this assignment shouldn't have 
been removed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127812 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-17 16:25:24 +00:00
Cameron Zwarich
7bbf0ee97c Move more logic into getTypeForExtArgOrReturn. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127809 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-17 14:53:37 +00:00
Cameron Zwarich
4457968011 Rename getTypeForExtendedInteger() to getTypeForExtArgOrReturn(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127807 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-17 14:21:56 +00:00
Nick Lewycky
1ace169c3d Add comments for the demanglings. Correct mangled form of operator delete! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127801 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-17 05:20:12 +00:00
Nick Lewycky
e27fa74d5f Add "swi" which is an obsolete mnemonic for "svc". 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127788 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-17 01:46:14 +00:00
Eli Friedman
3d831381a9 A couple new README entries. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127786 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-17 01:22:09 +00:00
Joerg Sonnenberger
d02c8b6cc1 Fix handling of @IDNTPOFF relocations, they need to get STT_TLS. 
While here, add VK_ARM_TPOFF and VK_ARM_GOTTPOFF, too.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127780 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-17 00:35:10 +00:00
Jakob Stoklund Olesen
2254227791 Rewrite instructions as part of ConnectedVNInfoEqClasses::Distribute. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127779 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-17 00:23:45 +00:00
Jakob Stoklund Olesen
1d5b845081 Add a LiveRangeEdit delegate callback before shrinking a live range. 
The register allocator needs to adjust its live interval unions when that happens.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127774 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-16 22:56:16 +00:00
Jakob Stoklund Olesen
cc5c4296fd Erase virtual registers that are unused after DCE. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127773 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-16 22:56:13 +00:00
Jakob Stoklund Olesen
2926733240 Tag cached interference with a user-provided tag instead of the virtual register number. 
The live range of a virtual register may change which invalidates the cached
interference information.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127772 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-16 22:56:11 +00:00
Jakob Stoklund Olesen
c46570dc05 Clarify debugging output. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127771 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-16 22:56:08 +00:00
Cameron Zwarich
ebe8173941 The x86-64 ABI says that a bool is only guaranteed to be sign-extended to a byte 
rather than an int. Thankfully, this only causes LLVM to miss optimizations, not
generate incorrect code.

This just fixes the zext at the return. We still insert an i32 ZextAssert when
reading a function's arguments, but it is followed by a truncate and another i8
ZextAssert so it is not optimized.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127766 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-16 22:20:18 +00:00
Cameron Zwarich
8df6bf5f5c Don't recompute something that we already have in a local variable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127764 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-16 22:20:07 +00:00
Daniel Dunbar
83320a023c Revert r127757, "Patch to a fix dwarf relocation problem on ARM. One-line fix 
plus the test where it used to break.", which broke Clang self-host of a
Debug+Asserts compiler, on OS X.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127763 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-16 22:16:39 +00:00
Richard Osborne
e17139b3e9 Add XCore intrinsics for setclk, setrdy. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127761 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-16 21:56:00 +00:00
Renato Golin
2589d0aedf Patch to a fix dwarf relocation problem on ARM. One-line fix plus the test where it used to break. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127757 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-16 21:05:52 +00:00
Richard Osborne
bb057453db Add checkevent intrinsic to check if any resources owned by the current thread 
can event.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127741 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-16 18:34:00 +00:00
Cameron Zwarich
1bcdb6ffad Fix a comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127728 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-16 08:13:42 +00:00
NAKAMURA Takumi
7a7215b563 lib/Support/raw_ostream.cpp: On mingw, report_fatal_error() should not be called at dtor context. 
report_fatal_error() invokes exit(). We know report_fatal_error() might not write messages to stderr when any errors were detected on FD == 2.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127726 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-16 02:53:39 +00:00
NAKAMURA Takumi
bab2d49d4a Windows/PathV2.inc: [PR8520] Recognize "NUL" as special (character) file. 
FIXME: It is a temporal hack. We should detect as many "special file name" as possible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127724 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-16 02:53:32 +00:00
NAKAMURA Takumi
bfb25cd97c Windows/Path.inc: [PR6270] PathV1::makeUnique(): Give arbitrary initial seed for workaround. 
FIXME: We should use sys::fs::unique_file() in future.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127723 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-16 02:53:24 +00:00
Jim Grosbach
124d0332db Tidy up. Whitespace and 80 column. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127721 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-16 01:21:55 +00:00
Devang Patel
ed4edf9e5f Do not accidently initialize NumDbgValueLost and NumDbgLineLost counts. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127720 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-16 00:27:57 +00:00
Cameron Zwarich
85b0f468cf Only convert allocas to scalars if it is profitable. The profitability metric I 
chose is having a non-memcpy/memset use and being larger than any native integer
type. Originally I chose having an access of a size smaller than the total size
of the alloca, but this caused some minor issues on the spirit benchmark where
SRoA runs again after some inlining.

This fixes <rdar://problem/8613163>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127718 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-16 00:13:44 +00:00
Cameron Zwarich
deac268f89 Better use initializer lists. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127716 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-16 00:13:37 +00:00
Cameron Zwarich
d4c9c3e6b9 Add a clarifying comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127715 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-16 00:13:35 +00:00
Johnny Chen
276f6f9cf9 There were two issues fixed: 
1. The ARM Darwin *r9 call instructions were pseudo-ized recently.
   Modify the ARMDisassemblerCore.cpp file to accomodate the change.

2. The disassembler was unnecessarily adding 8 to the sign-extended imm24:

   imm32 = SignExtend(imm24:'00', 32); // A8.6.23 BL, BLX (immediate)
                                       // Encoding A1

   It has no business doing such.  Removed the offending logic.

Add test cases to arm-tests.txt.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127707 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-15 22:27:33 +00:00
John Thompson
6046cffbaf Add scei vendor 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127705 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-15 21:51:56 +00:00
Bill Wendling
0d4c9d94f6 The VTBL (and VTBX) instructions are rather permissive concerning the masks they 
accept. If a value in the mask is out of range, it uses the value 0, for VTBL,
or leaves the value unchanged, for VTBX.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127700 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-15 21:15:20 +00:00
Jakob Stoklund Olesen
13ba2527f7 Trace back through sibling copies to hoist spills and find rematerializable defs. 
After live range splitting, an original value may be available in multiple
registers. Tracing back through the registers containing the same value, find
the best place to insert a spill, determine if the value has already been
spilled, or discover a reaching def that may be rematerialized.

This is only the analysis part. The information is not used for anything yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127698 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-15 21:13:25 +00:00
Jakob Stoklund Olesen
29ef87599c Preserve both isPHIDef and isDefByCopy bits when copying parent values. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127697 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-15 21:13:22 +00:00
Bill Wendling
a24cb40be2 Some minor cleanups based on feedback. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127694 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-15 20:47:26 +00:00
Jim Grosbach
4f9fc854bc Trailing whitespae. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127691 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-15 20:25:54 +00:00
Cameron Zwarich
6e51c6ad9d Clean up something noticed by Fritz. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127684 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-15 18:42:33 +00:00
Evan Cheng
0191952296 Do not form thumb2 ldrd / strd if the offset is by multiple of 4. rdar://9133587 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127683 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-15 18:41:52 +00:00
Richard Osborne
59f727e57e Don't indent cases in a switch, no functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127681 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-15 15:55:30 +00:00
Richard Osborne
8ae8cf4559 On the XCore the scavenging slot should be closest to the SP. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127680 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-15 15:10:11 +00:00
Richard Osborne
5aad8b3e78 Add XCore intrinsics for getps, setps, setsr and clrsr. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127678 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-15 13:45:47 +00:00
Justin Holewinski
625eec10fe PTX: Set PTX 2.0 as the minimum supported version 
- Remove PTX 1.4 code generation
- Change type of intrinsics to .v4.i32 instead of .v4.i16
- Add and/or/xor integer instructions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127677 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-15 13:24:15 +00:00