David Majnemer
f9ec8fe70c
MS asm: Properly handle quoted symbol names
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We would get confused by '@' characters in symbol names, we would
mistake the text following them for the variant kind.
When an identifier a string, the variant kind will never show up inside
of it. Instead, check to see if there is a variant following the
string.
This fixes PR19965.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211249 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-19 01:25:43 +00:00
Reid Kleckner
4e43e1e686
MC: Fix Intel assembly parser for [global + offset]
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We were dropping the displacement on the floor if we also had some
immediate offset.
Should fix PR19033.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202774 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-04 00:33:17 +00:00
Craig Topper
50a2b1672d
Teach x86 asm parser to handle 'opaque ptr' in Intel syntax.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199477 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-17 07:44:10 +00:00
Craig Topper
5d59bb44ee
Fix intel syntax for 64-bit version of FXSAVE/FXRSTOR to use '64' suffix instead of 'q'
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199474 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-17 07:25:39 +00:00
Yunzhong Gao
d7f5fac111
Fixing Intel format of the vshufpd instruction.
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Phabricator code review is located at: http://llvm-reviews.chandlerc.com/D1759
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191481 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-27 01:44:23 +00:00
David Majnemer
7cde9d0286
[ms-inline asm] Support offsets after segment registers
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Summary: MASM let's you do stuff like 'MOV FS:20, EAX' and 'MOV EAX, FS:20'
Reviewers: craig.topper, rnk
Reviewed By: rnk
CC: llvm-commits
Differential Revision: http://llvm-reviews.chandlerc.com/D1470
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189407 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-27 21:56:17 +00:00
Craig Topper
6ee1464ba5
Add test cases for the various instruction alias and Intel syntax fixes that have gone in lately.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187188 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-26 05:39:33 +00:00
Benjamin Kramer
19b30d56b2
X86: Make the cmov aliases work with intel syntax too.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183907 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-13 15:45:24 +00:00
Chad Rosier
a70d02ff28
[x86AsmParser] It's valid to stop parsing an operand at an immediate.
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rdar://13854369 and PR15944
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181564 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-09 23:48:53 +00:00
Chad Rosier
f74d82d8e4
Add test case for PR15779, which has previously been fixed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180058 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-22 22:30:01 +00:00
Chad Rosier
3f1f9c3798
[ms-inline asm] Apply the condition code mnemonic aliases to both the Intel and
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AT&T dialect. Test case for r179804 as well.
rdar://13674398 and PR13340.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179813 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18 23:16:12 +00:00
Chad Rosier
d58f773b96
[ms-inline asm] Add support for the minus unary operator. Previously, we were
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unable to handle cases such as __asm mov eax, 8*-8.
This patch also attempts to simplify the state machine. Further, the error
reporting has been improved. Test cases included, but more will be added to
the clang side shortly.
rdar://13668445
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179719 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17 21:01:45 +00:00
Chad Rosier
e112453fc3
[ms-inline asm] Add support for numeric displacement expressions in bracketed
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memory operands.
Essentially, this layers an infix calculator on top of the parsing state
machine. The scale on the index register is still expected to be an immediate
__asm mov eax, [eax + ebx*4]
and will not work with more complex expressions. For example,
__asm mov eax, [eax + ebx*(2*2)]
The plus and minus binary operators assume the numeric value of a register is
zero so as to not change the displacement. Register operands should never
be an operand for a multiply or divide operation; the scale*indexreg
expression is always replaced with a zero on the operand stack to prevent
such a case.
rdar://13521380
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178881 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-05 16:28:55 +00:00
Chad Rosier
dd2e895022
[ms-inline asm] Extend support for parsing Intel bracketed memory operands that
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have an arbitrary ordering of the base register, index register and displacement.
rdar://12527141
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172484 91177308-0d34-0410-b5e6-96231b3b80d8
2013-01-14 22:31:35 +00:00
Craig Topper
75dc33a60b
Make x86 asm parser to check for xmm vs ymm for index register in gather instructions. Also fix Intel syntax for gather instructions to use 'DWORD PTR' or 'QWORD PTR' to match gas.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160420 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-18 04:11:12 +00:00
Devang Patel
a28101e61a
Intel Syntax: Parse mem operand with seg reg. QWORD PTR FS:[320]
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149142 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-27 19:48:28 +00:00
Devang Patel
f2d213745e
Intel syntax: Robustify parsing of memory operand's displacement experssion.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148737 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-23 22:35:25 +00:00
Devang Patel
3e08131185
Intel syntax: Parse memory operand with empty base reg, e.g. DWORD PTR [4*RDI]
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148721 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-23 20:20:06 +00:00
Devang Patel
7c64fe651a
Intel syntax: Parse segment registers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148712 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-23 18:31:58 +00:00
Devang Patel
1aea430b88
Intel syntax: Robustify register parsing.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148591 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-20 22:32:05 +00:00
Devang Patel
b8ba13f009
Process instructions after match to select alternative encoding which may be more desirable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148431 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-18 22:42:29 +00:00
Devang Patel
2f8af1d643
Intel syntax: Fix parser match class to check memory operand size.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148338 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-17 21:48:03 +00:00
Devang Patel
6220fea2a8
Intel syntax: Parse "BYTE PTR [RDX + RCX]"
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148334 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-17 21:25:10 +00:00
Devang Patel
9a3d293cf3
Intel syntax: Do not unncessarily create plus expression for memory operand displacement.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148321 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-17 19:08:07 +00:00
Devang Patel
40bced0306
Intel syntax: Ignore mnemonic aliases.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148316 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-17 18:30:45 +00:00
Devang Patel
d37ad247cc
Intel syntax: Robustify memory operand parsing.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148312 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-17 18:00:18 +00:00
Devang Patel
4a5c0fd70e
Add new test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148128 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-13 18:45:31 +00:00