Commit Graph

30847 Commits

Author SHA1 Message Date
Reid Kleckner
b4eeb6bca5 [WinEH] Make sure LSDA tables are 4 byte aligned
Apparently this is important, otherwise _except_handler3 assumes that
the registration node is corrupted and ignores it.

Also fix a bug in WinEHPrepare where we would insert code after a
terminator instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241877 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-10 00:08:49 +00:00
Sanjay Patel
c68ccc1a70 [x86] enable machine combiner reassociations for scalar double-precision multiplies
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241873 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-09 22:58:39 +00:00
Sanjay Patel
39f09b5150 [x86] enable machine combiner reassociations for scalar double-precision adds
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241871 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-09 22:48:54 +00:00
Michael J. Spencer
8109763d68 [Object][ELF] Support dumping hash-tables from files with no section table.
This time without breaking the bots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241869 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-09 22:32:24 +00:00
Alex Lorenz
ad6702ec23 MIR Serialization: Serialize the virtual register definitions.
The virtual registers are serialized using a YAML sequence of YAML inline
mappings. Each mapping has the id of the virtual register and the register
class.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10981


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241868 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-09 22:23:13 +00:00
Reid Kleckner
5cf6c0b070 [WinEH] Give up on using CSRs across 32-bit invokes for now
The runtime does not restore CSRs when transferring control back to the
function handling the exception. According to the experts on IRC, LLVM's
register allocator has no way to model register clobbers that only
happen on one edge of the CFG. For now, don't worry about trying to use
the meager three CSRs available on 32-bit X86 and just say that such
invokes preserve nothing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241865 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-09 22:09:41 +00:00
Alex Lorenz
ccba68af82 MIR Parser: Report an error when parsing machine function with an empty body.
This commit adds a new error which is reported when the MIR Parser encounters
a machine function without any machine basic blocks. The machine verifier
expects that the machine functions have at least one MBB, and this error will
prevent machine functions without MBBs from reaching the machine verifier and
crashing with an assertion.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241862 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-09 21:21:33 +00:00
Sanjoy Das
a5a3e2d58a [ImplicitNullChecks] Be smarter in picking the memory op.
Summary:
Before this change ImplicitNullChecks would only pick loads of the form:

```
   test Reg, Reg
   jz elsewhere
 fallthrough:
   movl 32(Reg), Reg2
```

but not (say)

```
   test Reg, Reg
   jz elsewhere
 fallthrough:
   inc Reg3
   movl 32(Reg), Reg2
```

This change teaches ImplicitNullChecks to look through "unrelated"
instructions like `inc Reg3` when searching for a load instruction
to convert to a trapping load.

Reviewers: atrick, JosephTremoulet, reames

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11044

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241850 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-09 20:13:25 +00:00
Rafael Espindola
377796abdf Create BSD archives by default on OS X.
They should probably be created on anything that is not windows or linux, but I will
test on freebsd before changing that.

With this it is possible to bootstrap with llvm-ar instead of ar+ranlib on OS X.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241849 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-09 20:12:50 +00:00
Alex Lorenz
7c6ad33126 MIR Serialization: Serialize the simple MachineFrameInfo attributes.
This commit serializes the 13 scalar boolean and integer attributes from the
MachineFrameInfo class: IsFrameAddressTaken, IsReturnAddressTaken, HasStackMap,
HasPatchPoint, StackSize, OffsetAdjustment, MaxAlignment, AdjustsStack,
HasCalls, MaxCallFrameSize, HasOpaqueSPAdjustment, HasVAStart, and
HasMustTailInVarArgFunc. These attributes are serialized as part
of the frameInfo YAML mapping, which itself is a part of the machine function's
YAML mapping.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241844 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-09 19:55:27 +00:00
Rafael Espindola
7255090cd3 llvm-ar: Pad the symbol table to 4 bytes.
It looks like ld64 requires it. With this we seem to be able to bootstrap using
llvm-ar+/usr/bin/true instead of ar+ranlib (currently on stage2).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241842 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-09 19:48:06 +00:00
Sanjoy Das
4db527032a [IndVars] Try to use existing values in RewriteLoopExitValues.
Summary:
In RewriteLoopExitValues, before expanding out an SCEV expression using
SCEVExpander, try to see if an existing LLVM IR expression already
computes the value we're interested in.  If so use that existing
expression.

Apart from reducing IndVars' reliance on the rest of the compilation
pipeline, this also prevents IndVars from concluding some expressions as
"high cost" when they're not.  For instance,
`InductiveRangeCheckElimination` often emits code of the following form:

```
len = umin(len_A, len_B)

loop:
  ...
  if (i++ < len)
    goto loop

outside_loop:
    use(i)
```

`SCEVExpander` refuses to rewrite the use of `i` in `outside_loop`,
since it thinks the value of `i` on loop exit, `len`, is a high cost
expansion since it contains an `umax` in it.  With this change,
`IndVars` can see that it can re-use `len` instead of creating a new
expression to compute `umin(len_A, len_B)`.

I considered putting this cleverness in `SCEVExpander`, but I was
worried that it may then have a deterimental effect on other passes
that use it.  So I decided it was better to just do this in the one
place where it seems like an obviously good idea, with the intent of
generalizing later if needed.

Reviewers: atrick, reames

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10782

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241838 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-09 18:46:12 +00:00
Simon Atanasyan
13c5e09c6e [llvm-readobj] Print MIPS PLT table
Now the -mips-plt-got prints both MIPS GOT and PLT tables.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241836 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-09 18:23:10 +00:00
Simon Atanasyan
ba8d948e93 [yaml2obj] Initialize sh_addralign field for the .symtab section
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241835 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-09 18:23:02 +00:00
Simon Atanasyan
085d10b151 [ELF] Explicitly configure sections alignment in the tests. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241834 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-09 18:22:55 +00:00
David Majnemer
f2c71ff7a8 [llvm-objdump] Require that jump targets shown in -d are functions
Don't let the disassembler pick call <.text> if a function happens to
live at the start of the section by only using function symbols.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241830 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-09 18:11:40 +00:00
Pat Gavlin
db5a82b861 Allow {e,r}bp as the target of {read,write}_register.
This patch allows the read_register and write_register intrinsics to
read/write the RBP/EBP registers on X86 iff the targeted register is
the frame pointer for the containing function.

Differential Revision: http://reviews.llvm.org/D10977

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241827 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-09 17:40:29 +00:00
Sanjay Patel
dc219dddde fix an invisible bug when combining repeated FP divisors
This patch fixes bugs that were exposed by the addition of fast-math-flags in the DAG:
r237046 ( http://reviews.llvm.org/rL237046 ):

1. When replacing a division node, it's not enough to RAUW.
   We should call CombineTo() to delete dead nodes and combine again.
2. Because we are changing the DAG, we can't return an empty SDValue
   after the transform. As the code comments say:

    Visitation implementation - Implement dag node combining for different node types.
    The semantics are as follows: Return Value:
      SDValue.getNode() == 0 - No change was made
      SDValue.getNode() == N - N was replaced, is dead and has been handled.
      otherwise - N should be replaced by the returned Operand.

The new test case shows no difference with or without this patch, but it will crash if
we re-apply r237046 or enable FMF via the current -enable-fmf-dag cl::opt.

Differential Revision: http://reviews.llvm.org/D9893



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241826 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-09 17:28:37 +00:00
Silviu Baranga
c0970bdc63 Add a test of a regression discovered during testing of r241673
Summary:
We were missing a corner case where DepCands was not available,
but we were using DepCands to compute the checking pointer
groups.

This adds a test for that regression.

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11068

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241818 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-09 16:40:25 +00:00
Rafael Espindola
c9799867af Add missing file from previous commit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241815 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-09 15:58:22 +00:00
Rafael Espindola
a55816b3fc Basic support for BSD symbol tables in archives.
This could be optimized and for now we only produce __.SYMDEF
and not "__.SYMDEF SORTED".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241814 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-09 15:56:23 +00:00
Silviu Baranga
f283cd9acf Don't rely on the DepCands iteration order when constructing checking pointer groups
Summary:
The checking pointer group construction algorithm relied on the iteration on DepCands.
We would need the same leaders across runs and the same iteration order over the underlying std::set for determinism.

This changes the algorithm to process the pointers in the order in which they were added to the runtime check, which is deterministic.
We need to update the tests, since the order in which pointers appear has changed.

No new tests were added, since it is impossible to test for non-determinism.

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11064

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241809 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-09 15:18:25 +00:00
Pawel Bylica
dbbfabaf01 Reapply fixed r241790: Fix shift legalization and lowering for big constants.
Summary: If shift amount is a constant value > 64 bit it is handled incorrectly during type legalization and X86 lowering. This patch the type of shift amount argument in function DAGTypeLegalizer::ExpandShiftByConstant from unsigned to APInt.

Reviewers: nadav, majnemer, sanjoy, RKSimon

Subscribers: RKSimon, llvm-commits

Differential Revision: http://reviews.llvm.org/D10767

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241806 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-09 14:58:04 +00:00
Krzysztof Parzyszek
b13f72aa2d [Hexagon] Add support for atomic RMW operations
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241804 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-09 14:51:21 +00:00
Arnaud A. de Grandmaison
86d3dfce62 [AArch64] Select SBFIZ or UBFIZ instead of left + right shifts
And rename LSB to Immr / MSB to Imms to match the ARM ARM terminology.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241803 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-09 14:33:38 +00:00
Scott Douglass
0e714c7efa [ARM] Thumb1 3 to 2 operand convertion for commutative operations
Differential Revision: http://reviews.llvm.org/D11057

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241802 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-09 14:13:55 +00:00
Scott Douglass
7b8defda79 [ARM] Don't be overzealous converting Thumb1 3 to 2 operands
Differential Revision: http://reviews.llvm.org/D11056

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241801 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-09 14:13:48 +00:00
Scott Douglass
3ca1884ba8 [ARM] Add Thumb2 ADD with PC narrowing from 3 operand to 2
Differential Revision: http://reviews.llvm.org/D11055

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241800 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-09 14:13:41 +00:00
Scott Douglass
ab17c04abe [ARM] Refactor converting Thumb1 from 3 to 2 operand (nfc)
Also adds some test cases.

Differential Revision: http://reviews.llvm.org/D11054

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241799 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-09 14:13:34 +00:00
Scott Douglass
c221d448c7 [ARM] Add ADD tests for Thumb2 narrowing (nfc)
Differential Revision: http://reviews.llvm.org/D11053

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241798 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-09 14:13:22 +00:00
Renato Golin
b2d2f28221 Test for 241794 (nest attribute in AArch64)
Forgot to git add the test.

Patch by Stephen Cross.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241797 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-09 13:29:35 +00:00
Pawel Bylica
b0205f5937 Revert r241790: Fix shift legalization and lowering for big constants.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241792 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-09 09:50:54 +00:00
Pawel Bylica
71386b0e04 Fix shift legalization and lowering for big constants.
Summary: If shift amount is a constant value > 64 bit it is handled incorrectly during type legalization and X86 lowering. This patch the type of shift amount argument in function DAGTypeLegalizer::ExpandShiftByConstant from unsigned to APInt.

Reviewers: nadav, majnemer, sanjoy, RKSimon

Subscribers: RKSimon, llvm-commits

Differential Revision: http://reviews.llvm.org/D10767

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241790 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-09 08:01:36 +00:00
Elena Demikhovsky
43afab3bdb Extended syntax of vector version of getelementptr instruction.
The justification of this change is here: http://lists.cs.uiuc.edu/pipermail/llvmdev/2015-March/082989.html

According to the current GEP syntax, vector GEP requires that each index must be a vector with the same number of elements.

%A = getelementptr i8, <4 x i8*> %ptrs, <4 x i64> %offsets

In this implementation I let each index be or vector or scalar. All vector indices must have the same number of elements. The scalar value will mean the splat vector value.

(1) %A = getelementptr i8, i8* %ptr, <4 x i64> %offsets
or
(2) %A = getelementptr i8, <4 x i8*> %ptrs, i64 %offset

In all cases the %A type is <4 x i8*>

In the case (2) we add the same offset to all pointers.

The case (1) covers C[B[i]] case, when we have the same base C and different offsets B[i].

The documentation is updated.

http://reviews.llvm.org/D10496




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241788 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-09 07:42:48 +00:00
Adrian Prantl
2efb9f7c3e Temporarily reverting 241765, 241768, and 241772 to unbreak the build bots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241781 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-09 02:14:49 +00:00
Michael J. Spencer
7d0e4c73d4 [Object][ELF] Support dumping hash-tables from files with no section table.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241765 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-09 00:21:06 +00:00
David Majnemer
b1d6ad18ba [CodeView] Add support for emitting column information
Column information is present in CodeView when the line table subsection
has bit 0 set to 1 in it's flags field.  The column information is
represented as a pair of 16-bit quantities: a starting and ending
column.  This information is present at the end of the chunk, after all
the line-PC pairs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241764 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-09 00:19:51 +00:00
Alex Lorenz
5faf25b798 MIR Serialization: Serialize the 'undef' register machine operand flag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241762 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-08 23:58:31 +00:00
Sanjay Patel
c1c43c15cc [SLPVectorizer] Try different vectorization factors for store chains
...and set max vector register size based on target 

This patch is based on discussion on the llvmdev mailing list:
http://lists.cs.uiuc.edu/pipermail/llvmdev/2015-July/087405.html

and also solves:
https://llvm.org/bugs/show_bug.cgi?id=17170

Several FIXME/TODO items are noted in comments as potential improvements.

Differential Revision: http://reviews.llvm.org/D10950



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241760 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-08 23:40:55 +00:00
Adam Nemet
7a6f54545f [LAA] Revert a small part of r239295
This commit ([LAA] Fix estimation of number of memchecks) regressed the
logic a bit.  We shouldn't quit the analysis if we encounter a pointer
without known bounds *unless* we actually need to emit a memcheck for
it.

The original code was using NumComparisons which is now computed
differently.  Instead I compute NeedRTCheck from NumReadPtrChecks and
NumWritePtrChecks.

As side note, I find the separation of NeedRTCheck and CanDoRT
confusing, so I will try to merge them in a follow-up patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241756 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-08 22:58:48 +00:00
Sanjay Patel
f769239c19 [x86] enable machine combiner reassociations for scalar single-precision multiplies
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241752 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-08 22:35:20 +00:00
Rafael Espindola
a04933edc1 Don't reject an archive with just a symbol table.
It is pretty unambiguous how to interpret it and gnu ar accepts it too.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241750 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-08 22:27:54 +00:00
Eli Bendersky
35e18726d9 Add tests for the NVPTXLowerAggrCopies pass.
Note: not testing memmove lowering for now, as it's broken
[see https://llvm.org/bugs/show_bug.cgi?id=24056]



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241736 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-08 21:29:28 +00:00
Alex Lorenz
03dcd3c6ef MIR Serialization: Serialize the 'killed' register machine operand flag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241734 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-08 21:23:34 +00:00
Simon Pilgrim
544fa8040b [X86][SSE] Vector shift test cleanup. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241730 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-08 21:11:17 +00:00
Reid Kleckner
f8d3677531 [Win64] Only treat some functions as having the Win64 convention
All the usual X86 target-specific conventions are collapsed to the
normal Win64 convention, but the custom conventions like GHC and webkit
should not be.

Previously we would assume that the caller allocated 32 bytes of shadow
space for us, which is not how webkit_jscc or other custom conventions
are supposed to work.

Based on a patch by peavo@outlook.com.

Fixes PR24051.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241725 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-08 21:03:47 +00:00
Rafael Espindola
b13e877e27 Start adding support for writing archives in BSD format.
No support for the symbol table yet (but will hopefully add it today).
We always use the long filename format so that we can align the member,
which is an advantage of the BSD format.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241721 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-08 20:47:32 +00:00
Alex Lorenz
31512fe6ce MIR Parser: Use source locations for MBB naming errors.
This commit changes the type of the field 'Name' in the struct
'yaml::MachineBasicBlock' from 'std::string' to 'yaml::StringValue'. This change
allows the MIR parser to report errors related to the MBB name with the proper
source locations.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241718 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-08 20:22:20 +00:00
Krzysztof Parzyszek
a307401165 [Hexagon] Implement commoning of GetElementPtr instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241714 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-08 19:22:28 +00:00
Peter Collingbourne
c783eb28f7 LibDriver: Fix output path inference.
The inferred output file name is based on the first input file, not the
first one with extension .obj. The output file was also being written to
the wrong directory; it needs to be written to whichever directory on the
libpath it was found in. This change fixes both issues.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241710 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-08 19:00:46 +00:00