Commit Graph

8207 Commits

Author SHA1 Message Date
45b22fa9f1 Implement codegen for flt_rounds on x86
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44183 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-16 01:31:51 +00:00
e40740bd8c Oops. Debugging code shouldn't have been checked in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44128 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-14 19:08:32 +00:00
9de1934099 Fix PIC jump table codegen on x86-32/linux. In fact, such thing should be applied
to all targets uses GOT-relative offsets for PIC (Alpha?)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44108 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-14 09:18:41 +00:00
87b665d3de Eliminate the recently introduced CCAssignToStackABISizeAlign
in favour of teaching CCAssignToStack that size 0 and/or align
0 means to use the ABI values.  This seems a neater solution.
It is safe since no legal value type has size 0.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44107 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-14 08:29:13 +00:00
c498b0281f Clean up sub-register implementation by moving subReg information back to
MachineOperand auxInfo. Previous clunky implementation uses an external map
to track sub-register uses. That works because register allocator uses
a new virtual register for each spilled use. With interval splitting (coming
soon), we may have multiple uses of the same register some of which are
of using different sub-registers from others. It's too fragile to constantly
update the information.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44104 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-14 07:59:08 +00:00
b1d40d9dd7 Revert previous; these files aren't ready to go in yet.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44057 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-13 19:16:02 +00:00
b97aec663b Add parameter to getDwarfRegNum to permit targets
to use different mappings for EH and debug info;
no functional change yet.
Fix warning in X86CodeEmitter.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44056 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-13 19:13:01 +00:00
e7c8754a52 Fix x86-64 jit: remove reliance on Dwarf numbers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44048 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-13 17:54:34 +00:00
c69107ca11 Unifacalize the CALLSEQ{START,END} stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44045 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-13 09:19:02 +00:00
0f8d9c04d9 Unify CALLSEQ_{START,END}. They take 4 parameters: the chain, two stack
adjustment fields, and an optional flag. If there is a "dynamic_stackalloc" in
the code, make sure that it's bracketed by CALLSEQ_START and CALLSEQ_END. If
not, then there is the potential for the stack to be changed while the stack's
being used by another instruction (like a call).

This can only result in tears...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44037 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-13 00:44:25 +00:00
3809fbe789 Completely forgot, that we have some debug information emission on PPC. This should fix
some regressions on ppc nightly tests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44029 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-12 23:36:13 +00:00
753a98740b Added JumpTable support
Fixed some AsmPrinter issues
Added GLOBAL_OFFSET_TABLE Node handle.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44024 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-12 19:49:57 +00:00
20ab29068d Add a flag for indirect branch instructions.
Target maintainers: please check that the instructions for your target are correctly marked.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44012 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-12 07:39:39 +00:00
2e7eedf382 Clarify the meaning of '-2' register number
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43998 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-11 19:53:50 +00:00
f191c80cd7 Use TableGen to emit information for dwarf register numbers.
This makes DwarfRegNum to accept list of numbers instead.
Added three different "flavours", but only slightly tested on x86-32/linux.
Please check another subtargets if possible,


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43997 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-11 19:50:10 +00:00
e3ef744d3e Add CCAssignToStackABISizeAlign for convenience in
dealing with types whose size & alignment are
different on different subtargets.  Use it for x86 f80.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43988 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-10 22:07:15 +00:00
38ada868f2 Update tailcall code to include inline attribute operand for memcpy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43978 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-10 10:48:01 +00:00
ed2fc71610 Unbreak x86-64 jumptable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43955 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-09 19:11:23 +00:00
b623ce9128 Silence a warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43954 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-09 19:06:14 +00:00
7a42f24f0c Revert previous rewrite per chris's comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43950 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-09 18:07:11 +00:00
cc41586b9d Much improved pic jumptable codegen:
Then:
        call    "L1$pb"
"L1$pb":
        popl    %eax
		...
LBB1_1: # entry
        imull   $4, %ecx, %ecx
        leal    LJTI1_0-"L1$pb"(%eax), %edx
        addl    LJTI1_0-"L1$pb"(%ecx,%eax), %edx
        jmpl    *%edx

        .align  2
        .set L1_0_set_3,LBB1_3-LJTI1_0
        .set L1_0_set_2,LBB1_2-LJTI1_0
        .set L1_0_set_5,LBB1_5-LJTI1_0
        .set L1_0_set_4,LBB1_4-LJTI1_0
LJTI1_0:
        .long    L1_0_set_3
        .long    L1_0_set_2

Now:
        call    "L1$pb"
"L1$pb":
        popl    %eax
		...
LBB1_1: # entry
        addl    LJTI1_0-"L1$pb"(%eax,%ecx,4), %eax
        jmpl    *%eax

		.align  2
		.set L1_0_set_3,LBB1_3-"L1$pb"
		.set L1_0_set_2,LBB1_2-"L1$pb"
		.set L1_0_set_5,LBB1_5-"L1$pb"
		.set L1_0_set_4,LBB1_4-"L1$pb"
LJTI1_0:
        .long    L1_0_set_3
        .long    L1_0_set_2


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43924 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-09 01:32:10 +00:00
3556bc1a9d Rewrite Dwarf number handling per review comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43918 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-09 00:47:10 +00:00
e0cb36b9fb [ARM] Implement __builtin_thread_pointer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43892 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-08 17:20:05 +00:00
4542edcaa7 Complete conditionalization of Dwarf reg numbers.
Would somebody not on Darwin please make sure this
doesn't break anything.  Exception handling failures
would be the most likely symptom.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43844 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-07 21:48:35 +00:00
483ec21d90 Interchange Dwarf numbers of ESP and EBP on x86 Darwin.
Much improvement in exception handling.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43794 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-07 00:25:05 +00:00
000604afd4 Better processor definition
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43749 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-06 03:15:20 +00:00
f1ba1cad38 Move the LowerMEMCPY and LowerMEMCPYCall to a common place.
Thanks for the suggestions Bill :-)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43742 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-05 23:12:20 +00:00
8699a97a2e [ARM] Fix code generation for:
static __thread struct {
    int a;
    int b;
} teste = {0, 0};



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43722 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-05 18:33:37 +00:00
db807edd66 Use movups to spill / restore SSE registers on targets where stacks alignment is
less than 16. This is a temporary solution until dynamic stack alignment is
implemented.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43703 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-05 07:30:01 +00:00
c7db5618f9 Added support for PIC code with "explicit relocations" *only*.
Removed all macro code for PIC (goodbye "la").
Support tested with shootout bench.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43697 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-05 03:02:32 +00:00
ca0ed74485 Eliminate the remaining uses of getTypeSize. This
should only effect x86 when using long double.  Now
12/16 bytes are output for long double globals (the
exact amount depends on the alignment).  This brings
globals in line with the rest of LLVM: the space
reserved for an object is now always the ABI size.
One tricky point is that only 10 bytes should be
output for long double if it is a field in a packed
struct, which is the reason for the additional
argument to EmitGlobalConstant.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43688 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-05 00:04:43 +00:00
fe6575c2bf Fix PR1761 by not printing (rip) suffix when in -static mode.
Evan, please review this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43680 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-04 19:23:28 +00:00
f4c164c2b5 Fix crash before main on ppc/linux with static constructors. PR1771
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43676 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-04 17:32:10 +00:00
03e6c7091e Fix PR1763 by allowing the 'q' constraint to work with 64-bit
regs on x86-64.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43669 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-04 06:51:12 +00:00
a9d641e574 Unbreak tailcall opt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43646 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-02 17:45:40 +00:00
253945899b add a note
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43642 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-02 17:04:20 +00:00
9df7dc52e8 Missing a getNumOperands check.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43630 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-02 01:26:22 +00:00
514ab348fd Executive summary: getTypeSize -> getTypeStoreSize / getABITypeSize.
The meaning of getTypeSize was not clear - clarifying it is important
now that we have x86 long double and arbitrary precision integers.
The issue with long double is that it requires 80 bits, and this is
not a multiple of its alignment.  This gives a primitive type for
which getTypeSize differed from getABITypeSize.  For arbitrary precision
integers it is even worse: there is the minimum number of bits needed to
hold the type (eg: 36 for an i36), the maximum number of bits that will
be overwriten when storing the type (40 bits for i36) and the ABI size
(i.e. the storage size rounded up to a multiple of the alignment; 64 bits
for i36).

This patch removes getTypeSize (not really - it is still there but
deprecated to allow for a gradual transition).  Instead there is:

(1) getTypeSizeInBits - a number of bits that suffices to hold all
values of the type.  For a primitive type, this is the minimum number
of bits.  For an i36 this is 36 bits.  For x86 long double it is 80.
This corresponds to gcc's TYPE_PRECISION.

(2) getTypeStoreSizeInBits - the maximum number of bits that is
written when storing the type (or read when reading it).  For an
i36 this is 40 bits, for an x86 long double it is 80 bits.  This
is the size alias analysis is interested in (getTypeStoreSize
returns the number of bytes).  There doesn't seem to be anything
corresponding to this in gcc.

(3) getABITypeSizeInBits - this is getTypeStoreSizeInBits rounded
up to a multiple of the alignment.  For an i36 this is 64, for an
x86 long double this is 96 or 128 depending on the OS.  This is the
spacing between consecutive elements when you form an array out of
this type (getABITypeSize returns the number of bytes).  This is
TYPE_SIZE in gcc.

Since successive elements in a SequentialType (arrays, pointers
and vectors) need to be aligned, the spacing between them will be
given by getABITypeSize.  This means that the size of an array
is the length times the getABITypeSize.  It also means that GEP
computations need to use getABITypeSize when computing offsets.
Furthermore, if an alloca allocates several elements at once then
these too need to be aligned, so the size of the alloca has to be
the number of elements multiplied by getABITypeSize.  Logically
speaking this doesn't have to be the case when allocating just
one element, but it is simpler to also use getABITypeSize in this
case.  So alloca's and mallocs should use getABITypeSize.  Finally,
since gcc's only notion of size is that given by getABITypeSize, if
you want to output assembler etc the same as gcc then getABITypeSize
is the size you want.

Since a store will overwrite no more than getTypeStoreSize bytes,
and a read will read no more than that many bytes, this is the
notion of size appropriate for alias analysis calculations.

In this patch I have corrected all type size uses except some of
those in ScalarReplAggregates, lib/Codegen, lib/Target (the hard
cases).  I will get around to auditing these too at some point,
but I could do with some help.

Finally, I made one change which I think wise but others might
consider pointless and suboptimal: in an unpacked struct the
amount of space allocated for a field is now given by the ABI
size rather than getTypeStoreSize.  I did this because every
other place that reserves memory for a type (eg: alloca) now
uses getABITypeSize, and I didn't want to make an exception
for unpacked structs, i.e. I did it to make things more uniform.
This only effects structs containing long doubles and arbitrary
precision integers.  If someone wants to pack these types more
tightly they can always use a packed struct.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43620 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-01 20:53:16 +00:00
0d642871f5 Silence, accersed warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43609 91177308-0d34-0410-b5e6-96231b3b80d8
2007-11-01 08:51:44 +00:00
e0703c84dd Make ARM and X86 LowerMEMCPY identical by moving the isThumb check into getMaxInlineSizeThreshold
and by restructuring the X86 version.

New I just have to move this to a common place :-)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43554 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-31 14:39:58 +00:00
fc05f402ea Make ARM an X86 memcpy expansion more similar to each other.
Now both subtarget define getMaxInlineSizeThreshold and the expansion uses it.

This should not change generated code.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43552 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-31 11:52:06 +00:00
25f1d08619 Make i64=expand_vector_elt(v2i64) work in 32-bit mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43535 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-31 00:32:36 +00:00
c784208a73 Add missing SSE builtins: CVTPD2PI, CVTPS2PI,
CVTTPD2PI, CVTTPS2PI, CVTPI2PD, CVTPI2PS.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43523 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-30 22:15:38 +00:00
14db5efbf0 Fix for visibility warnings generated by gcc-4.2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43500 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-30 13:14:37 +00:00
8d26e594f0 Add missing MMX PSUBQ.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43488 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-30 01:18:38 +00:00
3c3ddb3a85 Enable more fold (sext (load x)) -> (sext (truncate (sextload x)))
transformation. Previously, it's restricted by ensuring the number of load uses
is one. Now the restriction is loosened up by allowing setcc uses to be
"extended" (e.g. setcc x, c, eq -> setcc sext(x), sext(c), eq).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43465 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-29 19:58:20 +00:00
e127a73154 Avoid doing something dumb like rewriting using a 64-bit iv in 32-bit mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43446 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-29 07:57:50 +00:00
dc4756bfda add a note.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43444 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-29 06:19:48 +00:00
fb7f343615 Add support for the x86-64 'q' regigster modifier, and add support for the
b/h/w/k/q inline asm memory modifiers, which are just ignored.  This fixes
PR1748 and CodeGen/X86/2007-10-28-inlineasm-q-modifier.ll



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43430 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-29 03:09:07 +00:00
b361ec3197 Fix PR1749 and InstCombine/2007-10-28-EmptyField.ll by handling
zero-length fields better.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43427 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-29 02:40:02 +00:00