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b55d924b1e
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47170 Commits

Author SHA1 Message Date
Devang Patel
b55d924b1e Spread use of IRBuilder even more. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131571 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 20:53:17 +00:00
Eli Friedman
f9a74cf069 Revert r131556; it's breaking buildbots/clang tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131567 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 20:39:27 +00:00
Devang Patel
007349dafd Use IRBuilder while simplifying switch instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131566 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 20:35:38 +00:00
Johnny Chen
a96581f4f7 Disassembly of tBcc was wrongly adding 4 to the SignExtend'ed imm8:'0' immediate operand. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131565 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 20:32:41 +00:00
Devang Patel
d46ba26a6b Use IRBuilder while simplifying unwind. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131561 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 20:01:18 +00:00
Chad Rosier
871f664093 Enables vararg functions that pass all arguments via registers to be optimized into tail-calls when possible. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131560 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 19:59:50 +00:00
Eli Friedman
59f15918c2 More instcombine cleanup aimed towards improving debug line info. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131559 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 19:57:14 +00:00
David Chisnall
b2a00dca1b Second pass at allowing plugins to modify default passes. This time without bonus inter-library dependencies. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131556 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 19:00:41 +00:00
Evan Cheng
b936e3006f Revise r131553. Just use the type of the input node and forgo the bitcast. rdar://9449159. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131555 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 18:59:17 +00:00
Evan Cheng
d48fda46f5 Fix an ARMTargetLowering::LowerSELECT bug: legalized result must have same type as input. Sorry test cases only trigger when dag combine is disabled. rdar://9449178 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131553 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 18:47:27 +00:00
Devang Patel
d3372b85e6 Use IRBuilder while simplifying terminator. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131552 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 18:43:31 +00:00
Devang Patel
a23812cfbd Use IRBuilder while simplifying unconditional branch. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131551 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 18:28:48 +00:00
Devang Patel
f60364de44 Use IRBuilder while folding two entry PHINode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131548 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 18:16:44 +00:00
Eli Friedman
976e7e1cc8 Switch more inst insertion in instcombine to IRBuilder. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131547 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 18:10:28 +00:00
Devang Patel
3e410c6607 Set up IRBuilder for use during simplification. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131545 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 18:01:27 +00:00
Eli Friedman
1eca76a611 Switch more inst insertion in instcombine to IRBuilder. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131544 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 17:58:37 +00:00
Matt Beaumont-Gay
f88ad9aeee fix typo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131543 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 17:37:10 +00:00
Eli Friedman
e87ca454ba Switch inst insertion in instcombine transform to IRBuilder. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131542 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 17:31:55 +00:00
Devang Patel
62fb3556ea Use IRBuiler while constant folding terminator. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131541 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 17:26:46 +00:00
Stuart Hastings
d116611e0a Fix inelegant initialization. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131538 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 15:54:26 +00:00
Justin Holewinski
657d1bed23 PTX: add flag to disable mad/fma selection 
Patch by Dan Bailey

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131537 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 15:42:23 +00:00
Duncan Sands
d6dde76090 Revert commit 131534 since it seems to have broken several buildbots. 
Original log entry:
Refactor getActionType and getTypeToTransformTo ; place all of the 'decision'
code in one place.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131536 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 14:57:56 +00:00
Nadav Rotem
fe3f5d7538 Refactor getActionType and getTypeToTransformTo ; place all of the 'decision' 
code in one place.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131534 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 12:26:38 +00:00
Duncan Sands
7016ec1a45 Now that SrcBits and DestBits always represent the primitive size, rather 
than either the primitive size or the element primitive size (in the case
of vectors), simplify the vector logic.  No functionality change.  There
is some distracting churn in the patch because I lined up comments better
while there - sorry about that.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131533 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 10:59:25 +00:00
Duncan Sands
bb1695e333 Tighten up checking of the validity of casts. (1) The IR parser would 
happily accept things like "sext <2 x i32> to <999 x i64>".  It would
also accept "sext <2 x i32> to i64", though the verifier would catch
that later.  Fixed by having castIsValid check that vector lengths match
except when doing a bitcast.  (2) When creating a cast instruction, check
that the cast is valid (this was already done when creating constexpr
casts).  While there, replace getScalarSizeInBits (used to allow more
vector casts) with getPrimitiveSizeInBits in getCastOpcode and isCastable
since vector to vector casts are now handled explicitly by passing to the
element types; i.e. this bit should result in no functional change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131532 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 09:21:57 +00:00
Duncan Sands
117feba971 Teach getCastOpcode about element-by-element vector casts. For example, "trunc" 
can be used to turn a <4 x i64> into a <4 x i32> but getCastOpcode would assert
if you passed these types to it.  Note that this strictly extends the previous
functionality: if getCastOpcode previously accepted two vector types (i.e. didn't
assert) then it still will and returns the same opcode (BitCast).  That's because
before it would only accept vectors with the same bitwidth, and the new code only
touches vectors with the same length.  However if two vectors have both the same
bitwidth and the same length then their element types have the same bitwidth, so
the new logic will return BitCast as before.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131530 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 07:13:41 +00:00
Tanya Lattner
2a8eb722c7 In r131488 I misunderstood how VREV works. It splits the vector in half and splits each half. Therefore, the real problem was that we were using a VREV64 for a 4xi16, when we should have been using a VREV32. 
Updated test case and reverted change to the PerfectShuffle Table.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131529 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 06:42:21 +00:00
Charles Davis
0e30f02f44 Implement the Win64 EH directive methods for the assembly language streamer. 
GAS has no such directives (not even mingw-w64 GAS has them), so I took
creative license with their names in assembly. I prefixed them all with
"w64_" to avoid namespace collisions, for example. If I discover that GAS
has taken a different approach, I'll change ours to match.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131525 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 04:58:05 +00:00
Jakob Stoklund Olesen
54f0d1e021 Eliminate dead dead code elimination code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131524 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 04:51:15 +00:00
Jakob Stoklund Olesen
c6b9ebdd64 Also use shrinkToUses after AdjustCopiesBackFrom(). 
The 'last use' may not be in the same basic block, and we still want a correct
live range.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131523 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 04:51:12 +00:00
Charles Davis
9c77398d1c While thinking about how to know where the functions' boundaries are for 
the purposes of the Win64 EH tables, I realized we had no way to tell where
the function ends. (MASM bounds functions with PROC and ENDP keywords.)
Add a directive to delimit the end of the function, and rename the 'frame'
directive to more accurately reflect its duality with the new directive.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131522 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 04:47:22 +00:00
Jakob Stoklund Olesen
fc2fcb4165 Properly shrink live ranges after deleting dead copies. Clean up after all joined copies. 
LiveInterval::shrinkToUses recomputes the live range from scratch instead of
removing snippets. This should avoid the problem with dangling live ranges.

Leave physreg identity copies alone. They can be created when joining a virtreg
with a physreg. They don't affect register allocation, and they will be removed
by the rewriter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131521 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 04:18:19 +00:00
Cameron Zwarich
141ec63962 Fix typo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131519 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 02:29:50 +00:00
Cameron Zwarich
7d336c0c68 Fix more of PR8825 by correctly using rGPR registers when lowering atomic 
compare-and-swap intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131518 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 02:20:07 +00:00
Eli Friedman
ef819d0ed8 Start trying to make InstCombine preserve more debug info. The idea here is to set the debug location on the IRBuilder, which will be then right location in most cases. This should magically give many transformations debug locations, and fixing places which are missing a debug location will usually just means changing the code creating it to use the IRBuilder. 
As an example, the change to InstCombineCalls catches a common case where a call to a bitcast of a function is rewritten.

Chris, does this approach look reasonable?



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131516 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 01:28:27 +00:00
Eli Friedman
3e22cb9ec3 Use ReplaceInstUsesWith instead of replaceAllUsesWith where appropriate in instcombine. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131512 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-18 00:32:01 +00:00
Devang Patel
d80e8ed2fa Preseve line numbers while simplifying CFG. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131508 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-17 23:29:05 +00:00
Cameron Zwarich
d6ffcd88ba Actually, the address operand of the Thumb2 LDREX / STREX instructions *can* 
take r13, so we can just make it a GPR. This fixes PR8825.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131507 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-17 23:26:20 +00:00
Cameron Zwarich
3c60ff4f3d Correct a minor problem with the Thumb2 LDREX and STREX instruction encodings. They 
were marked as taking a tGPR when in reality they take an rGPR.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131506 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-17 23:11:12 +00:00
Bill Wendling
f5c95b889f Conditionalize the format of the GCOV files by target type. Darwin uses the 4.2 
format.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131503 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-17 23:05:13 +00:00
Eli Friedman
9c4dae6b0b Make fast-isel miss counting in -stats and -fast-isel-verbose take terminators into account; since there are many fewer isel misses with recent changes, misses caused by terminators are more significant. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131502 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-17 23:02:10 +00:00
Dan Gohman
1b32896bd2 Misc. code cleanups. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131497 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-17 22:22:52 +00:00
Dan Gohman
71dc7c9d89 Misc. code cleanups. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131495 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-17 22:20:36 +00:00
Stuart Hastings
ca1ef48585 X86 pmovsx/pmovzx ignore the upper half of their inputs. 
rdar://problem/6945110


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131493 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-17 22:13:31 +00:00
Tanya Lattner
c81c9709ef vrev is incorrectly defined in the perfect shuffle table. The ordering is backwards (should be 0x3210 versus 0x1032) which exposed a bug when doing a shuffle on a 4xi16. I've attached a test case. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131488 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-17 20:48:40 +00:00
Devang Patel
de98568bf8 Preserve line number information. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131482 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-17 20:00:02 +00:00
Devang Patel
d9b4996637 Set debug loc for new load instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131481 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-17 19:43:38 +00:00
Devang Patel
c9ea771cb8 Preserve line number information. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131480 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-17 19:43:06 +00:00
Mon P Wang
fee22869ca Enable autodetect of popcnt 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131476 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-17 18:33:37 +00:00
Eli Friedman
19515b4e52 Add x86 fast-isel for calls returning first-class aggregates. rdar://9435872. 
This is r131438 with a couple small fixes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131474 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-17 18:29:03 +00:00