Evan Cheng
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44bec52b1b
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Add PredicateOperand to all ARM instructions that have the condition field.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37066 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-05-15 01:29:07 +00:00 |
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Evan Cheng
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42d712b306
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Switch BCC, MOVCCr, etc. to PredicateOperand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36948 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-05-08 21:08:43 +00:00 |
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Evan Cheng
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c4e600362e
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This is no longer needed after enabling the DAG combiner xform.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36909 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-05-07 21:29:41 +00:00 |
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Dale Johannesen
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4ac075c859
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Evan's patch to avoid FPreg->intreg copy for cvt; store to mem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36693 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-05-03 20:54:42 +00:00 |
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Chris Lattner
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72939126d4
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match a reassociated form of fnmul. This implements CodeGen/ARM/fnmul.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36660 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-05-03 00:32:00 +00:00 |
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Evan Cheng
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a8e2989ece
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ARM backend contribution from Apple.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33353 91177308-0d34-0410-b5e6-96231b3b80d8
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2007-01-19 07:51:42 +00:00 |
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