Eric Christopher
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7d5a61e975
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For 64-bit the rest of the general regs are ok for the q constraint. Make
sure we can emit both the high and low versions of those registers.
Fixes rdar://10392864
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145579 91177308-0d34-0410-b5e6-96231b3b80d8
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2011-12-01 08:12:41 +00:00 |
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Nick Lewycky
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9bf45d0b1a
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Let the inline asm 'q' constraint match float, and on 64-bit double too.
Fixes PR9602!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134665 91177308-0d34-0410-b5e6-96231b3b80d8
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2011-07-08 00:19:27 +00:00 |
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Chris Lattner
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a53616d08b
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Remove support for parsing the "type i32" syntax for defining a numbered
top level type without a specified number. This syntax isn't documented
and blocks forward progress.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133371 91177308-0d34-0410-b5e6-96231b3b80d8
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2011-06-19 00:03:46 +00:00 |
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Dan Gohman
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36a0947820
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Eliminate more uses of llvm-as and llvm-dis.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81290 91177308-0d34-0410-b5e6-96231b3b80d8
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2009-09-08 23:54:48 +00:00 |
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Evan Cheng
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47e9fab158
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Fix x86 inline ams 'q' constraint support. In 32-bit mode, it's just like 'Q', i.e. EAX, EDX, ECX, EBX. In 64-bit mode, it just means all the i64r registers. Yeah, that makes sense.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76248 91177308-0d34-0410-b5e6-96231b3b80d8
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2009-07-17 22:13:25 +00:00 |
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