Commit Graph

106169 Commits

Author SHA1 Message Date
Chandler Carruth
1b1fbccf49 [x86] Make vector legalization of extloads work more like the "normal"
vector operation legalization with support for custom target lowering
and fallback to expand when it fails, and use this to implement sext and
anyext load lowering for x86 in a more principled way.

Previously, the x86 backend relied on a target DAG combine to "combine
away" sextload and extload nodes prior to legalization, or would expand
them during legalization with terrible code. This is particularly
problematic because the DAG combine relies on running over non-canonical
DAG nodes at just the right time to match several common and important
patterns. It used a combine rather than lowering because we didn't have
good lowering support, and to expose some tricks being employed to more
combine phases.

With this change it becomes a proper lowering operation, the backend
marks that it can lower these nodes, and I've added support for handling
the canonical forms that don't have direct legal representations such as
sextload of a v4i8 -> v4i64 on AVX1. With this change, our test cases
for this behavior continue to pass even after the DAG combiner beigns
running more systematically over every node.

There is some noise caused by this in the test suite where we actually
use vector extends instead of subregister extraction. This doesn't
really seem like the right thing to do, but is unlikely to be a critical
regression. We do regress in one case where by lowering to the
target-specific patterns early we were able to combine away extraneous
legal math nodes. However, this regression is completely addressed by
switching to a widening based legalization which is what I'm working
toward anyways, so I've just switched the test to that mode.

Differential Revision: http://reviews.llvm.org/D4654

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213897 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 22:09:56 +00:00
Saleem Abdulrasool
24ade3b748 Target: invert condition for Windows
The Microsoft ABI and MSVCRT are considered the canonical C runtime and ABI.
The long double routines are not part of this environment.  However, cygwin and
MinGW both provide supplementary implementations.  Change the condition to
reflect this reality.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213896 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 22:09:06 +00:00
Manman Ren
0349d541d2 Feedback from Hans on r213815. No functionaility change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213895 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 21:13:20 +00:00
Hans Wennborg
dee5e2cf7f Windows: Don't wildcard expand /? or -?
Even if there's a file called c:\a, we want /? to be preserved as
an option, not expanded to a filename.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213894 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 21:09:45 +00:00
Lang Hames
b96e833817 [X86] Optimize stackmap shadows on X86.
This patch minimizes the number of nops that must be emitted on X86 to satisfy
stackmap shadow constraints.

To minimize the number of nops inserted, the X86AsmPrinter now records the
size of the most recent stackmap's shadow in the StackMapShadowTracker class,
and tracks the number of instruction bytes emitted since the that stackmap
instruction was encountered. Padding is emitted (if it is required at all)
immediately before the next stackmap/patchpoint instruction, or at the end of
the basic block.

This optimization should reduce code-size and improve performance for people
using the llvm stackmap intrinsic on X86.

<rdar://problem/14959522>



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213892 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 20:40:55 +00:00
Reid Kleckner
5b93c8af72 Replace an assertion with a fatal error
Frontends are responsible for putting inalloca on parameters that would
be passed in memory and not registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213891 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 19:53:33 +00:00
Joerg Sonnenberger
1cb9342f32 Use the same .eh_frame encoding for 32bit PPC as on i386.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213890 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 19:25:16 +00:00
Manman Ren
7963749c69 Try to fix the bots again by moving test to X86 directory.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213884 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 17:57:09 +00:00
Saleem Abdulrasool
69280f8844 X86: correct library call setup for Windows itanium
This target is identical to the Windows MSVC (and follows Microsoft ABI for C).
Correct the library call setup for this target.  The same set of library calls
are missing on this environment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213883 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 17:46:36 +00:00
Matt Arsenault
855a7e6eff R600: Add FMA instructions for Evergreen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213882 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 17:41:01 +00:00
Manman Ren
203dc9d460 Try to fix the bots. If this does not work, I am going to move it to X86 directory.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213880 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 17:18:33 +00:00
Saleem Abdulrasool
9a050915f9 X86: silence sign comparison warning
GCC 4.8 detected a signed compare [-Wsign-compare].  Add a cast for the
destination index.  Add an assert to catch a potential overflow however unlikely
it may be.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213878 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 17:12:06 +00:00
Matt Arsenault
cb1ac70623 R600: Add new functions for splitting vector loads and stores.
These will be used in future patches and shouldn't change anything yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213877 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 17:10:35 +00:00
Nico Weber
519212bf69 Let the integrated assembler understand .exitm, PR20426.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213876 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 17:08:39 +00:00
Nico Weber
5c87418bb8 Remove unused field MacroInstantiation::TheMacro. No behavior change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213874 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 16:29:04 +00:00
Nico Weber
2604a975ba Let the integrated assembler understand .warning, PR20428.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213873 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 16:26:06 +00:00
Joerg Sonnenberger
1dd6dee3ac Include relative path for header outside the current directory.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213872 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 16:04:46 +00:00
Rafael Espindola
6e1b8585bc Remove dead code.
Every user has been switched to using EngineBuilder.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213871 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 16:02:28 +00:00
Tim Northover
3715084d47 AArch64: refactor ReconstructShuffle function
Quite a bit of cruft had accumulated as we realised the various different cases
it had to handle and squeezed them in where possible. This refactoring mostly
flattens the logic and special-cases. The result is slightly longer, but I
think clearer.

Should be no functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213867 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 15:39:55 +00:00
Duncan P. N. Exon Smith
cf3794498e Fix r213824 on windows
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213866 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 15:16:23 +00:00
Hal Finkel
16fd27b2c3 Add scoped-noalias metadata
This commit adds scoped noalias metadata. The primary motivations for this
feature are:
  1. To preserve noalias function attribute information when inlining
  2. To provide the ability to model block-scope C99 restrict pointers

Neither of these two abilities are added here, only the necessary
infrastructure. In fact, there should be no change to existing functionality,
only the addition of new features. The logic that converts noalias function
parameters into this metadata during inlining will come in a follow-up commit.

What is added here is the ability to generally specify noalias memory-access
sets. Regarding the metadata, alias-analysis scopes are defined similar to TBAA
nodes:

!scope0 = metadata !{ metadata !"scope of foo()" }
!scope1 = metadata !{ metadata !"scope 1", metadata !scope0 }
!scope2 = metadata !{ metadata !"scope 2", metadata !scope0 }
!scope3 = metadata !{ metadata !"scope 2.1", metadata !scope2 }
!scope4 = metadata !{ metadata !"scope 2.2", metadata !scope2 }

Loads and stores can be tagged with an alias-analysis scope, and also, with a
noalias tag for a specific scope:

... = load %ptr1, !alias.scope !{ !scope1 }
... = load %ptr2, !alias.scope !{ !scope1, !scope2 }, !noalias !{ !scope1 }

When evaluating an aliasing query, if one of the instructions is associated
with an alias.scope id that is identical to the noalias scope associated with
the other instruction, or is a descendant (in the scope hierarchy) of the
noalias scope associated with the other instruction, then the two memory
accesses are assumed not to alias.

Note that is the first element of the scope metadata is a string, then it can
be combined accross functions and translation units. The string can be replaced
by a self-reference to create globally unqiue scope identifiers.

[Note: This overview is slightly stylized, since the metadata nodes really need
to just be numbers (!0 instead of !scope0), and the scope lists are also global
unnamed metadata.]

Existing noalias metadata in a callee is "cloned" for use by the inlined code.
This is necessary because the aliasing scopes are unique to each call site
(because of possible control dependencies on the aliasing properties). For
example, consider a function: foo(noalias a, noalias b) { *a = *b; } that gets
inlined into bar() { ... if (...) foo(a1, b1); ... if (...) foo(a2, b2); } --
now just because we know that a1 does not alias with b1 at the first call site,
and a2 does not alias with b2 at the second call site, we cannot let inlining
these functons have the metadata imply that a1 does not alias with b2.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213864 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 14:25:39 +00:00
Aaron Ballman
e8d5c379ac Fixing an MSVC conversion warning about implicitly converting the shift results to 64-bits. No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213863 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 14:24:59 +00:00
Chandler Carruth
6800393083 [Target] Teach the query interfaces for lowering of extloads and
truncstores to support EVTs and return expand for non-simple ones.

This makes them more consistent with the isLegal... query style methods
and makes using them simpler in many scenarios.

No functionality actually changed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213860 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 12:20:53 +00:00
Hal Finkel
2c7c54c86c AA metadata refactoring (introduce AAMDNodes)
In order to enable the preservation of noalias function parameter information
after inlining, and the representation of block-level __restrict__ pointer
information (etc.), additional kinds of aliasing metadata will be introduced.
This metadata needs to be carried around in AliasAnalysis::Location objects
(and MMOs at the SDAG level), and so we need to generalize the current scheme
(which is hard-coded to just one TBAA MDNode*).

This commit introduces only the necessary refactoring to allow for the
introduction of other aliasing metadata types, but does not actually introduce
any (that will come in a follow-up commit). What it does introduce is a new
AAMDNodes structure to hold all of the aliasing metadata nodes associated with
a particular memory-accessing instruction, and uses that structure instead of
the raw MDNode* in AliasAnalysis::Location, etc.

No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213859 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 12:16:19 +00:00
NAKAMURA Takumi
a4abc43a56 Prune redundant libdeps.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213857 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 11:45:27 +00:00
NAKAMURA Takumi
9d8661d666 Prune dependency to MC from each target disassembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213856 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 11:45:11 +00:00
NAKAMURA Takumi
4bc5f139cd [CMake] tools/lto: Prune redundant libdep(s).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213855 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 11:44:44 +00:00
NAKAMURA Takumi
0fe305de89 [CMake] LineEditorTests: Add Support to link_components.
Even if LLVMSupport is added in add_unittests, LLVMSupport may be here as consistency.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213854 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 11:44:33 +00:00
Tilmann Scheller
d51310e486 [ARM] Make the assembler reject unpredictable pre/post-indexed ARM STRH instructions.
The ARM ARM prohibits STRH instructions with writeback into the source register. With this commit this constraint is now enforced and we stop assembling STRH instructions with unpredictable behavior.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213850 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 09:55:46 +00:00
Daniel Sanders
25f4fcd8e0 [mips] Fix ll and sc instructions
Summary: The ll and sc instructions for r6 and non-r6 are misplaced. This patch fixes that.

Patch by Jyun-Yan You

Differential Revision: http://reviews.llvm.org/D4578


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213847 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 09:47:14 +00:00
Matt Arsenault
de929f8b7d R600: Match rcp node on pre-SI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213844 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 06:59:24 +00:00
Matt Arsenault
f303d037f2 R600: Fix LowerSDIV24
Use ComputeNumSignBits instead of checking for i8 / i16 which only
worked when AMDIL was lying about having legal i8 / i16.

If an integer is known to fit in 24-bits, we can
do division faster with float ops.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213843 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 06:59:20 +00:00
Rafael Espindola
8971050012 Remove unused substitution.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213839 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 04:09:04 +00:00
Duncan P. N. Exon Smith
117dff7bd2 IR: Fix comment from r213824
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213836 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 02:56:59 +00:00
NAKAMURA Takumi
f227bf3b26 Remove a stray semicolon. [-Wpedantic]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213833 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 02:11:24 +00:00
NAKAMURA Takumi
9fda421ee4 Update library dependencies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213832 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 02:10:42 +00:00
Matt Arsenault
ba86db191d R600: Implement enableClusterLoads()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213831 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 02:10:17 +00:00
Kevin Qin
2daff76c05 [AArch64] Fix a bug generating incorrect instruction when building small vector.
This bug is introduced by r211144. The element of operand may be
smaller than the element of result, but previous commit can
only handle the contrary condition. This commit is to handle this
scenario and generate optimized codes like ZIP1.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213830 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 02:05:42 +00:00
Jiangning Liu
1bc34d71b7 [AArch64] Disable some optimization cases for type conversion from sint to fp, because those optimization cases are micro-architecture dependent and only make sense for Cyclone. A new predicate Cyclone is introduced in .td file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213827 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 01:29:59 +00:00
Filipe Cabecinhas
d28cfd150b Fixed PR20411 - bug in getINSERTPS()
When we had a vector_shuffle where we had an input from each vector, we
could miscompile it because we were assuming the input from V2 wouldn't
be moved from where it was on the vector.

Added a test case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213826 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 01:28:21 +00:00
Duncan P. N. Exon Smith
5092384bd3 IR: Add Value::sortUseList()
Add `Value::sortUseList()`, templated on the comparison function to use.

The sort is an iterative merge sort that uses a binomial vector of
already-merged lists to limit the size overhead to `O(1)`.

This is part of PR5680.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213824 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-24 00:53:19 +00:00
Reid Kleckner
ec6e535168 Add a VS "14" msbuild toolset
This allows people to try clang inside MSBuild with the VS "14" CTP
releases.

Fixes PR20341.

Patch by Marcel Raad!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213819 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-23 23:49:16 +00:00
Manman Ren
4cae9cb034 SimplifyCFG: fix a bug in switch to table conversion
We use gep to access the global array "switch.table", and the table index
should be treated as unsigned. When the highest bit is 1, this commit
zero-extends the index to an integer type with larger size.

For a switch on i2, we used to generate:
%switch.tableidx = sub i2 %0, -2
getelementptr inbounds [4 x i64]* @switch.table, i32 0, i2 %switch.tableidx

It is incorrect when %switch.tableidx is 2 or 3. The fix is to generate
%switch.tableidx = sub i2 %0, -2
%switch.tableidx.zext = zext i2 %switch.tableidx to i3
getelementptr inbounds [4 x i64]* @switch.table, i32 0, i3 %switch.tableidx.zext

rdar://17735071


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213815 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-23 23:13:23 +00:00
Rafael Espindola
48b8c128df Fix the build when building with only the ARM backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213814 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-23 22:54:28 +00:00
Rafael Espindola
b74b9541ac Document what backwards compatibility we provide for bitcode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213813 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-23 22:43:22 +00:00
NAKAMURA Takumi
a25114b902 Let llvm/test/CodeGen/X86/avx512*-mask-op.ll(s) aware of Win32 x64 calling convention.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213812 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-23 22:38:25 +00:00
Eric Christopher
0bebd31dce Fix indenting.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213811 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-23 22:34:13 +00:00
Chandler Carruth
1d73b6f8a6 [x86] Rip out some broken test cases for avx512 i1 store support.
It isn't reasonable to test storing things using undef pointers --
storing through those is at best "good luck" and really should be
transformed to "unreachable". Random changes in the combiner can
randomly break these tests for no good reason. I'm following up on the
original commit regarding the right long-term strategy here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213810 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-23 22:29:19 +00:00
Eric Christopher
ba08e46435 Reorganize and simplify local variables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213809 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-23 22:27:10 +00:00
Rafael Espindola
34c5b5b952 Finish inverting the MC -> Object dependency.
There were still some disassembler bits in lib/MC, but their use of Object
was only visible in the includes they used, not in the symbols.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213808 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-23 22:26:07 +00:00