Commit Graph

10717 Commits

Author SHA1 Message Date
Alp Toker
6e0ab2f54c Revert "Do materialize for floating point"
1) The commit was made despite profound lack of understanding:

   "I did not understand the comment about using dyn_cast instead of isa. I will
   commit as is and make the update after. You can explain what you meant to me."

   Commit first, understand later isn't OK.

2) Review comments were simply ignored:

   "Can you edit the summary to describe what the patch is for? It appears to be
   a list of commits at the moment."

3) The patch got LGTM'd off-list without any indication of readiness.

4) The public mailing list was excluded from patch review so all of this was
   hidden from the community.

This reverts commit r210414.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210424 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-08 09:13:42 +00:00
Reed Kotler
4a0c1d135e Do materialize for floating point
Summary:
start to do simple constants

finish simplestore

add test case

format

Merge branch 'master' into 1756_8

Add basic functionality for assignment of ints. This creates a lot of core infrastructure in which to add, with little effort, quite a bit more to mips fast-isel

Merge branch 'master' into 1756_8

Add basic functionality for assignment of ints. This creates a lot of core infrastructure in which to add, with little effort, quite a bit more to mips fast-isel

in progress

finish integer materialize

test cases

test cases

in progress

Finish up fast-isel materialize for ints.

Finish materialize for ints

test cases

simplestorei.ll

Merge branch 'master' into 1756_8

fix fp constants for fast-isel

Merge branch '1758_1' of dmz-portal.mips.com:llvm into 1758_1

in progress

lastest for fp materialization

clean up

Merge branch 'master' into 1758_1

formatting

add test case

finish test case

Merge branch 'master' into 1758_2

Test Plan:
simplestore.ll

simplestore.ll

Reviewers: dsanders

Reviewed By: dsanders

Differential Revision: http://reviews.llvm.org/D3659

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210414 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-08 03:30:32 +00:00
Saleem Abdulrasool
e668525dd1 test: add test case for SVN r210406
Add missing test case for constructor section selection.  Thanks David Blaikie!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210409 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-08 01:27:32 +00:00
Alp Toker
3c9b41b949 Fix typos
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210401 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-07 21:23:09 +00:00
Saleem Abdulrasool
104e73dd34 ARM: correct assertion for long-calls on WoA
COFF/PE, so the relocation model is never static.  Loosen the assertion
accordingly.  The relocation can still be emitted properly, as it will be
converted to an IMAGE_REL_ARM_ADDR32 which will be resolved by the loader
taking the base relocation into account.  This is necessary to permit the
emission of long calls which can be controlled via the -mlong-calls option in
the driver.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210399 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-07 20:29:27 +00:00
Benjamin Kramer
0da5960e5b X86: Don't turn shifts into ands if there's another use that may not check for equality.
Fixes PR19964.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210371 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-06 21:08:55 +00:00
Filipe Cabecinhas
78cf19b9b9 Fixed a bug in lowering shuffle_vectors to insertps
Summary:
We were being too strict and not accounting for undefs.
Added a test case and fixed another one where we improved codegen.

Reviewers: grosbach, nadav, delena

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D4039

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210361 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-06 18:07:06 +00:00
Bill Schmidt
6c9eb10784 [PPC64LE] Fix lowering of BUILD_VECTOR and SHUFFLE_VECTOR for little endian
This patch fixes a couple of lowering issues for little endian
PowerPC.  The code for lowering BUILD_VECTOR contains a number of
optimizations that are only valid for big endian.  For now, we disable
those optimizations for correctness.  In the future, we will add
analogous optimizations that are correct for little endian.

When lowering a SHUFFLE_VECTOR to a VPERM operation, we again need to
make the now-familiar transformation of swapping the input operands
and complementing the permute control vector.  Correctness of this
transformation is tested by the accompanying test case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210336 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-06 14:06:26 +00:00
Rafael Espindola
6fd1b8ee48 Allow aliases to be unnamed_addr.
Alias with unnamed_addr were in a strange state. It is stored in GlobalValue,
the language reference talks about "unnamed_addr aliases" but the verifier
was rejecting them.

It seems natural to allow unnamed_addr in aliases:

* It is a property of how it is accessed, not of the data itself.
* It is perfectly possible to write code that depends on the address
of an alias.

This patch then makes unname_addr legal for aliases. One side effect is that
the syntax changes for a corner case: In globals, unnamed_addr is now printed
before the address space.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210302 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-06 01:20:28 +00:00
Bill Schmidt
5f81752533 [PPC64LE] Add test case for r210282 commit
Chandler correctly pointed out that I need an LLVM IR test for
r210282, which modified the vperm -> shuffle transform for little
endian PowerPC.  This patch provides that test.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210297 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-05 22:57:38 +00:00
Tom Roeder
d94cd00219 Adding explicit triples to the ARM jumptable tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210288 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-05 21:40:13 +00:00
Tom Roeder
5d0f7af3dc Add a new attribute called 'jumptable' that creates jump-instruction tables for functions marked with this attribute.
It includes a pass that rewrites all indirect calls to jumptable functions to pass through these tables.

This also adds backend support for generating the jump-instruction tables on ARM and X86.
Note that since the jumptable attribute creates a second function pointer for a
function, any function marked with jumptable must also be marked with unnamed_addr.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210280 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-05 19:29:43 +00:00
Sasa Stankovic
2181b2319e [mips] Modify long branch for NaCl:
* Move the instruction that changes sp outside of the branch delay slot.
  * Bundle-align the target of indirect branch.

Differential Revision: http://llvm-reviews.chandlerc.com/D3928


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210262 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-05 13:52:08 +00:00
Sasa Stankovic
44215458bd Prevent hoisting the instruction whose def might be clobbered by the terminator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210261 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-05 13:42:48 +00:00
Matt Arsenault
3cea6e797e R600: Fix test. Using wrong check prefix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210244 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-05 08:00:36 +00:00
Matt Arsenault
798a829eca R600/SI: Match rsq instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210226 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-05 00:15:55 +00:00
Eric Christopher
957b2cc0f2 Revert r209381 as it isn't a local variable. Add a testcase so that
we know next time this happens.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210127 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-03 21:01:39 +00:00
Tilmann Scheller
9f039304b3 [AArch64] Add regression tests for the load/store optimizer which cover post-index update folding with sub rather than add.
The tests check that the following transform happens:

  (ldr|str) X, [x20]
   ...
  sub x20, x20, #16
   ->
  (ldr|str) X, [x20], #-16

with X being either w0, x0, s0, d0 or q0.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210113 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-03 16:03:00 +00:00
Tim Northover
1410a2c906 AArch64: mark small types (i1, i8, i16) as promoted
This means the output of LowerFormalArguments returns a lowered
SDValue with the correct type (expected in SelectionDAGBuilder).
Without this, an assertion under a DEBUG macro triggers when those
types are passed on the stack.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210102 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-03 13:54:53 +00:00
Jiangning Liu
9a2d239740 [AArch64] Correctly deal with VPR stack parameter passing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210067 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-03 03:25:09 +00:00
Rafael Espindola
2d21b25393 Allow alias to point to an arbitrary ConstantExpr.
This  patch changes GlobalAlias to point to an arbitrary ConstantExpr and it is
up to MC (or the system assembler) to decide if that expression is valid or not.

This reduces our ability to diagnose invalid uses and how early we can spot
them, but it also lets us do things like

@test5 = alias inttoptr(i32 sub (i32 ptrtoint (i32* @test2 to i32),
                                 i32 ptrtoint (i32* @bar to i32)) to i32*)

An important implication of this patch is that the notion of aliased global
doesn't exist any more. The alias has to encode the information needed to
access it in its metadata (linkage, visibility, type, etc).

Another consequence to notice is that getSection has to return a "const char *".
It could return a NullTerminatedStringRef if there was such a thing, but when
that was proposed the decision was to just uses "const char*" for that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210062 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-03 02:41:57 +00:00
Andrea Di Biagio
0bedfa456a [X86] Fix checked arithmetic for i8 on X86.
When lowering a ISD::BRCOND into a test+branch, make sure that we
always use the correct condition code to emit the test operation.

This fixes PR19858: "i8 checked mul is wrong on x86".

Patch by Keno Fisher!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210032 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-02 16:00:27 +00:00
Tilmann Scheller
cca9c26920 [AArch64] Add some more regression tests for store pre-index update folding in the load/store optimizer.
Add tests for the following transform:

 add x8, x8, #16
  ...
 str X, [x8]
  ->
 str X, [x8, #16]!

with X being either w0, x0, s0, d0 or q0.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210021 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-02 12:33:33 +00:00
Tilmann Scheller
ef8a99c807 [AArch64] Add some more regression tests for load pre-index update folding in the load/store optimizer.
Add tests for the following transform:

 add x8, x8, #16
  ...
 ldr X, [x8]
  ->
 ldr X, [x8, #16]!

with X being either w0, x0, s0, d0 or q0.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210018 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-02 11:57:09 +00:00
Christian Pirker
27e80698ef ARMEB: Fix function return type f64
Reviewed at http://reviews.llvm.org/D3968



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209990 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-01 09:30:52 +00:00
Matt Arsenault
da5824d073 R600/SI: Fix [s|u]int_to_fp for i1
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209971 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-31 06:47:42 +00:00
Filipe Cabecinhas
c3648ce2dc Make blend tests more specific
Following the lead set by r209324, I'm making these tests match the whole
instruction, so we can be sure we're lowering them correctly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209947 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-31 00:52:23 +00:00
Andrea Di Biagio
1726e2ff15 [X86] Add two combine rules to simplify dag nodes introduced during type legalization when promoting nodes with illegal vector type.
This patch teaches the backend how to simplify/canonicalize dag node
sequences normally introduced by the backend when promoting certain dag nodes
with illegal vector type.

This patch adds two new combine rules:
1) fold (shuffle (bitcast (BINOP A, B)), Undef, <Mask>) ->
        (shuffle (BINOP (bitcast A), (bitcast B)), Undef, <Mask>)

2) fold (BINOP (shuffle (A, Undef, <Mask>)), (shuffle (B, Undef, <Mask>))) ->
        (shuffle (BINOP A, B), Undef, <Mask>).

Both rules are only triggered on the type-legalized DAG.
In particular, rule 1. is a target specific combine rule that attempts
to sink a bitconvert into the operands of a binary operation.
Rule 2. is a target independet rule that attempts to move a shuffle
immediately after a binary operation.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209930 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-30 23:17:53 +00:00
Filipe Cabecinhas
d99cefbad1 Convert a vselect into a concat_vector if possible
Summary:
If both vector args to vselect are concat_vectors and the condition is
constant and picks half a vector from each argument, convert the vselect
into a concat_vectors.

Added a test.

The ConvertSelectToConcatVector is assuming it doesn't get vselects with
arguments of, for example, <undef, undef, true, true>. Those get taken
care of in the checks above its call.

Reviewers: nadav, delena, grosbach, hfinkel

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D3916

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209929 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-30 23:03:11 +00:00
Filipe Cabecinhas
94141a42ed Separate the check for blend shuffle_vector masks
Summary:
Separate the check for blend shuffle_vector masks into isBlendMask.
This function will also be used to check if a vector shuffle is legal. No
change in functionality was intended, but we ended up improving codegen on
two tests, which were being (more) optimized only if the resulting shuffle
was legal.

Reviewers: nadav, delena, andreadb

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D3964

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209923 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-30 21:31:21 +00:00
Logan Chien
731d23ed42 Fix MIPS exception personality encoding.
For MIPS, we have to encode the personality routine with
an indirect pointer to absptr; otherwise, some link warning
warning will be raised, and the program might crash in some
early MIPS Android device.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209907 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-30 16:48:56 +00:00
Rafael Espindola
6319c0c520 [pr19636] Fix known bit computation in urem instruction with power of two.
Patch by Andrey Kuharev.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209902 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-30 15:00:45 +00:00
Tim Northover
3a45d4c621 SelectionDAG: skip barriers for unordered atomic operations
Unordered is strictly weaker than monotonic, so if the latter doesn't have any
barriers then the former certainly shouldn't.

rdar://problem/16548260

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209901 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-30 14:41:51 +00:00
Tim Northover
645c5b94e2 ARM: use AAPCS-style prologues for embedded MachO.
Darwin prologues save their GPRs in two stages: a narrow push of r0-r7 & lr,
followed by a wide push of the remaining registers if there are any. AAPCS uses
a single push.w instruction.

It turns out that, on average, enough registers get pushed that code is smaller
in the AAPCS prologue, which is a nice property for M-class programmers. They
also have other options available for back-traces, so can hopefully deal with
the fact that FP & LR aren't adjacent in memory.

rdar://problem/15909583

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209895 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-30 13:23:06 +00:00
Tim Northover
910dc41e24 AArch64 & ARM: disable generic test that relies on no CFG changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209885 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-30 10:56:12 +00:00
Tim Northover
d0dbe02fd2 ARM & AArch64: make use of common cmpxchg idioms after expansion
The C and C++ semantics for compare_exchange require it to return a bool
indicating success. This gets mapped to LLVM IR which follows each cmpxchg with
an icmp of the value loaded against the desired value.

When lowered to ldxr/stxr loops, this extra comparison is redundant: its
results are implicit in the control-flow of the function.

This commit makes two changes: it replaces that icmp with appropriate PHI
nodes, and then makes sure earlyCSE is called after expansion to actually make
use of the opportunities revealed.

I've also added -{arm,aarch64}-enable-atomic-tidy options, so that
existing fragile tests aren't perturbed too much by the change. Many
of them either rely on undef/unreachable too pervasively to be
restored to something well-defined (particularly while making sure
they test the same obscure assert from many years ago), or depend on a
particular CFG shape, which is disrupted by SimplifyCFG.

rdar://problem/16227836

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209883 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-30 10:09:59 +00:00
Tim Northover
7be505ae88 AArch64 & ARM: remove undefined behaviour from some tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209880 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-30 08:59:55 +00:00
Hao Liu
fd481d05be Test cases named with dates is a legacy rule not used now. Rename several test cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209877 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-30 05:58:19 +00:00
Adam Nemet
0997206ac4 [X86] Move test from r209863 to CodeGen/X86
We should only run this if X86 is in the targets.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209866 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-29 23:52:53 +00:00
Adam Nemet
7cd893a985 [X86] Remove AVX1 vbroadcast intrinsics
The corresponding CFE patch replaces these intrinsics with vector initializers
in avxintrin.h.  This patch removes the LLVM intrinsics from the backend.

We now stop lowering at X86ISD::VBROADCAST custom node rather than lowering
that further to the intrinsics.

The patch only changes VBROADCASTS* and leaves VBROADCAST[FI]128 to continue
to use intrinsics.  As explained in the CFE patch, the reason is that we
currently don't generate as good code for them without the intrinsics.

CodeGen/X86/avx-vbroadcast.ll already provides coverage for this change.  It
checks that for a series of insertelements we generate the appropriate
vbroadcast instruction.

Also verified that there was no assembly change in the test-suite before and
after this patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209864 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-29 23:35:36 +00:00
Filipe Cabecinhas
ade072c1a9 Added tests for shufflevector lowering to blend instrs.
These tests ensure that a change I will propose in clang works as
expected.

Summary:
Added tests for the generation of blend+immediate instructions from a
shufflevector.
These tests were proposed along with a patch that was dropped. I'm
committing the tests anyway to protect against possible regressions in
codegen.

Reviewers: nadav, bkramer

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D3600

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209853 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-29 22:04:42 +00:00
Rafael Espindola
289a9d75de [PPC] Use alias symbols in address computation.
This seems to match what gcc does for ppc and what every other llvm
backend does.

This is a fixed version of r209638. The difference is to avoid any change
in behavior for functions. The logic for using constant pools for function
addresseses is spread over a few places and we have to keep them in sync.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209821 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-29 15:41:38 +00:00
Rafael Espindola
f5df18bff0 Add a test showing the ppc code sequence for getting a function pointer.
This would have found the miscompile in r209638.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209820 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-29 15:13:23 +00:00
Hao Liu
086a708135 Rename a test case to contain correct date info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209799 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-29 09:21:23 +00:00
Hao Liu
bb7f18abf8 Fix an assertion failure caused by v1i64 in DAGCombiner Shrink.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209798 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-29 09:19:07 +00:00
Michael J. Spencer
11ef9456a8 [x86] Fold extract_vector_elt of a load into the Load's address computation.
An address only use of an extract element of a load can be simplified to a
load. Without this the result of the extract element is spilled to the
stack so that an address is available.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209788 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-29 01:42:45 +00:00
Rafael Espindola
665d42accf [pr19844] Add thread local mode to aliases.
This matches gcc's behavior. It also seems natural given that aliases
contain other properties that govern how it is accessed (linkage,
visibility, dll storage).

Clang still has to be updated to expose this feature to C.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209759 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-28 18:15:43 +00:00
Hal Finkel
9b77161927 Revert "[DAGCombiner] Split up an indexed load if only the base pointer value is live"
This reverts r208640 (I've just XFAILed the test) because it broke ppc64/Linux
self-hosting. Because nearly every regression test triggers a segfault, I hope
this will be easy to fix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209747 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-28 15:33:19 +00:00
Hal Finkel
b8af23fe1e Revert "[PPC] Use alias symbols in address computation."
This reverts commit r209638 because it broke self-hosting on ppc64/Linux. (the
Clang-compiled TableGen would segfault because it jumped to an invalid address
from within _ZNK4llvm17ManagedStaticBase21RegisterManagedStaticEPFPvvEPFvS1_E
(which is within the command-line parameter registration process)).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209745 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-28 15:25:06 +00:00
Tilmann Scheller
d8ba67b97b [AArch64] Add store post-index update folding regression tests for the load/store optimizer.
Add regression tests for the following transformation:

  str X, [x20]
   ...
  add x20, x20, #32
   ->
  str X, [x20], #32

with X being either w0, x0, s0, d0 or q0.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209715 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-28 06:43:00 +00:00