4 Commits

Author	SHA1	Message	Date
Kevin Enderby	87f4a1a433	Added a few tweaks to the Intel Descriptor-table support instructions to allow ... word forms and suffixed versions to match the darwin assembler in 32-bit and 64-bit modes. This is again for use just with assembly source for llvm-mc . git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116773 91177308-0d34-0410-b5e6-96231b3b80d8	2010-10-19 00:01:44 +00:00
Kevin Enderby	7aef62ff8c	Added a handful of x86-32 instructions that were missing so that llvm-mc would ... be more complete. These are only expected to be used by llvm-mc with assembly source so there is no pattern, [], in the .td files. Most are being added to X86InstrInfo.td as Chris suggested and only comments about register uses are added. Suggestions welcome on the .td changes as I'm not sure on every detail of the x86 records. More missing instructions will be coming. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116716 91177308-0d34-0410-b5e6-96231b3b80d8	2010-10-18 17:04:36 +00:00
Chris Lattner	508fc4708b	Replace a gross hack (the MOV64ri_alt instruction) with a slightly less ... gross hack (having the asmmatcher handle the alias). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115685 91177308-0d34-0410-b5e6-96231b3b80d8	2010-10-05 21:09:45 +00:00
Chris Lattner	3286db670c	move X86 subdir up a level ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115292 91177308-0d34-0410-b5e6-96231b3b80d8	2010-10-01 04:32:20 +00:00