Commit Graph

3393 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen
89cab93fe9 Pass a Banner argument to the machine code verifier both from
createMachineVerifierPass and MachineFunction::verify.

The banner is printed before the machine code dump, just like the printer pass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122113 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-18 00:06:56 +00:00
Jakob Stoklund Olesen
8d12140437 Avoid dereferencing end() in collectInterferingVRegs() when there is no
interference.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122108 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-17 23:16:38 +00:00
Jakob Stoklund Olesen
f428eb6c1b Enable loop splitting in RegAllocGreedy.
The heuristics split around the largest loop where the current register may be
allocated without interference.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122106 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-17 23:16:32 +00:00
Jakob Stoklund Olesen
090100fdb1 Add MachineLoopRange comparators for sorting loop lists by number and by area.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122073 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-17 18:13:52 +00:00
Jakob Stoklund Olesen
ff2e9b4225 Provide LiveIntervalUnion::Query::checkLoopInterference.
This is a three-way interval list intersection between a virtual register, a
live interval union, and a loop. It will be used to identify interference-free
loops for live range splitting.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122034 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-17 04:09:47 +00:00
Jakob Stoklund Olesen
ceadc01e91 Add MachineLoopRanges analysis.
A MachineLoopRange contains the intervals of slot indexes covered by the blocks
in a loop. This representation of the loop blocks is more efficient to compare
against interfering registers during register coalescing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121917 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 23:41:23 +00:00
Jakob Stoklund Olesen
e69b4ab829 Add SlotIndexes::getMBBRange() to get the range of a basic block in a single
lookup.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121893 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-15 20:40:22 +00:00
Rafael Espindola
89b9372605 Fixed version of 121434 with no new memory leaks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121471 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-10 07:39:47 +00:00
Rafael Espindola
f7fd4aa261 Revert my previous patch to make the valgrind bots happy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121461 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-10 04:01:09 +00:00
Rafael Espindola
1c952b9cc9 Initial support for the cfi directives. This is just enough to get
f:
        .cfi_startproc
        nop
        .cfi_endproc

assembled (on ELF).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121434 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-09 23:48:29 +00:00
Lang Hames
35f4cf0474 Fixed some dependencies in RegAllocPBQP.h . Thanks to Borja Ferrer for pointing out this issue.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121292 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-08 22:15:32 +00:00
Andrew Trick
6b1207267f Generalize PostRAHazardRecognizer so it can be used in any pass for
both forward and backward scheduling. Rename it to
ScoreboardHazardRecognizer (Scoreboard is one word). Remove integer
division from the scoreboard's critical path.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121274 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-08 20:04:29 +00:00
Jakob Stoklund Olesen
cba2e06d52 Stub out RegAllocGreedy.
This new register allocator is initially identical to RegAllocBasic, but it will
receive all of the tricks that RegAllocBasic won't get.

RegAllocGreedy will eventually replace linear scan.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121234 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-08 03:26:16 +00:00
Jakob Stoklund Olesen
0613516b16 Implement the first half of LiveDebugVariables.
Scan the MachineFunction for DBG_VALUE instructions, and replace them with a
data structure similar to LiveIntervals. The live range of a DBG_VALUE is
determined by propagating it down the dominator tree until a new DBG_VALUE is
found. When a DBG_VALUE lives in a register, its live range is confined to the
live range of the register's value.

LiveDebugVariables runs before coalescing, so DBG_VALUEs are not artificially
extended when registers are joined.

The missing half will recreate DBG_VALUE instructions from the intervals when
register allocation is complete.

The pass is disabled by default. It can be enabled with the temporary command
line option -live-debug-variables.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120636 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-02 00:37:37 +00:00
Evan Cheng
3d2125c9db Enable sibling call optimization of libcalls which are expanded during
legalization time. Since at legalization time there is no mapping from
SDNode back to the corresponding LLVM instruction and the return
SDNode is target specific, this requires a target hook to check for
eligibility. Only x86 and ARM support this form of sibcall optimization
right now.
rdar://8707777


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120501 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-30 23:55:39 +00:00
Michael J. Spencer
1f6efa3996 Merge System into Support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120298 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-29 18:16:10 +00:00
Benjamin Kramer
dd1fc8cbf1 SDep is POD-like. Shave off a few bytes from SUnit by moving a member around.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120150 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-25 17:50:19 +00:00
Wesley Peck
bf17cfa3f9 Renaming ISD::BIT_CONVERT to ISD::BITCAST to better reflect the LLVM IR concept.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119990 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-23 03:31:01 +00:00
Chris Lattner
cbd323ad52 add some helper methods for asmprinter flags, from PR8417
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119932 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-21 08:30:55 +00:00
Duncan Sands
59d2dad59e On X86, MEMBARRIER, MFENCE, SFENCE, LFENCE are not target memory intrinsics,
so don't claim they are.  They are allocated using DAG.getNode, so attempts
to access MemSDNode fields results in reading off the end of the allocated
memory.  This fixes crashes with "llc -debug" due to debug code trying to
print MemSDNode fields for these barrier nodes (since the crashes are not
deterministic, use valgrind to see this).  Add some nasty checking to try
to catch this kind of thing in the future.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119901 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-20 11:25:00 +00:00
Dan Gohman
8ec9d62380 Rename ExpandPseudos to ExpandISelPseudos to help clarify its role.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119716 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-18 18:45:06 +00:00
Chris Lattner
a38941d458 refactor the interface to EmitInlineAsm a bit, no functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119482 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-17 07:53:40 +00:00
Dan Gohman
668ac2fdae Split pseudo-instruction expansion into a separate pass, to make it
easier to debug, and to avoid complications when the CFG changes
in the middle of the instruction selection process.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119382 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-16 21:02:37 +00:00
Chris Lattner
142b531e02 move the pic base symbol stuff up to MachineFunction
since it is trivial and will be shared between ppc and x86.
This substantially simplifies the X86 backend also.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119089 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-14 22:48:15 +00:00
Chris Lattner
ccb5c677c6 add operand iterator apis to MachineInstr, patch by ether zhhb.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118862 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-12 00:00:21 +00:00
Jakob Stoklund Olesen
1e8e72d72a Insert two blank SlotIndexes between basic blocks instead of just one.
This is the first small step towards using closed intervals for liveness instead
of the half-open intervals we're using now.

We want to be able to distinguish between a SlotIndex that represents a variable
being live-out of a basic block, and an index representing a variable live-in to
its successor.

That requires two separate indexes between blocks. One for live-outs and one for
live-ins.

With this change, getMBBEndIdx(MBB).getPrevSlot() becomes stable so it stays
greater than any instructions inserted at the end of MBB.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118747 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-11 00:19:20 +00:00
Jakob Stoklund Olesen
01f98abe3e Delete unused function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118743 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-10 23:56:02 +00:00
Andrew Trick
f4baeaf848 RABasic is nearly functionally complete. There are a few remaining
benchmarks hitting an assertion.
Adds LiveIntervalUnion::collectInterferingVRegs.
Fixes "late spilling" by checking for any unspillable live vregs among
all physReg aliases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118701 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-10 19:18:47 +00:00
Benjamin Kramer
f788854d20 Prune includes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118342 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-06 11:45:59 +00:00
Duncan Sands
1e96bab329 In the calling convention logic, ValVT is always a legal type,
and as such can be represented by an MVT - the more complicated
EVT is not needed.  Use MVT for ValVT everywhere.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118245 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-04 10:49:57 +00:00
Duncan Sands
cdfad36b40 Simplify uses of MVT and EVT. An MVT can be compared directly
with a SimpleValueType, while an EVT supports equality and
inequality comparisons with SimpleValueType.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118169 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03 12:17:33 +00:00
Duncan Sands
538b0cdc76 Fix a comment typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118168 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03 11:55:03 +00:00
Duncan Sands
1440e8b918 Inside the calling convention logic LocVT is always a simple
value type, so there is no point in passing it around using
an EVT.  Use the simpler MVT everywhere.  Rather than trying
to propagate this information maximally in all the code that
using the calling convention stuff, I chose to do a mainly
low impact change instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118167 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03 11:35:31 +00:00
Evan Cheng
8239daf7c8 Two sets of changes. Sorry they are intermingled.
1. Fix pre-ra scheduler so it doesn't try to push instructions above calls to
   "optimize for latency". Call instructions don't have the right latency and
   this is more likely to use introduce spills.
2. Fix if-converter cost function. For ARM, it should use instruction latencies,
   not # of micro-ops since multi-latency instructions is completely executed
   even when the predicate is false. Also, some instruction will be "slower"
   when they are predicated due to the register def becoming implicit input.
   rdar://8598427


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118135 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-03 00:45:17 +00:00
Duncan Sands
9da4243430 Add some comments explaining what MVT and EVT are, and how they differ.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118014 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-02 13:57:09 +00:00
Duncan Sands
3127c7cc40 Remove trailing whitespace.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118013 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-02 13:43:07 +00:00
Nicolas Geoffray
7a5a3f75eb Attach a GCModuleInfo to a MachineFunction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117867 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-31 20:38:38 +00:00
Duncan Sands
0acfa8db3f Explain the return value of CCAssignFn.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117854 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-31 10:29:14 +00:00
Chris Lattner
16c3b647eb Rename alignof -> alignOf to avoid irritating C++'0x compilers,
PR8423, patch by nobled.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117774 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 05:14:01 +00:00
Jakob Stoklund Olesen
92095e7b3f Add SkipPHIsAndLabels from PHIElimination to MachineBasicBlock. It is needed
elsewhere.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117763 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 01:26:14 +00:00
John Thompson
44ab89eb37 Inline asm multiple alternative constraints development phase 2 - improved basic logic, added initial platform support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117667 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 17:29:13 +00:00
Jakob Stoklund Olesen
cb367778c0 Print out the connected components in the verifier after complaining about their
multiplicity.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117630 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29 00:40:57 +00:00
Dale Johannesen
1de4aa904e Use a MemIntrinsicSDNode for ISD::PREFETCH, which touches
memory, so a MachineMemOperand is useful (not propagated
into the MachineInstr yet).  No functional change except
for dump output.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117413 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 23:11:10 +00:00
Jakob Stoklund Olesen
f4a1e1a69f Teach MachineBasicBlock::print() to annotate instructions and blocks with
SlotIndexes when available.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117392 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 20:21:46 +00:00
Jakob Stoklund Olesen
2d17293dd0 Make the spiller responsible for updating the LiveStacks analysis.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117337 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 00:11:33 +00:00
Devang Patel
df8370bd70 Simplify.
Do not count use of sdisel for single call instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117316 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 21:31:46 +00:00
Devang Patel
9c11be222c Update SelectBasicBlock signature. This should have been committed with r117310.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117312 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 21:04:12 +00:00
Andrew Trick
14e8d71cc9 This is a prototype of an experimental register allocation
framework. It's purpose is not to improve register allocation per se,
but to make it easier to develop powerful live range splitting. I call
it the basic allocator because it is as simple as a global allocator
can be but provides the building blocks for sophisticated register
allocation with live range splitting. 

A minimal implementation is provided that trivially spills whenever it
runs out of registers. I'm checking in now to get high-level design
and style feedback. I've only done minimal testing. The next step is
implementing a "greedy" allocation algorithm that does some register
reassignment and makes better splitting decisions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117174 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 23:09:15 +00:00
Evan Cheng
b179b46cc5 Transfer implicit ops when forming load multiple and return instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117151 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-22 21:29:58 +00:00
Michael J. Spencer
dd0a00a6e3 CodeGen-Windows: Only emit _fltused if a VarArg function is called with floating point args.
This should be the minimum set of functions that could possibly need it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116978 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-21 00:08:21 +00:00