Commit Graph

119252 Commits

Author SHA1 Message Date
Matthias Braun
3c76e5f588 Test for specific output in lit test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241200 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-01 22:34:59 +00:00
Alexey Samsonov
739ded16a5 [LoopVectorize] Use ReplaceInstWithInst() helper where appropriate.
This is mostly an NFC, which increases code readability (instead of
saving old terminator, generating new one in front of old, and deleting
old, we just call a function). However, it would additionaly copy
the debug location from old instruction to replacement, which
would help PR23837.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241197 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-01 22:18:30 +00:00
Pete Cooper
f89e1bdc1a Pack MCSymbol::Flags in to the bitfield with other members. NFC.
All file formats only needed 16-bits right now which is enough to fit
in to the padding with other fields.

This reduces the size of MCSymbol to 24-bytes on a 64-bit system.  The
layout is now

   0 | class llvm::MCSymbol
   0 |   class llvm::PointerIntPair SectionOrFragmentAndHasName
   0 |     intptr_t Value
     |   [sizeof=8, dsize=8, align=8
     |    nvsize=8, nvalign=8]

   8 |   unsigned int IsTemporary
   8 |   unsigned int IsRedefinable
   8 |   unsigned int IsUsed
   8 |   _Bool IsRegistered
   8 |   unsigned int IsExternal
   8 |   unsigned int IsPrivateExtern
   8 |   unsigned int Kind
   9 |   unsigned int IsUsedInReloc
   9 |   unsigned int SymbolContents
   9 |   unsigned int CommonAlignLog2
  10 |   uint32_t Flags
  12 |   uint32_t Index
  16 |   union
  16 |     uint64_t Offset
  16 |     uint64_t CommonSize
  16 |     const class llvm::MCExpr * Value
     |   [sizeof=8, dsize=8, align=8
     |    nvsize=8, nvalign=8]

     | [sizeof=24, dsize=24, align=8
     |  nvsize=24, nvalign=8]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241196 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-01 21:57:51 +00:00
Dan Gohman
1efcdba0e2 [WebAssembly] Define separate Target instances for 32-bit and 64-bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241193 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-01 21:42:34 +00:00
Jingyue Wu
e08f05f3a5 [NVPTX] expand extload/truncstore for vectors of floats
Summary:
According to PTX ISA:

For convenience, ld, st, and cvt instructions permit source and destination data operands to be wider than the instruction-type size, so that narrow values may be loaded, stored, and converted using regular-width registers. For example, 8-bit or 16-bit values may be held directly in 32-bit or 64-bit registers when being loaded, stored, or converted to other types and sizes. The operand type checking rules are relaxed for bit-size and integer (signed and unsigned) instruction types; floating-point instruction types still require that the operand type-size matches exactly, unless the operand is of bit-size type.

So, the ISA does not support load with extending/store with truncatation for floating numbers. This is reflected in setting the loadext/truncstore actions to expand in the code for floating numbers, but vectors of floating numbers are not taken care of.

As a result, loading a vector of floats followed by a fp_extend may be combined by DAGCombiner to a extload, and the extload may be lowered to NVPTXISD::LoadV2 with extending information. However, NVPTXISD::LoadV2 does not perform extending, and no extending instructions are inserted. Finally, PTX instructions with mismatched types are generated, like
ld.v2.f32 {%fd3, %fd4}, [%rd2]

This patch adds the correct actions for vectors of floats, so DAGCombiner would not create loads with extending, and correct code is generated.

Patched by Gang Hu. 

Test Plan: Test case attached.

Reviewers: jingyue

Reviewed By: jingyue

Subscribers: llvm-commits, jholewinski

Differential Revision: http://reviews.llvm.org/D10876

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241191 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-01 21:32:42 +00:00
Pete Cooper
f77ca9f85f Encode MCSymbol alignment as log2(align).
Given that alignments are always powers of 2, just encode it this way.

This matches how we encode alignment on IR GlobalValue's for example.

This compresses the CommonAlign member down to 5 bits which allows it
to pack better with the surrounding fields.

Reviewed by Duncan Exon Smith.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241189 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-01 21:07:03 +00:00
Reid Kleckner
8a1df9b25f [WinEH] Use llvm.x86.seh.recoverfp in WinEHPrepare
Don't pattern match for frontend outlined finally calls on non-x64
platforms. The 32-bit runtime uses a different funclet prototype.  Now,
the frontend is pre-outlining the finally bodies so that it ends up
doing most of the heavy lifting for variable capturing. We're just
outlining the callsite, and adapting the frameaddress(0) call to line up
the frame pointer recovery.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241186 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-01 20:59:25 +00:00
Jingyue Wu
8f2981cb40 [NVPTX] Move NVPTXPeephole after NVPTXPrologEpilogPass
Summary:
Offset of frame index is calculated by NVPTXPrologEpilogPass. Before
that the correct offset of stack objects cannot be obtained, which
leads to wrong offset if there are more than 2 frame objects. This patch
move NVPTXPeephole after NVPTXPrologEpilogPass. Because the frame index
is already replaced by %VRFrame in NVPTXPrologEpilogPass, we check
VRFrame register instead, and try to remove the VRFrame if there
is no usage after NVPTXPeephole pass.

Patched by Xuetian Weng. 

Test Plan:
Strengthened test/CodeGen/NVPTX/local-stack-frame.ll to check the
offset calculation based on SP and SPL.

Reviewers: jholewinski, jingyue

Reviewed By: jingyue

Subscribers: jholewinski, llvm-commits

Differential Revision: http://reviews.llvm.org/D10853

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241185 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-01 20:08:06 +00:00
Bill Schmidt
9215b9ab25 [PPC64LE] Enable missing lxvdsx optimization, and related swap optimization
When adding little-endian vector support for PowerPC last year, I
inadvertently disabled an optimization that recognizes a load-splat
idiom and generates the lxvdsx instruction.  This patch moves the
offending logic so lxvdsx is once again generated.

This pattern is frequently generated by the vectorizer for scalar
loads of an effective constant.  Previously the lxvdsx instruction was
wrongly listed as lane-sensitive for the VSX swap optimization (since
both doublewords are identical, swaps are safe).  This patch fixes
this as well, so that vectorized code using lxvdsx can now have swaps
removed from the computation.

There is an existing test (@test50) in test/CodeGen/PowerPC/vsx.ll
that checks for the missing optimization.  However, vsx.ll was only
being tested for POWER7 with big-endian code generation.  I've added
a little-endian RUN statement and expected LE code generation for all
the tests in vsx.ll to give us a bit better VSX coverage, including
what's needed for this patch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241183 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-01 19:40:07 +00:00
Sanjay Patel
7472456fe9 add a cl::opt override for TargetLoweringBase's JumpIsExpensive
This patch is not intended to change existing codegen behavior for any target. 
It just exposes the JumpIsExpensive setting on the command-line to allow for
easier testing and emergency overrides.

Also, change the existing regression test to use FileCheck, explicitly specify
the jump-is-expensive option, and use more precise checks.

Differential Revision: http://reviews.llvm.org/D10846



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241179 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-01 18:10:20 +00:00
Jonathan Roelofs
4b64e72fdd Disallow in-source builds (as we already do for the cmake build).
http://reviews.llvm.org/D10614


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241178 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-01 18:09:21 +00:00
David Blaikie
b99e0eb947 Revert "[DWARF] Fix debug info generation for function static variables, typedefs, and records"
Caused PR24008

This reverts commit 37cb5f1c2d.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241176 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-01 18:07:16 +00:00
Sanjay Patel
89ec7f0069 fix formatting; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241175 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-01 17:58:53 +00:00
Sanjay Patel
b3d73f5064 fix typos in comment; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241174 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-01 17:55:07 +00:00
Matthias Braun
08f65f9d69 LivePhysRegs: Add support to add pristine registers when populating with live-in/live-out registers.
Differential Revision: http://reviews.llvm.org/D10139

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241172 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-01 17:17:17 +00:00
Reid Kleckner
1804878f0c [SEH] Don't assert if the parent function lacks a personality
The EH code might have been deleted as unreachable and the personality
pruned while the filter is still present.  Currently I'm hitting this at
-O0 due to the clang bug PR24009.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241170 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-01 16:45:47 +00:00
Benjamin Kramer
a2b83fd687 [AsmPrinter] Hide implementation details
NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241169 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-01 16:18:16 +00:00
Arnaud A. de Grandmaison
bdaa375556 [AArch64] Implement add/adds/sub/subs/cmp/cmn with negative immediate aliases
This patch teaches the AsmParser to accept add/adds/sub/subs/cmp/cmn
with a negative immediate operand and convert them as shown:

  add  Rd, Rn, -imm -> sub  Rd, Rn, imm
  sub  Rd, Rn, -imm -> add  Rd, Rn, imm
  adds Rd, Rn, -imm -> subs Rd, Rn, imm
  subs Rd, Rn, -imm -> adds Rd, Rn, imm
  cmp  Rn, -imm     -> cmn  Rn, imm
  cmn  Rn, -imm     -> cmp  Rn, imm

Those instructions are an alternate syntax available to assembly coders,
and are needed in order to support code already compiling with some other
assemblers (gas). They are documented in the "ARMv8 Instruction Set
Overview", in the "Arithmetic (immediate)" section. This makes llvm-mc
a programmer-friendly assembler !

This also fixes PR20978: "Assembly handling of adding negative numbers
not as smart as gas".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241166 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-01 15:05:58 +00:00
Benjamin Kramer
3690da1dfa [SDAG] Give InstrEmitter hidden visibility
NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241165 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-01 14:55:10 +00:00
Benjamin Kramer
b453775cc2 [CodeGen] Reduce visibility of implementation details
NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241164 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-01 14:47:39 +00:00
James Y Knight
bcc1a5c01a [Sparc] Rearrange SparcInstrInfo, no change.
Move some instructions into order of sections in the spec, as the rest
already were.

Differential Revision: http://reviews.llvm.org/D9102

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241163 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-01 14:38:07 +00:00
Michael Kuperstein
2d2fd3219d Test committed in r241153 is more target-specific than I thought.
Moving the (original, x86-only) test to the X86 directory.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241162 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-01 13:45:25 +00:00
Scott Douglass
7e6843cbd6 Expand Phabricator docs slightly
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241161 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-01 13:41:18 +00:00
Igor Breger
2ae30810d8 AVX-512: Implemented missing encoding for FMA scalar instructions
Added tests for encoding

Differential Revision: http://reviews.llvm.org/D10865

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241159 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-01 13:24:28 +00:00
Michael Kuperstein
456ac28870 Fix non-target-specific test not to use the x86 triple.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241158 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-01 13:05:57 +00:00
Rafael Espindola
df3edb6d36 Return ErrorOr from getSection.
This also improves the logic of what is an error:

* getSection(uint_32): only return an error if the index is out of bounds. The
  index 0 corresponds to a perfectly valid entry.
* getSection(Elf_Sym): Returns null for symbols that normally don't have
  sections and error for out of bound indexes.

In many places this just moves the report_fatal_error up the stack, but those
can then be fixed in smaller patches.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241156 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-01 12:56:27 +00:00
Michael Kuperstein
37cb5f1c2d [DWARF] Fix debug info generation for function static variables, typedefs, and records
Function static variables, typedefs and records (class, struct or union) declared inside
a lexical scope were associated with the function as their parent scope, rather than the
lexical scope they are defined or declared in.

This fixes PR19238

Patch by: amjad.aboud@intel.com
Differential Revision: http://reviews.llvm.org/D9758

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241153 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-01 12:33:11 +00:00
Michael Kuperstein
5020a9198d [X86] Avoid over-relaxation of 8-bit immediates in integer arithmetic instructions.
Only consider an instruction a candidate for relaxation if the last operand of the 
instruction is an expression. We previously checked whether any operand is an expression,
which is useless, since for all instructions concerned, the only operand that may be
affected by relaxation is the last one.
In addition, this removes the check for having RIP as an argument, since it was 
plain wrong - even when one of the arguments is RIP, relaxation may still be needed.

This fixes PR9807.

Patch by: david.l.kreitzer@intel.com
Differential Revision: http://reviews.llvm.org/D10766

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241152 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-01 10:54:42 +00:00
NAKAMURA Takumi
275fa93acf Revert part of r241149, "Fix PR23872: Integrated assembler error message when using .type directive with @ in AArch32 assembly."
The test should be split among targets. llvm/test/MC/ELF/ is assumed as X86.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241151 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-01 10:28:09 +00:00
Zoran Jovanovic
627c5342b2 [mips][microMIPS] Implement SLL and NOP instructions
http://reviews.llvm.org/D10474


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241150 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-01 09:54:51 +00:00
Gabor Ballabas
9f9bf86ed5 Fix PR23872: Integrated assembler error message when using .type directive with @ in AArch32 assembly.
The AArch32 assembler parses the '@' as a comment symbol, so the error message shouldn't suggest
that '@<type>' is a valid replacement when assembling for AArch32 target.

Differential Revision: http://reviews.llvm.org/D10651 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241149 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-01 08:58:49 +00:00
David Majnemer
787b9b4e95 [LoopUnroll] Use undef for phis with no value live
We would create a phi node with a zero initialized operand instead of
undef in the case where no value was originally available.  This was
problematic for x86_mmx which has no null value.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241143 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-01 05:38:07 +00:00
David Majnemer
284c49c36f [SCCP] Turn loads of null into undef instead of zero initialized values
Surprisingly, this is a correctness issue: the mmx type exists for
calling convention purposes, LLVM doesn't have a zero representation for
them.

This partially fixes PR23999.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241142 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-01 05:37:57 +00:00
Jingyue Wu
4015c5e2e4 [NaryReassociate] enhances nsw by leveraging @llvm.assume
Summary:
nsw are flaky and can often be removed by optimizations. This patch enhances
nsw by leveraging @llvm.assume in the IR. Specifically, NaryReassociate now
understands that

    assume(a + b >= 0) && assume(a >= 0) ==> a +nsw b

As a result, it can split more sext(a + b) into sext(a) + sext(b) for CSE.

Test Plan: nary-gep.ll

Reviewers: broune, meheff

Subscribers: jholewinski, llvm-commits

Differential Revision: http://reviews.llvm.org/D10822

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241139 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-01 03:38:49 +00:00
JF Bastien
60085fb9cd Getting started docs: https, and check signature
Summary: Download should be over https, not insecure ftp at least for the signature and key files. The signature should also get verified.

Test Plan: None

Reviewers: chandlerc

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10845

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241138 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-01 03:32:08 +00:00
Alexey Samsonov
327cfdf4fe [SanitizerCoverage] Don't add instrumentation to unreachable blocks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241127 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-30 23:11:45 +00:00
Mark Heffernan
8043a59b7c Fix several typos in LangRef.rst related to loop unrolling metadata.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241126 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-30 22:48:51 +00:00
Reid Kleckner
34c6bb0ef0 [SEH] Add new intrinsics for recovering and restoring parent frames
The incoming EBP value established by the runtime is actually a pointer
to the end of the EH registration object, and not the true parent
function frame pointer. Clang doesn't need llvm.x86.seh.exceptioninfo
anymore because we know that the exception info pointer is at a fixed
offset from this incoming EBP.

The llvm.x86.seh.recoverfp intrinsic takes an EBP value provided by the
EH runtime and returns a pointer that is usable with llvm.framerecover.

The llvm.x86.seh.restoreframe intrinsic is inserted by the 32-bit
specific preparation pass in blocks targetted by the EH runtime. It
re-establishes any physical registers used by the parent function to
address the stack, such as the frame, base, and stack pointers.

Neither of these intrinsics correctly handle stack realignment prologues
yet, but it's possible to add that later.

Reviewers: majnemer

Differential Revision: http://reviews.llvm.org/D10848

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241125 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-30 22:46:59 +00:00
Alexey Samsonov
b5778f2e34 [IRBuilder] Delete unused constructor and SetInsertPoint overload.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241124 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-30 22:38:22 +00:00
Alexey Samsonov
838b35dbd4 Fix memory leak in unittest added in r241101.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241123 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-30 22:17:29 +00:00
David Majnemer
5ca5b0d9f4 [Cloning] Teach CloneModule about personality functions
CloneModule didn't take into account that it needed to remap the value
using values in the module.

This fixes PR23992.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241122 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-30 22:14:01 +00:00
Jingyue Wu
10a3a33df0 [NVPTX] cleanups and refacotring in NVPTXFrameLowering.cpp
Summary: NFC

Test Plan: no regression

Reviewers: wengxt

Reviewed By: wengxt

Subscribers: jholewinski, llvm-commits

Differential Revision: http://reviews.llvm.org/D10849

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241118 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-30 21:28:31 +00:00
Sanjoy Das
e1e95c11b8 [FaultMaps] Let the frontend pre-select implicit null check candidates.
Summary:
This change introduces a !make.implicit metadata that allows the
frontend to pre-select the set of explicit null checks that will be
considered for transformation into implicit null checks.

The reason for not using profiling data instead of !make.implicit is
explained in the change to `FaultMaps.rst`.

Reviewers: atrick, reames, pgavlin, JosephTremoulet

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10824

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241116 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-30 21:22:32 +00:00
Pete Cooper
8cdbab9dd6 Pack MCSymbol::HasName in to a spare bit in the section/fragment union.
This is part of an effort to pack the average MCSymbol down to 24 bytes.

The HasName bit was pushing the size of the bitfield over to another word,
so this change uses a PointerIntPair to fit in it to unused bits of a
PointerUnion.

Reviewed by Rafael Espíndola

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241115 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-30 20:54:21 +00:00
Rafael Espindola
28a83187a2 Use ErrorOr in getRelocationAdress.
We can probably do better in this method, but this is an improvement and
enables further ErrorOr cleanups.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241114 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-30 20:32:26 +00:00
Rafael Espindola
d231306ba8 Implement containsSymbol with other lower level methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241112 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-30 20:18:49 +00:00
Nemanja Ivanovic
ce772898d6 Modified a comment about the reason for the patch (removed commented code).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241110 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-30 20:01:16 +00:00
Rafael Espindola
4a04da337e Remove Elf_Shdr_Iter. Diagnose files with invalid section header sizes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241109 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-30 19:58:10 +00:00
Nemanja Ivanovic
482f87058a Fixes a bug with __builtin_vsx_lxvdw4x on Little Endian systems
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241108 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-30 19:45:45 +00:00
Rafael Espindola
60e53b2777 Use range loops. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241105 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-30 19:24:51 +00:00