Commit Graph

119252 Commits

Author SHA1 Message Date
Rafael Espindola
6909cca568 Simplify isObject. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240783 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-26 13:24:23 +00:00
Toma Tabacu
aafe2ca7d5 [mips] [IAS] Add partial support for the ULW pseudo-instruction.
Summary:
This only adds support for ULW of an immediate address with/without a source register.
It does not include support for ULW of the address of a symbol.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9663

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240782 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-26 13:20:17 +00:00
Rafael Espindola
37c948ae79 Implement elf_section_iterator and getELFType().
And with those, simplify getSymbolNMTypeChar.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240780 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-26 13:11:15 +00:00
Rafael Espindola
5add4ddba8 Expose getFlags via ELFSectionRef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240779 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-26 12:44:10 +00:00
Rafael Espindola
db7a9f12bc Add a ELFSectionRef class and use it to expose getSectionType.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240778 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-26 12:33:37 +00:00
Rafael Espindola
50bea40e8e Simplify getSymbolType.
This is still a really odd function. Most calls are in object format specific
contexts and should probably be replaced with a more direct query, but at least
now this is not too obnoxious to use.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240777 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-26 12:18:49 +00:00
Javed Absar
5511d97506 [ARM] Cortex-R4F is not VFPOnlySP
Cortex-R4F TRM states that fpu supports both single and double precision.
This patch corrects the information in ARM.td file and corresponding test.

Reviewers: rengolin

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10763



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240776 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-26 12:14:56 +00:00
Rafael Espindola
3e750a4ebf Make getOther ELF only.
No other format has this field.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240774 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-26 11:39:57 +00:00
Rafael Espindola
8b8feaae29 Optimize the creation of mapping symbols.
No need to create two symbols just to assign one to the other.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240773 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-26 11:31:13 +00:00
Sergey Dmitrouk
d4b0d61105 Do not ignore projects/LLVMBuild.txt in git repo
Without explicit exception for the path, it matches projects/* rule.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240771 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-26 10:13:56 +00:00
David Majnemer
891c0208fe [X86] Cleanup X86WindowsTargetObjectFile::getSectionForConstant
No functionality changed, just keeping things clean.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240762 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-26 07:03:12 +00:00
Hao Liu
fabf219603 [InterleavedAccess] Fix failures "undefined type 'llvm::raw_ostream'" on windows.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240760 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-26 04:38:21 +00:00
Hao Liu
5be64c403b [ARM] Lower interleaved memory accesses to vldN/vstN intrinsics.
This patch also adds a function to calculate the cost of interleaved memory accesses.

E.g. Lower an interleaved load:
        %wide.vec = load <8 x i32>, <8 x i32>* %ptr, align 4
        %v0 = shuffle %wide.vec, undef, <0, 2, 4, 6>
        %v1 = shuffle %wide.vec, undef, <1, 3, 5, 7>
     into:
        %vld2 = { <4 x i32>, <4 x i32> } call llvm.arm.neon.vld2(%ptr, 4)
        %vec0 = extractelement { <4 x i32>, <4 x i32> } %vld2, i32 0
        %vec1 = extractelement { <4 x i32>, <4 x i32> } %vld2, i32 1

E.g. Lower an interleaved store:
        %i.vec = shuffle <8 x i32> %v0, <8 x i32> %v1, <0, 4, 8, 1, 5, 9, 2, 6, 10, 3, 7, 11>
        store <12 x i32> %i.vec, <12 x i32>* %ptr, align 4
     into:
        %sub.v0 = shuffle <8 x i32> %v0, <8 x i32> v1, <0, 1, 2, 3>
        %sub.v1 = shuffle <8 x i32> %v0, <8 x i32> v1, <4, 5, 6, 7>
        %sub.v2 = shuffle <8 x i32> %v0, <8 x i32> v1, <8, 9, 10, 11>
        call void llvm.arm.neon.vst3(%ptr, %sub.v0, %sub.v1, %sub.v2, 4)

Differential Revision: http://reviews.llvm.org/D10533


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240755 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-26 02:45:36 +00:00
Hao Liu
380417ac84 [AArch64] Lower interleaved memory accesses to ldN/stN intrinsics. This patch also adds a function to calculate the cost of interleaved memory accesses.
E.g. Lower an interleaved load:
        %wide.vec = load <8 x i32>, <8 x i32>* %ptr
        %v0 = shuffle %wide.vec, undef, <0, 2, 4, 6>
        %v1 = shuffle %wide.vec, undef, <1, 3, 5, 7>
     into:
        %ld2 = { <4 x i32>, <4 x i32> } call llvm.aarch64.neon.ld2(%ptr)
        %vec0 = extractelement { <4 x i32>, <4 x i32> } %ld2, i32 0
        %vec1 = extractelement { <4 x i32>, <4 x i32> } %ld2, i32 1

E.g. Lower an interleaved store:
        %i.vec = shuffle <8 x i32> %v0, <8 x i32> %v1, <0, 4, 8, 1, 5, 9, 2, 6, 10, 3, 7, 11>
        store <12 x i32> %i.vec, <12 x i32>* %ptr
     into:
        %sub.v0 = shuffle <8 x i32> %v0, <8 x i32> v1, <0, 1, 2, 3>
        %sub.v1 = shuffle <8 x i32> %v0, <8 x i32> v1, <4, 5, 6, 7>
        %sub.v2 = shuffle <8 x i32> %v0, <8 x i32> v1, <8, 9, 10, 11>
        call void llvm.aarch64.neon.st3(%sub.v0, %sub.v1, %sub.v2, %ptr)

Differential Revision: http://reviews.llvm.org/D10533


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240754 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-26 02:32:07 +00:00
Hao Liu
41b3fe53ba [InterleavedAccess] Add a pass InterleavedAccess to identify interleaved memory accesses and transform into target specific intrinsics.
E.g. An interleaved load (Factor = 2):
        %wide.vec = load <8 x i32>, <8 x i32>* %ptr
        %v0 = shuffle <8 x i32> %wide.vec, <8 x i32> undef, <0, 2, 4, 6>
        %v1 = shuffle <8 x i32> %wide.vec, <8 x i32> undef, <1, 3, 5, 7>
It can be transformed into a ld2 intrinsic in AArch64 backend or a vld2 intrinsic in ARM backend.

E.g. An interleaved store (Factor = 3):
        %i.vec = shuffle <8 x i32> %v0, <8 x i32> %v1, <0, 4, 8, 1, 5, 9, 2, 6, 10, 3, 7, 11>
        store <12 x i32> %i.vec, <12 x i32>* %ptr
It can be transformed into a st3 intrinsic in AArch64 backend or a vst3 intrinsic in ARM backend.

Differential Revision: http://reviews.llvm.org/D10533


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240751 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-26 02:10:27 +00:00
Duncan P. N. Exon Smith
544a31ea34 AsmPrinter: More explicitly scope iterator for MSVC
r240748 seems to be on the right path.  Be more explicit.

http://lab.llvm.org:8011/builders/clang-x64-ninja-win7/builds/1961/

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240750 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-26 00:53:44 +00:00
Duncan P. N. Exon Smith
226f8f7de9 AsmPrinter: Explicitly scope iterator for MSVC
Try to placate bots by explicitly scoping a conversion constructor from
`iterator` to `const_iterator`.

http://lab.llvm.org:8011/builders/sanitizer-windows/builds/5931/

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240748 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-26 00:41:53 +00:00
Matthias Braun
48362d63cf Revert "X86: Reject register operands with obvious type mismatches."
Revert until http://llvm.org/PR23955 is investigated.

This reverts commit r239309.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240746 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-26 00:26:49 +00:00
Matthias Braun
5056381b75 Fix mismatched architectures in test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240745 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-26 00:26:46 +00:00
Matthias Braun
915b8a9ffe aad/fix labels in test/CodeGen/X86/StackColoring.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240744 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-26 00:26:44 +00:00
Alexey Samsonov
863c0d000e [ASan] Use llvm::getDISubprogram() to get function entry debug location.
It can be more robust than copying debug info from first non-alloca
instruction in the entry basic block. We use the same strategy in
coverage instrumentation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240738 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-26 00:00:47 +00:00
Duncan P. N. Exon Smith
2da1484e97 AsmPrinter: Use an intrusively linked list for DIE::Children
Replace the `std::vector<>` for `DIE::Children` with an intrusively
linked list.  This is a strict memory improvement: it requires no
auxiliary storage, and reduces `sizeof(DIE)` by one pointer.  It also
factors out the DIE-related malloc traffic.

This drops llc memory usage from 735 MB down to 718 MB, or ~2.3%.

(I'm looking at `llc` memory usage on `verify-uselistorder.lto.opt.bc`;
see r236629 for details.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240736 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 23:52:10 +00:00
Duncan P. N. Exon Smith
73e3fb6ba8 AsmPrinter: Convert DIE::Values to a linked list
Change `DIE::Values` to a singly linked list, where each node is
allocated on a `BumpPtrAllocator`.  In order to support `push_back()`,
the list is circular, and points at the tail element instead of the
head.  I abstracted the core list logic out to `IntrusiveBackList` so
that it can be reused for `DIE::Children`, which also cares about
`push_back()`.

This drops llc memory usage from 799 MB down to 735 MB, about 8%.

(I'm looking at `llc` memory usage on `verify-uselistorder.lto.opt.bc`;
see r236629 for details.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240733 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 23:46:41 +00:00
Michael J. Spencer
d1ceba0333 [ELF] Move ELF{32,64}{L,B}E typedefs to llvm.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240731 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 23:41:23 +00:00
Michael J. Spencer
7358cbc837 [ELF] Add some accessors for lld.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240730 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 23:40:41 +00:00
Alexey Samsonov
1cf2b03af4 Make llvm-dwarfdump exit with non-zero exit code if error was occured.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240729 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 23:40:15 +00:00
NAKAMURA Takumi
1688551243 PPCISelLowering.cpp: Appease PR23956. [-Wdocumentation]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240727 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 23:38:44 +00:00
Adrian Prantl
692c3d14b1 Split test up into two target-spcific directories.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240726 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 23:38:22 +00:00
Anna Zaks
ead297bb04 [asan] Do not instrument special purpose LLVM sections.
Do not instrument globals that are placed in sections containing "__llvm"
in their name.

This fixes a bug in ASan / PGO interoperability. ASan interferes with LLVM's
PGO, which places its globals into a special section, which is memcpy-ed by
the linker as a whole. When those goals are instrumented, ASan's memcpy wrapper
reports an issue.

http://reviews.llvm.org/D10541

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240723 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 23:35:48 +00:00
Anna Zaks
f291e057a4 [asan] Don't run stack malloc on functions containing inline assembly.
It makes LLVM run out of registers even on 64-bit platforms. For example, the
following test case fails on darwin.

clang -cc1 -O0 -triple x86_64-apple-macosx10.10.0 -emit-obj -fsanitize=address -mstackrealign -o ~/tmp/ex.o -x c ex.c
error: inline assembly requires more registers than available

void TestInlineAssembly(const unsigned char *S, unsigned int pS, unsigned char *D, unsigned int pD, unsigned int h) {

unsigned int sr = 4, pDiffD = pD - 5;
unsigned int pDiffS = (pS << 1) - 5;
char flagSA = ((pS & 15) == 0),
flagDA = ((pD & 15) == 0);
asm volatile (
  "mov %0,  %%"PTR_REG("si")"\n"
  "mov %2,  %%"PTR_REG("cx")"\n"
  "mov %1,  %%"PTR_REG("di")"\n"
  "mov %8,  %%"PTR_REG("ax")"\n"
  :
  : "m" (S), "m" (D), "m" (pS), "m" (pDiffS), "m" (pDiffD), "m" (sr), "m" (flagSA), "m" (flagDA), "m" (h)
  : "%"PTR_REG("si"), "%"PTR_REG("di"), "%"PTR_REG("ax"), "%"PTR_REG("cx"), "%"PTR_REG("dx"), "memory"
);
}

http://reviews.llvm.org/D10719

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240722 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 23:35:45 +00:00
Adrian Prantl
a29c6d9ea6 Debug Info: Add basic test coverage for the DWARF encoding of bitfields.
While looking at a couple of bugs in the debug info output for bitfields
I noticed that there wasn't a single regression test to test my changes
against, so here's a start.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240717 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 23:19:19 +00:00
Matt Arsenault
5bf34efcce DAGCombiner: Use pop_back_val()
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240709 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 22:15:05 +00:00
Rafael Espindola
b24bbb73a7 Add an ELFSymbolRef type.
This allows user code to say Sym.getSize() instead of having to manually fetch
the object.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240708 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 22:10:04 +00:00
Frederic Riss
d26d587fbe IAS: Use the root macro instanciation for location
r224810 fixed the handling of macro debug locations in AsmParser. This patch
fixes the logic to actually do what was intended: it uses the first macro of
the macro stack instead of the last one. The updated testcase shows that the
current scheme doesn't work when macro instanciations are nested and multiple
files are used.

Reviewers: compnerd

Differential Revision: http://reviews.llvm.org/D10463

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240705 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 21:57:33 +00:00
Michael J. Spencer
4cbb2db3ab [Object][ELF] Add support for dumping dynamic relocations when sections are stripped.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240703 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 21:47:32 +00:00
Duncan P. N. Exon Smith
ee46b796c2 dsymutil: Split out patchStmtList(), NFC
Split out code to patch up the `DW_AT_stmt_list` for the cloned DIE, and
reorganize it so that it doesn't depend on `DIE::values_begin()` and
`DIE::values_end()` (which I'm trying to kill off).

David Blaikie and I talked about adding a range-algorithm version of
`std::find_if()`, but the assertion *still* required getting at the end
iterator.  IMO, a separate helper function with an early return is
easier to reason about here.

A follow-up commit that removes `DIE::setValue()` and mutates the
`DIEValue` directly is coming shortly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240701 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 21:42:46 +00:00
Sanjay Patel
7db079305c fix typos; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240699 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 21:11:08 +00:00
Rafael Espindola
0999c2c69c llvm-nm: Don't print mapping symbols.
This matches the behavior of gnu nm. Fixes pr23930.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240695 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 21:00:51 +00:00
Pete Cooper
5c09803aee Use foreach loop over constant operands. NFC.
A number of places had explicit loops over Constant::operands().
Just use foreach loops where possible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240694 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 20:51:38 +00:00
Rafael Espindola
d3704298c2 We don't need the targets to read objects.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240684 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 20:20:19 +00:00
Jingyue Wu
529f49db93 [InstCombine] call SimplifyICmpInst with correct context
Summary:
Fixes PR23809. Without passing the context to SimplifyICmpInst, we would
use the assume to prove that the condition feeding the assume is
trivially true (see isValidAssumeForContext in ValueTracking.cpp),
causing the removal of the assume which may be useful for later
optimizations.

Test Plan: pr23800.ll

Reviewers: hfinkel, majnemer

Reviewed By: hfinkel

Subscribers: henryhu, llvm-commits, wengxt, broune, meheff, eliben

Differential Revision: http://reviews.llvm.org/D10695

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240683 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 20:14:47 +00:00
Rafael Espindola
1de6f369b3 Diagnose undefined temporary symbols.
We already disallowed

.global .Lfoo

so this is reasonable.

This is a small cherry pick from r240130.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240681 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 20:10:45 +00:00
Paul Robinson
f2c0530fca Make this test verify .debug_pubnames is actually missing.
It was matching at EOF regardless of whether the section was present.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240679 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 19:37:13 +00:00
Yaron Keren
9d1dc09759 Rangify for loop in Inliner.cpp. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240678 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 19:28:24 +00:00
Douglas Katzman
40db269af5 Add Arg::getValues method with const 'this' and const result
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240673 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 18:48:26 +00:00
Matt Arsenault
a59b0561c8 DAGCombiner: Remove redundant check
MemIntrinsicSDNode is already a subclass of MemSDNode,
so the MemSDNode check is sufficient.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240672 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 18:47:02 +00:00
Peter Collingbourne
8d5e4e48bc GVN: If a branch has two identical successors, we cannot declare either dead.
This previously caused miscompilations as a result of phi nodes receiving
undef incoming values from blocks dominated by such successors.

Differential Revision: http://reviews.llvm.org/D10726

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240670 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 18:32:02 +00:00
Rafael Espindola
b12380a76d Add a test for a recent regression.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240656 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 16:16:08 +00:00
Rafael Espindola
bfb732def0 llvm-nm: print 'n' instead of '?'
This matches gnu nm and has the advantage that there is a upper case N.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240655 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 16:01:53 +00:00
Kit Barton
1ebbc68719 [PPC] Implement vmrgew and vmrgow instructions
This patch adds support for the vector merge even word and vector merge odd word
instructions introduced in POWER8.

Phabricator review: http://reviews.llvm.org/D10704


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240650 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-25 15:17:40 +00:00