Commit Graph

54 Commits

Author SHA1 Message Date
Kevin Enderby
99e6d4e839 Add another bit of the ARM target assembler to llvm-mc to parse registers
with writeback, things like "sp!", etc.  Also added some more stuff to the
temporarily hacked methods ARMAsmParser::MatchRegisterName and
ARMAsmParser::MatchInstruction to allow more parser testing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83477 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-07 18:01:35 +00:00
Kevin Enderby
a7ba3a81c0 Added bits of the ARM target assembler to llvm-mc to parse some load instruction
operands.  Some parsing of arm memory operands for preindexing and postindexing
forms including with register controled shifts.  This is a work in progress.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83424 91177308-0d34-0410-b5e6-96231b3b80d8
2009-10-06 22:26:42 +00:00
Ted Kremenek
83d255e43e Remove invalid add_dependencies line to unbreak the CMake build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81827 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-15 04:06:36 +00:00
Kevin Enderby
ca9c42c4da Added the first bits of the ARM target assembler to llvm-mc. For now it only
parses the .word directive as 4 bytes and ARMAsmParser::ParseInstruction will
give an error is called.  Broke out the test of the .word directive into two
different test cases, one for x86 and one for arm.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81817 91177308-0d34-0410-b5e6-96231b3b80d8
2009-09-15 00:27:25 +00:00