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4 Commits

Author SHA1 Message Date
Bernard Ogden
c777b2e58c Test cleanup for v8 instructions 
Add some missing tests, factor out a test not specific to v8 into
its own file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193611 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-29 14:16:09 +00:00
Joey Gouly
d1311ac171 [ARM] Introduce the 'sevl' instruction in ARMv8. 
This also removes the restriction on the immediate field of the 'hint'
instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191744 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-10-01 12:39:11 +00:00
Joey Gouly
4897151df6 [ARMv8] Implement the new DMB/DSB operands. 
This removes the custom ISD Node: MEMBARRIER and replaces it
with an intrinsic.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190055 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-05 15:35:24 +00:00
Richard Barton
b5523ce1bb Add AArch32 DCPS{1,2,3} and HLT instructions. 
These were pretty straightforward instructions, with some assembly support
required for HLT.

The ARM assembler is keen to split the instruction mnemonic into a
(non-existent) 'H' instruction with the LT condition code. An exception for
HLT is needed.

HLT follows the same rules as BKPT when in IT blocks, so the special BKPT
hadling code has been adapted to handle HLT also.

Regression tests added including diagnostic tests for out of range immediates
and illegal condition codes, as well as negative tests for pre-ARMv8.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190053 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-09-05 14:14:19 +00:00