Commit Graph

10 Commits

Author SHA1 Message Date
Evan Cheng
c60e76d139 - Fix codegen for pc relative constant (e.g. JT) in thumb mode:
.set PCRELV0, (LJTI1_0_0-(LPCRELL0+4))
LPCRELL0:
        add r1, pc, #PCRELV0
This is not legal since add r1, pc, #c requires the constant be a multiple of 4.
Do the following instead:
        .set PCRELV0, (LJTI1_0_0-(LPCRELL0+4))
LPCRELL0:
        mov r1, #PCRELV0
        add r1, pc

- In thumb mode, it's not possible to use .set generate a pc relative stub
  address. The stub is ARM code which is in a different section from the thumb
  code. Load the value from a constpool instead.
- Some asm printing clean up.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33664 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-30 20:37:08 +00:00
Evan Cheng
cea117d2de Change the operand orders to t_addrmode_s* to make it easier to morph
instructions that use these address modes to instructions that use
t_addrmode_sp.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33651 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-30 02:35:32 +00:00
Evan Cheng
225dfe973b Use BL to implement Thumb far jumps.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33649 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-30 01:13:37 +00:00
Evan Cheng
d85ac4d079 Thumb jumptable support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33568 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-27 02:29:45 +00:00
Evan Cheng
53d7dbafc3 Thumb add / sub with carry.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33562 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-27 00:07:15 +00:00
Evan Cheng
3fdadfc9ab Represent tADDspi and tSUBspi as two-address instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33551 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-26 21:33:19 +00:00
Evan Cheng
b60c02e005 extload -> zextload
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33542 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-26 19:13:16 +00:00
Evan Cheng
012f2d97b7 Use PC relative ldr to load from a constantpool in Thumb mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33484 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-24 08:53:17 +00:00
Evan Cheng
c38f2bc3c2 - Reorg Thumb load / store instructions. Combine each rr and ri pair of
instructions into one (e.g. tLDRrr, tLDRri -> tLDR).
- Thumb ldrsb and ldrsh only have the [reg, reg] address format. If the
  address is not an add, materialize a 0 immediate into a register and use
  it as the offset field.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33470 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-23 22:59:13 +00:00
Evan Cheng
a8e2989ece ARM backend contribution from Apple.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33353 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-19 07:51:42 +00:00