Commit Graph

80 Commits

Author SHA1 Message Date
Vladimir Medic
73fb93cfaf MipsABIInfo class is used in different libraries. Moving the files to MCTargetDesc folder(LLVMMipsDesc library) prevents linkage errors. There are no functional changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224427 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-17 11:49:56 +00:00
Daniel Sanders
6b846945ec [mips] Move MipsCCState to a separate file and clang-formatted it.
Summary: Depends on D6113

Reviewers: theraven, vmedic

Reviewed By: vmedic

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D6114

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221525 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-07 14:24:31 +00:00
Daniel Sanders
eaa221a23e Re-commit r221056 and others with fix, "[mips] Move F128 argument handling into MipsCCState as we did for returns. NFC."
sret arguments can never originate from an f128 argument so we detect
sret arguments and push false into OriginalArgWasF128.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221102 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-02 16:09:29 +00:00
NAKAMURA Takumi
1808f3e89a Revert r221056 and others, "[mips] Move F128 argument handling into MipsCCState as we did for returns. NFC."
r221056 "[mips] Move F128 argument handling into MipsCCState as we did for returns. NFC."
  r221058 "[mips] Fix unused variable warning introduced in r221056"
  r221059 "[mips] Move all ByVal handling into CCState and tablegen-erated code. NFC."
  r221061 "Renamed CCState members that appear to misspell 'Processed' as 'Proceed'. NFC."

It cuased an undefined behavior in LLVM :: CodeGen/Mips/return-vector.ll.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221081 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-02 04:43:54 +00:00
Daniel Sanders
ea8769cbe8 [mips] Move all ByVal handling into CCState and tablegen-erated code. NFC.
Summary:
CCState already contains a byval implementation that is very similar to the
Mips custom code. This patch merges the custom code into the existing
common code and tablegen-erated code.

Reviewers: vmedic

Reviewed By: vmedic

Subscribers: rnk, llvm-commits

Differential Revision: http://reviews.llvm.org/D5977

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221059 91177308-0d34-0410-b5e6-96231b3b80d8
2014-11-01 19:17:10 +00:00
Eric Christopher
d5dd8ce2a5 Reinstate "Nuke the old JIT."
Approved by Jim Grosbach, Lang Hames, Rafael Espindola.

This reinstates commits r215111, 215115, 215116, 215117, 215136.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216982 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-02 22:28:02 +00:00
Eric Christopher
aa5b9c0f6f Temporarily Revert "Nuke the old JIT." as it's not quite ready to
be deleted. This will be reapplied as soon as possible and before
the 3.6 branch date at any rate.

Approved by Jim Grosbach, Lang Hames, Rafael Espindola.

This reverts commits r215111, 215115, 215116, 215117, 215136.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215154 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-07 22:02:54 +00:00
Rafael Espindola
875710a2fd Nuke the old JIT.
I am sure we will be finding bits and pieces of dead code for years to
come, but this is a good start.

Thanks to Lang Hames for making MCJIT a good replacement!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215111 91177308-0d34-0410-b5e6-96231b3b80d8
2014-08-07 14:21:18 +00:00
Reed Kotler
4870dae19f enable fast isel tablegen files for Mips
Reviewers: dsanders

Reviewed By: dsanders

Differential Revision: http://reviews.llvm.org/D3498

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207256 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-25 18:36:38 +00:00
Reed Kotler
f90e2bb56a Start pushing changes for Mips Fast-Isel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206505 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-17 22:15:34 +00:00
Reed Kotler
fba2a769a1 This patch has two main functions:
1) Fix a specific bug when certain conversion functions are called in a program compiled as mips16 with hard float and
the program is linked as c++. There are two libraries that are reversed in the link order with gcc/g++ and clang/clang++ for
mips16 in this case and the proper stubs will then not be called. These stubs are normally handled in the Mips16HardFloat pass
but in this case we don't know at that time that we need to generate the stubs. This must all be handled later in code generation
and we have moved this functionality to MipsAsmPrinter. When linked as C (gcc or clang) the proper stubs are linked in from libc.

2) Set up the infrastructure to handle 90% of what is in the Mips16HardFloat pass in this new area of MipsAsmPrinter. This is a more
logical place to handle this and we have known for some time that we needed to move the code later and not implement it using
inline asm as we do now but it was not clear exactly where to do this and what mechanism should be used. Now it's clear to us
how to do this and this patch contains the infrastructure to move most of this to MipsAsmPrinter but the actual moving will be done
in a follow on patch. The same infrastructure is used to fix this current bug as described in #1. This change was requested by the list
during the original putback of the Mips16HardFloat pass but was not practical for us do at that time.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201426 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-14 19:16:39 +00:00
NAKAMURA Takumi
ef70d2a393 [CMake] Let add_public_tablegen_target() provide intrinsics_gen, too.
I think, in principle, intrinsics_gen may be added explicitly.
That said, it can be added incidentally, since each target already has dependencies to llvm-tblgen.
Almost all source files depend on both CommonTaleGen and intrinsics_gen.

Explicit add_dependencies() have been pruned under lib/Target.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195929 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-28 17:04:31 +00:00
NAKAMURA Takumi
ad363187c4 [CMake] Let add_public_tablegen_target responsible to provide dependency to CommonTableGen.
add_public_tablegen_target adds *CommonTableGen to LLVM_COMMON_DEPENDS.
LLVM_COMMON_DEPENDS affects add_llvm_library (and other add_target stuff) within its scope.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195927 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-28 17:04:04 +00:00
Akira Hatanaka
b415592831 Add MipsOptimizePICCall.cpp to CMakeLists.txt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195894 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-27 23:47:25 +00:00
Richard Sandiford
a8a7099c18 Turn MipsOptimizeMathLibCalls into a target-independent scalar transform
...so that it can be used for z too.  Most of the code is the same.
The only real change is to use TargetTransformInfo to test when a sqrt
instruction is available.

The pass is opt-in because at the moment it only handles sqrt.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189097 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-23 10:27:02 +00:00
NAKAMURA Takumi
8e1d64666f Target/*/CMakeLists.txt: Add the dependency to CommonTableGen explicitly for each corresponding CodeGen.
Without explicit dependencies, both per-file action and in-CommonTableGen action could run in parallel.
It races to emit *.inc files simultaneously.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187780 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-06 06:38:37 +00:00
Juergen Ributzka
17c95a217d Test commit to verify write access.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186429 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-16 17:44:23 +00:00
Akira Hatanaka
0001acc13c Fix CMakeLists.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183804 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-11 22:36:30 +00:00
Reed Kotler
46090914b7 Checkin in of first of several patches to finish implementation of
mips16/mips32 floating point interoperability. 

This patch fixes returns from mips16 functions so that if the function
was in fact called by a mips32 hard float routine, then values
that would have been returned in floating point registers are so returned.

Mips16 mode has no floating point instructions so there is no way to
load values into floating point registers.

This is needed when returning float, double, single complex, double complex
in the Mips ABI.

Helper functions in libc for mips16 are available to do this.

For efficiency purposes, these helper functions have a different calling
convention from normal Mips calls.

Registers v0,v1,a0,a1 are used to pass parameters instead of
a0,a1,a2,a3.

This is because v0,v1,a0,a1 are the natural registers used to return
floating point values in soft float. These values can then be moved
to the appropriate floating point registers with no extra cost.

The only register that is modified is ra in this call.

The helper functions make sure that the return values are in the floating
point registers that they would be in if soft float was not in effect
(which it is for mips16, though the soft float is implemented using a mips32
library that uses hard float).
 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181641 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-10 22:25:39 +00:00
Reed Kotler
74adad6de8 This is for an experimental option -mips-os16. The idea is to compile all
Mips32 code as Mips16 unless it can't be compiled as Mips 16. For now this
would happen as long as floating point instructions are not needed.
Probably it would also make sense to compile as mips32 if atomic operations
are needed too. There may be other cases too.

A module pass prescans the IR and adds the mips16 or nomips16 attribute
to functions depending on the functions needs.

Mips 16 mode can result in a 40% code compression by utililizing 16 bit
encoding of many instructions.

The hope is for this to replace the traditional gcc way of dealing with
Mips16 code using floating point which involves essentially using soft float
but with a library implemented using mips32 floating point. This gcc 
method also requires creating stubs so that Mips32 code can interact with
these Mips 16 functions that have floating point needs. My conjecture is
that in reality this traditional gcc method would never win over this
new method.

I will be implementing the traditional gcc method also. Some of it is already
done but I needed to do the stubs to finish the work and those required
this mips16/32 mixed mode capability.

I have more ideas for to make this new method much better and I think the old
method will just live in llvm for anyone that needs the backward compatibility
but I don't for what reason that would be needed.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179185 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-10 16:58:04 +00:00
Reed Kotler
a430cb613b This patch enables llvm to switch between compiling for mips32/mips64
and mips16 on a per function basis.

Because this patch is somewhat involved I have provide an overview of the
key pieces of it.

The patch is written so as to not change the behavior of the non mixed
mode. We have tested this a lot but it is something new to switch subtargets
so we don't want any chance of regression in the mainline compiler until
we have more confidence in this.

Mips32/64 are very different from Mip16 as is the case of ARM vs Thumb1.
For that reason there are derived versions of the register info, frame info, 
instruction info and instruction selection classes.

Now we register three separate passes for instruction selection.
One which is used to switch subtargets (MipsModuleISelDAGToDAG.cpp) and then
one for each of the current subtargets (Mips16ISelDAGToDAG.cpp and
MipsSEISelDAGToDAG.cpp).

When the ModuleISel pass runs, it determines if there is a need to switch
subtargets and if so, the owning pointers in MipsTargetMachine are
appropriately changed.

When 16Isel or SEIsel is run, they will return immediately without doing
any work if the current subtarget mode does not apply to them.

In addition, MipsAsmPrinter needs to be reset on a function basis.

The pass BasicTargetTransformInfo is substituted with a null pass since the
pass is immutable and really needs to be a function pass for it to be
used with changing subtargets. This will be fixed in a follow on patch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179118 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-09 19:46:01 +00:00
Akira Hatanaka
862146b607 Add back lines which were accidentally deleted in CMakeLists.txt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177096 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-14 18:46:46 +00:00
Akira Hatanaka
554d9312b2 [mips] Define two subclasses of MipsDAGToDAGISel. Mips16DAGToDAGISel is for
mips16 and MipsSEDAGToDAGISel is for mips32/64. 

No functionality changes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177089 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-14 18:27:31 +00:00
Akira Hatanaka
5ac065a797 [mips] Define two subclasses of MipsTargetLowering. Mips16TargetLowering is for
mips16 and MipsSETargetLowering is for mips32/64. 

No functionality changes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176917 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-13 00:54:29 +00:00
Reed Kotler
d056dc0aae Add the skeleton for the Mips constant island pass.
It will only be used for Mips 16 at this time.
 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176161 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-27 03:33:58 +00:00
Roman Divacky
759e3fa641 Remove edis - the enhanced disassembler. Fixes PR14654.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170578 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-19 19:55:47 +00:00
Rafael Espindola
0d91c0b519 Remove TargetELFWriterInfo.
All the credit goes to Jan Voung for noticing it was dead!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166902 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-28 21:34:43 +00:00
Jack Carter
8e71e617c9 The mips 64bit instructions DSLL, DSRA, DSRL, DEXT and DINS get transformed by the assembler or through codegen direct object output to other variants based on the value of the immediate values of the operands.
If the code is generated as assembler, this transformation does not occur assuming that it will occur later in the assembler.

This code was originally called from  MipsAsmPrinter.cpp and we needed to check for OutStreamer.hasRawTextSupport(). This was not a good place for it and has been moved to MCTargetDesc/MipsMCCodeEmitter.cpp where both direct object and the assembler use it it automagically.

The test cases have been checked in for a number of weeks now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165067 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-02 23:09:40 +00:00
Akira Hatanaka
cc46fe591a MIPS DSP: add code necessary for pseudo instruction lowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164747 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-27 01:59:07 +00:00
Jack Carter
a7570a3d86 There are some Mips instructions that are lowered by the
assembler such as shifts greater than 32. In the case 
of direct object, the code gen needs to do this lowering 
since the assembler is not involved.

With the advent of the llvm-mc assembler, it also needs 
to do the same lowering.

This patch makes that specific lowering code accessible 
to both the direct object output and the assembler.

This patch does not affect generated output.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163287 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-06 02:31:34 +00:00
Akira Hatanaka
b889e0cd2f Correct MCJIT functionality for MIPS32 architecture.
No new tests are added.
All tests in ExecutionEngine/MCJIT that have been failing pass after this patch
is applied (when "make check" is done on a mips board). 

Patch by Petar Jovanovic.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162135 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 21:28:04 +00:00
Akira Hatanaka
72e9b6aeb4 Add stub methods for mips assembly matcher.
Patch by Vladimir Medic.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162124 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-17 20:16:42 +00:00
Akira Hatanaka
8589010e3d Add definitions of two subclasses of MipsRegisterInfo, Mips16RegisterInfo and
MipsSERegisterInfo.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161092 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-31 23:41:32 +00:00
Akira Hatanaka
cdb3ba71ce Add definitions of two subclasses of MipsFrameLowering, Mips16FrameLowering and
MipsSEFrameLowering.

Implement MipsSEFrameLowering::hasReservedCallFrame. Call frames will not be
reserved if there is a call with a large call frame or there are variable sized
objects on the stack.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161090 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-31 22:50:19 +00:00
Akira Hatanaka
d5cfc0172c Add Mips16InstrInfo.cpp and MipsSEInstrInfo.cpp to CMakeLists.txt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161083 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-31 22:11:05 +00:00
NAKAMURA Takumi
d5c407d2d0 llvm/lib: [CMake] Add explicit dependency to intrinsics_gen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159112 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-24 13:32:01 +00:00
Akira Hatanaka
f4f60cbe46 Fix Mips/CMakeLists.txt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158437 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-14 01:23:55 +00:00
Akira Hatanaka
564f69072c Move the code in MipsExpandPseudo to MipsInstrInfo::expandPostRAPseudo.
Delete MipsExpandPseudo.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157495 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-25 20:52:52 +00:00
Akira Hatanaka
739572f069 Remove MipsEmitGPRestore.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156696 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-12 03:24:03 +00:00
Akira Hatanaka
ecdc9d5bb2 Add disassembler to MIPS.
Patch by Vladimir Medic. 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154935 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-17 18:03:21 +00:00
Akira Hatanaka
02365945a6 Revert r153924. There were buildbot failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153925 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-03 02:51:09 +00:00
Akira Hatanaka
885020a7a7 MIPS disassembler support.
Patch by Vladimir Medic.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153924 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-03 02:20:58 +00:00
NAKAMURA Takumi
e0794d331a Target/Mips: Unbreak CMake build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148909 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-25 03:15:46 +00:00
Rafael Espindola
fddf804597 Add the skeleton of an asm parser for mips.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147923 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-11 03:56:41 +00:00
Chandler Carruth
cfb75fba73 Fix up the CMake build for the new files added in r146960, they're
likely to stay either way that discussion ends up resolving itself.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146966 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-20 08:42:11 +00:00
Daniel Dunbar
d782bae970 build/CMake: Finish removal of add_llvm_library_dependencies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145420 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-29 19:25:30 +00:00
Akira Hatanaka
73c38f0aa2 Remove MipsMCSymbolRefExpr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144654 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-15 18:20:08 +00:00
Daniel Dunbar
b12f97534c CMake: Fix CMake build for new Mips tblgen file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144423 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-11 23:12:56 +00:00
Daniel Dunbar
b0d9ce567f build/cmake: Use tblgen macro directly instead of llvm_tablegen, which just
added a layer of indirection with no value (not even conciseness).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143727 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-04 19:04:23 +00:00
Bruno Cardoso Lopes
c3f16b316a Final patch that completes old JIT support for Mips:
-Fix binary codes and rename operands in .td files so that automatically
generated function MipsCodeEmitter::getBinaryCodeForInstr gives correct
encoding for instructions.
-Define new class FMem for instructions that access memory.
-Define new class FFRGPR for instructions that move data between GPR and
FPU general and control registers.
-Define custom encoder methods for memory operands, and also for size
operands of ext and ins instructions.
-Only static relocation model is currently implemented.

Patch by Sasa Stankovic

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142378 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-18 17:50:36 +00:00