Jeff Cohen
c884db47f1
Make Intel syntax mode friendlier to Microsoft ML assembler (still needs more work).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28044 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-02 01:16:28 +00:00
Chris Lattner
de321a8014
Put PHI/INLINEASM into the correct namespace.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28037 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-01 17:00:49 +00:00
Chris Lattner
99f2632b4b
Remove %'s from register names when in intel mode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28027 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-01 05:53:50 +00:00
Jeff Cohen
10a59ce701
Mingw32 patches supplied by Anton Korobeynikov.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28023 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-29 18:41:44 +00:00
Evan Cheng
55c25f2a2f
I can't spell: Register, not Regsiter.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28021 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-28 23:19:39 +00:00
Evan Cheng
62f2700bcf
Implemented x86 inline asm b, h, w, k modifiers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28020 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-28 23:11:40 +00:00
Chris Lattner
25b8b8cb2c
Fix CodeGen/Generic/2006-04-28-Sign-extend-bool.ll
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28017 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-28 21:56:10 +00:00
Evan Cheng
347d5f789a
Initial caller side support (for CCC only, not FastCC) of 128-bit vector
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passing by value.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28015 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-28 21:29:37 +00:00
Evan Cheng
3d48a90fbd
Bare-bone X86 inline asm printer support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28014 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-28 21:19:05 +00:00
Evan Cheng
43f3bd310b
Implement four-wide shuffle with 2 shufps if no more than two elements come
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from each vector. e.g.
shuffle(G1, G2, 7, 1, 5, 2)
==>
movaps _G2, %xmm0
shufps $151, _G1, %xmm0
shufps $216, %xmm0, %xmm0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28011 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-28 07:03:38 +00:00
Evan Cheng
020c41f21e
TargetLowering::LowerArguments should return a VBIT_CONVERT of
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FORMAL_ARGUMENTS SDOperand in the return result vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28009 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-28 05:25:15 +00:00
Evan Cheng
ed1492eaf5
Use movaps instead of movapd for spill / restore.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28005 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-28 02:23:35 +00:00
Chris Lattner
e481e8bc8f
Add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27999 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-28 00:04:05 +00:00
Chris Lattner
217fde5255
Add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27998 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-27 21:40:57 +00:00
Evan Cheng
fea89c14ec
Make x86 isel lowering produce tailcall nodes. They are match to normal calls
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for now.
Patch contributed by Alexander Friedman.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27994 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-27 08:40:39 +00:00
Evan Cheng
43824e8216
A couple of new entries.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27993 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-27 08:31:33 +00:00
Evan Cheng
2fdd95eee7
Support for passing 128-bit vector arguments via XMM registers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27992 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-27 08:31:10 +00:00
Evan Cheng
5fb03ce905
Oops
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27989 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-27 05:44:50 +00:00
Evan Cheng
85e3800e42
Bug fix: not updating NumIntRegs.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27988 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-27 05:35:28 +00:00
Evan Cheng
eda65fa20b
- Clean up formal argument lowering code. Prepare for vector pass by value work.
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- Fixed vararg support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27985 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-27 01:32:22 +00:00
Evan Cheng
9191dbba8e
Fix fastcc failures.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27980 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-26 18:21:31 +00:00
Evan Cheng
1bc7804e4c
Switching over FORMAL_ARGUMENTS mechanism to lower call arguments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27975 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-26 01:20:17 +00:00
Nate Begeman
add19dc20a
Keep the stack from on darwin 16-byte aligned. This fixes many JIT
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failres.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27973 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-25 20:54:26 +00:00
Evan Cheng
0db9fe6775
Separate LowerOperation() into multiple functions, one per opcode.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27972 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-25 20:13:52 +00:00
Evan Cheng
3d1be07141
Fix a typo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27968 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-25 17:48:41 +00:00
Nate Begeman
b3f70d7d55
No functionality changes, but cleaner code with correct comments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27966 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-25 04:45:59 +00:00
Evan Cheng
a2137b592e
Explicitly specify result type for def : Pat<> patterns (if it produces a vector
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result). Otherwise tblgen will pick the default (v16i8 for 128-bit vector).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27965 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-25 00:50:01 +00:00
Evan Cheng
a7fc64222a
Added X86 SSE2 intrinsics which can be represented as vector_shuffles. This is
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a temporary workaround for the 2-wide vector_shuffle problem (i.e. its mask
would have type v2i32 which is not legal).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27964 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-24 23:34:56 +00:00
Evan Cheng
d7ec518927
Add a new entry.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27963 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-24 23:30:10 +00:00
Evan Cheng
37d1d9bc66
Special case handling two wide build_vector(0, x).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27961 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-24 22:58:52 +00:00
Evan Cheng
64e9769339
Some missing movlps, movhps, movlpd, and movhpd patterns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27960 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-24 21:58:20 +00:00
Evan Cheng
c78d3b43f5
A little bit more build_vector enhancement for v8i16 cases.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27959 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-24 18:01:45 +00:00
Evan Cheng
86661f4879
Remove a completed entry.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27958 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-24 17:38:16 +00:00
Evan Cheng
49bca8536c
MakeMIInst() should handle jump table index operands.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27955 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-24 05:37:35 +00:00
Chris Lattner
57a6c135f2
Add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27954 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-23 19:47:09 +00:00
Evan Cheng
9293451e3f
MOVL shuffle (i.e. movd or movss / movsd from memory) of undef, V2 == V2
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27953 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-23 06:35:19 +00:00
Nate Begeman
a766765358
Optimized stores to the constant pool, while cool, are unnecessary.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27948 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-22 22:31:45 +00:00
Nate Begeman
37efe67645
JumpTable support! What this represents is working asm and jit support for
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x86 and ppc for 100% dense switch statements when relocations are non-PIC.
This support will be extended and enhanced in the coming days to support
PIC, and less dense forms of jump tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27947 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-22 18:53:45 +00:00
Evan Cheng
1900c012f5
Don't do all the lowering stuff for 2-wide build_vector's. Also, minor optimization for shuffle of undef.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27946 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-22 08:34:05 +00:00
Evan Cheng
a083af14c8
Fix a performance regression. Use {p}shuf* when there are only two distinct elements in a build_vector.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27945 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-22 06:21:46 +00:00
Chris Lattner
ea4a9c575f
Teach the JIT how to relocate LI, this fixes the JIT on Prolangs-C/TimberWolfMC
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27943 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-22 06:17:56 +00:00
Evan Cheng
ba05f728b5
Revamp build_vector lowering to take advantage of movss and movd instructions.
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movd always clear the top 96 bits and movss does so when it's loading the
value from memory.
The net result is codegen for 4-wide shuffles is much improved. It is near
optimal if one or more elements is a zero. e.g.
__m128i test(int a, int b) {
return _mm_set_epi32(0, 0, b, a);
}
compiles to
_test:
movd 8(%esp), %xmm1
movd 4(%esp), %xmm0
punpckldq %xmm1, %xmm0
ret
compare to gcc:
_test:
subl $12, %esp
movd 20(%esp), %xmm0
movd 16(%esp), %xmm1
punpckldq %xmm0, %xmm1
movq %xmm1, %xmm0
movhps LC0, %xmm0
addl $12, %esp
ret
or icc:
_test:
movd 4(%esp), %xmm0 #5.10
movd 8(%esp), %xmm3 #5.10
xorl %eax, %eax #5.10
movd %eax, %xmm1 #5.10
punpckldq %xmm1, %xmm0 #5.10
movd %eax, %xmm2 #5.10
punpckldq %xmm2, %xmm3 #5.10
punpckldq %xmm3, %xmm0 #5.10
ret #5.10
There are still room for improvement, for example the FP variant of the above example:
__m128 test(float a, float b) {
return _mm_set_ps(0.0, 0.0, b, a);
}
_test:
movss 8(%esp), %xmm1
movss 4(%esp), %xmm0
unpcklps %xmm1, %xmm0
xorps %xmm1, %xmm1
movlhps %xmm1, %xmm0
ret
The xorps and movlhps are unnecessary. This will require post legalizer optimization to handle.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27939 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-21 23:03:30 +00:00
Nate Begeman
d9993b0b2d
Fix the comment
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27938 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-21 22:11:27 +00:00
Nate Begeman
6fcbd6961d
Change the PPC JIT to use a Static relocation model
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27937 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-21 22:04:15 +00:00
Chris Lattner
6e68a7752b
fix thinko
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27935 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-21 21:05:22 +00:00
Chris Lattner
3e663a6c16
add some low-prio notes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27934 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-21 21:03:21 +00:00
Evan Cheng
017dcc6e55
Now generating perfect (I think) code for "vector set" with a single non-zero
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scalar value.
e.g.
_mm_set_epi32(0, a, 0, 0);
==>
movd 4(%esp), %xmm0
pshufd $69, %xmm0, %xmm0
_mm_set_epi8(0, 0, 0, 0, 0, a, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
==>
movzbw 4(%esp), %ax
movzwl %ax, %eax
pxor %xmm0, %xmm0
pinsrw $5, %eax, %xmm0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27923 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-21 01:05:10 +00:00
Chris Lattner
ba2194ae84
Fix the CodeGen/PowerPC/buildvec_canonicalize.ll regression last night.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27908 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-20 19:01:30 +00:00
Chris Lattner
879acefed5
add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27907 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-20 18:49:28 +00:00
Chris Lattner
a29526275b
remove some v9 specific code
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27900 91177308-0d34-0410-b5e6-96231b3b80d8
2006-04-20 18:33:11 +00:00