Commit Graph

18987 Commits

Author SHA1 Message Date
Benjamin Kramer
530a616a9d [BranchFolding] Document why replacing HashMachineInstr with hash_code doesn't work
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240415 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-23 14:47:36 +00:00
Benjamin Kramer
336ead08bd [MachineBasicBlock] Add getFirstNonDebugInstr to complement getLastNonDebugInstr
Use it in CodeGen where applicable. No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240414 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-23 14:47:29 +00:00
Benjamin Kramer
d18bb88b2e [MachineBasicBlock] Use the const_cast(this) trick to reduce duplication
NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240413 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-23 14:47:18 +00:00
Rafael Espindola
9758b4ae95 Simplify the Mangler interface now that DataLayout is mandatory.
We only need to pass in a DataLayout when mangling a raw string, not when
constructing the mangler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240405 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-23 13:59:29 +00:00
Rafael Espindola
b9ed9af341 Use MCSymbols for FastISel.
The summary is that it moves the mangling earlier and replaces a few
calls to .addExternalSymbol with addSym.

I originally wanted to replace all the uses of addExternalSymbol with
addSym, but noticed it was a lot of work and doesn't need to be done
all at once.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240395 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-23 12:21:54 +00:00
Alexander Kornienko
cd52a7a381 Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)
Apparently, the style needs to be agreed upon first.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240390 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-23 09:49:53 +00:00
Sanjoy Das
c49542e5bb [FaultMaps] Move FaultMapParser to Object/
Summary:
That way llvm-objdump can rely on it without adding an extra dependency
on CodeGen.

This change duplicates the FaultKind enum and the code that serializes
it to a string.  I could not figure out a way to get around this without
adding a new dependency to Object

Reviewers: rafael, ab

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10619

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240364 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-23 01:05:26 +00:00
Sanjay Patel
8bd59f505a [x86] generalize reassociation optimization in machine combiner to 2 instructions
Currently ( D10321, http://reviews.llvm.org/rL239486 ), we can use the machine combiner pass
to reassociate the following sequence to reduce the critical path:

A = ? op ?
B = A op X
C = B op Y
-->
A = ? op ?
B = X op Y
C = A op B

'op' is currently limited to x86 AVX scalar FP adds (with fast-math on), but in theory, it could
be any associative math/logic op (see TODO in code comment).

This patch generalizes the pattern match to ignore the instruction that defines 'A'. So instead of
a sequence of 3 adds, we now only need to find 2 dependent adds and decide if it's worth
reassociating them.

This generalization has a compile-time cost because we can now match more instruction sequences
and we rely more heavily on the machine combiner to discard sequences where reassociation doesn't
improve the critical path.

For example, in the new test case:

A = M div N
B = A add X
C = B add Y

We'll match 2 reassociation patterns, but this transform doesn't reduce the critical path:

A = M div N
B = A add Y
C = B add X

We need the combiner to reject that pattern but select this:

A = M div N
B = X add Y
C = B add A

Differential Revision: http://reviews.llvm.org/D10460



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240361 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-23 00:39:40 +00:00
Pawel Bylica
e903f64b10 Revert r240291: causes problems in self-hosted builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240343 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 21:54:07 +00:00
Alex Lorenz
f654cdae59 MIR Serialization: Introduce a lexer for machine instructions.
This commit adds a function that tokenizes the string containing
the machine instruction. This commit also adds a struct called 
'MIToken' which is used to represent the lexer's tokens.

Reviewers: Sean Silva

Differential Revision: http://reviews.llvm.org/D10521


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240323 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 20:37:46 +00:00
Sanjoy Das
d5732752e8 Fix MSVC build.
I had some unnecessary `typename`s left in after addressing review.
This compiled successfully with clang++ but MSVC reported an error.  Fix
the build error by removing the redundant `typename`s.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240307 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 18:20:10 +00:00
Sanjoy Das
e0ef46e5e7 [FaultMaps] Add a parser for the __llvm__faultmaps section.
Summary:
The parser is exercised by llvm-objdump using -print-fault-maps.  As is
probably obvious, the code itself was "heavily inspired" by
http://reviews.llvm.org/D10434.

Reviewers: reames, atrick, JosephTremoulet

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10491

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240304 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 18:03:02 +00:00
Rafael Espindola
09bbd16112 Avoid a Symbol -> Name -> Symbol conversion.
Before this we were producing a TargetExternalSymbol from a MCSymbol.
That meant extracting the symbol name and fetching the symbol again
down the pipeline.

This patch adds a DAG.getMCSymbol that lets the MCSymbol pass unchanged on the
DAG.

Doing so removes the need for MO_NOPREFIX and fixes the root cause of pr23900,
allowing r240130 to be committed again.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240300 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 17:46:53 +00:00
Alex Lorenz
2f801faafb MIR Serialization: Serialize machine instruction names.
This commit implements initial machine instruction serialization. It
serializes machine instruction names. The instructions are represented
using a YAML sequence of string literals and are a part of machine
basic block YAML mapping.

This commit introduces a class called 'MIParser' which will be used to
parse the machine instructions and operands.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10481


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240295 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 17:02:30 +00:00
Pawel Bylica
39befc6ca8 Fix shl folding in DAG combiner.
Summary: The code responsible for shl folding in the DAGCombiner was assuming incorrectly that all constants are less than 64 bits. This patch simply changes the way values are compared.

Test Plan: A regression test included.

Reviewers: andreadb

Reviewed By: andreadb

Subscribers: andreadb, test, llvm-commits

Differential Revision: http://reviews.llvm.org/D10602

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240291 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 15:58:11 +00:00
Chandler Carruth
1e3557de0d [PM/AA] Hoist the AliasResult enum out of the AliasAnalysis class.
This will allow classes to implement the AA interface without deriving
from the class or referencing an internal enum of some other class as
their return types.

Also, to a pretty fundamental extent, concepts such as 'NoAlias',
'MayAlias', and 'MustAlias' are first class concepts in LLVM and we
aren't saving anything by scoping them heavily.

My mild preference would have been to use a scoped enum, but that
feature is essentially completely broken AFAICT. I'm extremely
disappointed. For example, we cannot through any reasonable[1] means
construct an enum class (or analog) which has scoped names but converts
to a boolean in order to test for the possibility of aliasing.

[1]: Richard Smith came up with a "solution", but it requires class
templates, and lots of boilerplate setting up the enumeration multiple
times. Something like Boost.PP could potentially bundle this up, but
even that would be quite painful and it doesn't seem realistically worth
it. The enum class solution would probably work without the need for
a bool conversion.

Differential Revision: http://reviews.llvm.org/D10495

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240255 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-22 02:16:51 +00:00
Duncan P. N. Exon Smith
f1c527b5c1 AsmPrinter: Don't emit empty .debug_loc entries
If we don't know how to represent a .debug_loc entry, skip the entry
entirely rather than emitting an empty one.  Similarly, if a .debug_loc
list has no entries, don't create the list.

We still want to create the variables, just in an optimized-out form
that doesn't have a DW_AT_location.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240244 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-21 16:54:56 +00:00
Duncan P. N. Exon Smith
01a8dc8ca6 AsmPrinter: Rewrite initialization of DbgVariable, NFC
There are three types of `DbgVariable`:
  - alloca variables, created based on the MMI table,
  - register variables, created based on DBG_VALUE instructions, and
  - optimized-out variables.

This commit reconfigures `DbgVariable` to make it easier to tell which
kind we have, and make initialization a little clearer.

For MMI/alloca variables, `FrameIndex.size()` must always equal
`Expr.size()`, and there shouldn't be an `MInsn`.  For register
variables (with a `MInsn`), `FrameIndex` must be empty, and `Expr`
should have 0 or 1 element depending on whether it has a complex
expression (registers with multiple locations use `DebugLocListIndex`).
Optimized-out variables shouldn't have any of these fields.

Moreover, this separates DBG_VALUE initialization until after the
variable is created, simplifying logic in a future commit that changes
`collectVariableInfo()` to stop creating empty .debug_loc entries/lists.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240243 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-21 16:50:43 +00:00
Hans Wennborg
ee16995e3d Switch lowering: add heuristic for filling leaf nodes in the weight-balanced binary search tree
Sparse switches with profile info are lowered as weight-balanced BSTs. For
example, if the node weights are {1,1,1,1,1,1000}, the right-most node would
end up in a tree by itself, bringing it closer to the top.

However, a leaf in this BST can contain up to 3 cases, and having a single
case in a leaf node as in the example means the tree might become
unnecessarily high.

This patch adds a heauristic to the pivot selection algorithm that moves more
cases into leaf nodes unless that would lower their rank. It still doesn't
yield the optimal tree in every case, but I believe it's conservatibely correct.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240224 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-20 17:14:07 +00:00
NAKAMURA Takumi
ac5e008dfd Reformat.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240213 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-20 06:22:04 +00:00
NAKAMURA Takumi
3d378e625c Revert r240040, "[BranchFolding] Replace custom MachineInstr with MachineInstrExpressionTrait"
It caused different emission between stage2 and stage3. Investigating.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240212 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-20 06:21:48 +00:00
Sanjoy Das
ac9af6c151 [Statepoint] Remove unnecessary argument from Statepoint::getRelocates
NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240198 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-20 00:01:03 +00:00
Sanjay Patel
30c3b2a4c2 name change: hasPattern() -> getMachineCombinerPatterns() ; NFC
This was suggested as part of D10460, but it's independent of
any functional change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240192 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-19 23:21:42 +00:00
Alex Lorenz
dc6d65201d MIR Parser: report an error when a basic block isn't found.
This commit reports an error when the MIR parser can't find
a basic block with the machine basic block's name.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240174 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-19 20:12:03 +00:00
Alex Lorenz
260366437c MIR Serialization: Serialize the list of machine basic blocks with simple attributes.
This commit implements the initial serialization of machine basic blocks in a
machine function. Only the simple, scalar MBB attributes are serialized. The 
reference to LLVM IR's basic block is preserved when that basic block has a name.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10465


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240145 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-19 17:43:07 +00:00
Alexander Kornienko
cf0db29df2 Fixed/added namespace ending comments using clang-tidy. NFC
The patch is generated using this command:

tools/clang/tools/extra/clang-tidy/tool/run-clang-tidy.py -fix \
  -checks=-*,llvm-namespace-comment -header-filter='llvm/.*|clang/.*' \
  llvm/lib/


Thanks to Eugene Kosov for the original patch!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240137 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-19 15:57:42 +00:00
Eric Christopher
933d2bd391 Fix "the the" in comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240112 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-19 01:53:21 +00:00
Yi Jiang
d30c2356b0 Avoid redundant select node in early if-conversion pass
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240072 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-18 22:34:09 +00:00
Hans Wennborg
5caacef5c1 Switch lowering: enable whole-switch jump tables at -O0.
To same compile time, the analysis to find dense case-clusters in switches is
not done at -O0. However, when the whole switch is dense enough, it is easy to
turn it into a jump table, resulting in much faster code with no extra effort.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240071 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-18 22:22:30 +00:00
Benjamin Kramer
ec7aa02d9f [BranchFolding] Replace custom MachineInstr with MachineInstrExpressionTrait
While the hash functions are subtly different it shouldn't have an
impact. Instructions are checked with isIdenticalTo later.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240040 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-18 20:00:03 +00:00
David Majnemer
6d136d7300 [CodeGen] Don't emit a random reference to the personality function
This should fix issues we've been seeing with Darwin.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240036 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-18 18:31:46 +00:00
Sanjay Patel
fd246aa0b1 fix typo; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240022 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-18 15:53:33 +00:00
Benjamin Kramer
24e04b80a5 [AsmPrinter] Make isRepeatedByteSequence smarter about odd integer types
- zext the value to alloc size first, then check if the value repeats
  with zero padding included. If so we can still emit a .space
- Do the checking with APInt.isSplat(8), which handles non-pow2 types
- Also handle large constants (bit width > 64)
- In a ConstantArray all elements have the same type, so it's sufficient
  to check the first constant recursively and then just compare if all
  following constants are the same by pointer compare

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239977 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-17 23:55:17 +00:00
Sanjay Patel
a2495334bd remove unnecessary casts; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239942 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-17 20:54:46 +00:00
David Majnemer
cc714e2142 Move the personality function from LandingPadInst to Function
The personality routine currently lives in the LandingPadInst.

This isn't desirable because:
- All LandingPadInsts in the same function must have the same
  personality routine.  This means that each LandingPadInst beyond the
  first has an operand which produces no additional information.

- There is ongoing work to introduce EH IR constructs other than
  LandingPadInst.  Moving the personality routine off of any one
  particular Instruction and onto the parent function seems a lot better
  than have N different places a personality function can sneak onto an
  exceptional function.

Differential Revision: http://reviews.llvm.org/D10429

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239940 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-17 20:52:32 +00:00
Ahmed Bougacha
4412d4b51f [CodeGenPrepare] Generalize inserted set from truncs to any inst.
It's been used before to avoid infinite loops caused by separate CGP
optimizations undoing one another.  We found one more such issue
caused by r238054.  To avoid it, generalize the "InsertedTruncs"
set to any inst, and use it to avoid touching those again.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239938 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-17 20:44:32 +00:00
Sanjay Patel
d562b72225 fix typos in comments; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239916 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-17 16:34:48 +00:00
Chandler Carruth
4d7ed3960c [PM/AA] Remove the Location typedef from the AliasAnalysis class now
that it is its own entity in the form of MemoryLocation, and update all
the callers.

This is an entirely mechanical change. References to "Location" within
AA subclases become "MemoryLocation", and elsewhere
"AliasAnalysis::Location" becomes "MemoryLocation". Hope that helps
out-of-tree folks update.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239885 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-17 07:18:54 +00:00
Rafael Espindola
3fea1651f6 Rename and improve emitSectionOffset.
Different object formats represent references from dwarf in different ways.

ELF uses a relocation to the referenced point (except for .dwo) and
COFF/MachO use the offset of the referenced point inside its section.

This patch renames emitSectionOffset because

* It doesn't produce an offset on ELF.
* It changes behavior depending on how DWARF is represented, so adding
dwarf to its name is probably a good thing.

The patch also adds an option to force the use of offsets.That avoids
funny looking code like

  if (!UseOffsets)
    Asm->emitSectionOffset....

It was correct, but read as if the ! was inverted.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239866 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 23:22:02 +00:00
Sanjay Patel
50f4bcf54e rename variables; NFC
...because I see 'StoreBW' and read it as 'store bandwidth'



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239850 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 20:47:19 +00:00
Sanjay Patel
2cd20fef71 extract some code into a helper function for MergeConsecutiveStores(); NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239847 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 20:05:00 +00:00
Matthias Braun
944aaeb28b VirtRegMap: Add undef flag when reading undefined subregisters.
While completely undefined registers are easy to catch and get their
<undef> flag early in ProcessImplicitDefs/RegisterCoalescer reading from
a partially defined register where just the subreg happens to be
undefined is harder to catch so we only add the undef flag in the
virtual register rewriting step.

No testcase as I cannot reproduce the problem on any of the in-tree targets at
the moment.

This fixes rdar://21387089

Differential Revision: http://reviews.llvm.org/D10470

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239838 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 18:22:28 +00:00
Matthias Braun
ff881427ec TargetRegisterInfo: Make the concept of imprecise lane masks explicit
LaneMasks as given by getSubRegIndexLaneMask() have a limited number of
of bits, so for targets with more than 31 disjunct subregister there may
be cases where:

   getSubReg(Reg,A) does not overlap getSubReg(Reg,B)

but we still have

   (getSubRegIndexLaneMask(A) & getSubRegIndexLaneMask(B)) != 0.

I had hoped to keep this an implementation detail of the tablegen but as
my next commit shows we can avoid unnecessary imp-defs operands if we
know that the lane masks in use are precise.

This is in preparation to http://reviews.llvm.org/D10470.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239837 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 18:22:26 +00:00
Alex Lorenz
d8a0ff34d9 MIR Parser: Report an error when a machine function doesn't have a corresponding function.
This commit reports an error when a machine function from a MIR file that contains
LLVM IR can't find a function with the same name in the loaded LLVM IR module.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10468


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239831 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 17:06:29 +00:00
Sanjay Patel
7ddee6601d propagate IR-level fast-math-flags to DAG nodes, disabled by default
This is an updated version of the patch that was checked in at:
http://reviews.llvm.org/rL237046

but subsequently reverted because it exposed a bug in the DAG Combiner:
http://reviews.llvm.org/D9893

This time, there's an enablement flag ("EnableFMFInDAG") around the code in
SelectionDAGBuilder where we copy the set of FP optimization flags from IR
instructions to DAG nodes. So, in theory, there should be no functional change
from this patch as-is, but it will allow testing with the added functionality
to proceed via "-enable-fmf-dag" passed to llc.

This patch adds the minimum plumbing necessary to use IR-level
fast-math-flags (FMF) in the backend without actually using
them for anything yet. This is a follow-on to:
http://reviews.llvm.org/rL235997

Differential Revision: http://reviews.llvm.org/D10403



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239828 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 16:25:43 +00:00
Matt Arsenault
5202cab841 Revert "Revert "Fix merges of non-zero vector stores""
Reapply r239539. Don't assume the collected number of
stores is the same vector size. Just take the first N
stores to fill the vector.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239825 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 15:51:48 +00:00
Daniel Sanders
7f5b833aa3 Replace string GNU Triples with llvm::Triple in TargetMachine::getTargetTriple(). NFC.
Summary:
This continues the patch series to eliminate StringRef forms of GNU triples
from the internals of LLVM that began in r239036.

Reviewers: rengolin

Reviewed By: rengolin

Subscribers: llvm-commits, rengolin

Differential Revision: http://reviews.llvm.org/D10381


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239815 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 13:15:50 +00:00
Arnaud A. de Grandmaison
443838d8aa [MachineSink] Address post-commit review comments
The successors cache is now a local variable, making it more visible that it
is only valid for the MBB being processed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239807 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 08:57:21 +00:00
Alex Lorenz
00b6413c97 MIR Serialization: Print and parse simple machine function attributes.
This commit serializes the simple, scalar attributes from the 
'MachineFunction' class.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10449


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239790 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-16 00:10:47 +00:00
Alex Lorenz
b3607cdd97 MIR Serialization: move the MIR printer out of the MIR printing pass.
This commit decouples the MIR printer and the MIR printing pass so
that it will be possible to move the MIR printer into a separate 
machine IR library later on.

Reviewers: Duncan P. N. Exon Smith


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239788 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-15 23:52:35 +00:00
Adrian Prantl
0f80e47db3 Debug Info IR: Switch DIObjCProperty to use DITypeRef.
This is a prerequisite for turning on ODR type uniquing for ObjC++.

rdar://problem/21377883

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239780 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-15 23:18:03 +00:00
Alex Lorenz
034945e8fe MIR Serialization: Create dummy functions when the MIR file doesn't have LLVM IR.
This commit creates a dummy LLVM IR function with one basic block and an unreachable
instruction for each parsed machine function when the MIR file doesn't have LLVM IR.
This change is required as the machine function analysis pass creates machine
functions only for the functions that are defined in the current LLVM module.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10135


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239778 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-15 23:07:38 +00:00
Alex Lorenz
185789e9a0 MIR Serialization: Report an error when machine functions have the same name.
This commit reports an error when the MIR parser encounters a machine
function with the name that is the same as the name of a different
machine function.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10130


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239774 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-15 22:23:23 +00:00
Peter Collingbourne
7ffec838a2 Protection against stack-based memory corruption errors using SafeStack
This patch adds the safe stack instrumentation pass to LLVM, which separates
the program stack into a safe stack, which stores return addresses, register
spills, and local variables that are statically verified to be accessed
in a safe way, and the unsafe stack, which stores everything else. Such
separation makes it much harder for an attacker to corrupt objects on the
safe stack, including function pointers stored in spilled registers and
return addresses. You can find more information about the safe stack, as
well as other parts of or control-flow hijack protection technique in our
OSDI paper on code-pointer integrity (http://dslab.epfl.ch/pubs/cpi.pdf)
and our project website (http://levee.epfl.ch).

The overhead of our implementation of the safe stack is very close to zero
(0.01% on the Phoronix benchmarks). This is lower than the overhead of
stack cookies, which are supported by LLVM and are commonly used today,
yet the security guarantees of the safe stack are strictly stronger than
stack cookies. In some cases, the safe stack improves performance due to
better cache locality.

Our current implementation of the safe stack is stable and robust, we
used it to recompile multiple projects on Linux including Chromium, and
we also recompiled the entire FreeBSD user-space system and more than 100
packages. We ran unit tests on the FreeBSD system and many of the packages
and observed no errors caused by the safe stack. The safe stack is also fully
binary compatible with non-instrumented code and can be applied to parts of
a program selectively.

This patch is our implementation of the safe stack on top of LLVM. The
patches make the following changes:

- Add the safestack function attribute, similar to the ssp, sspstrong and
  sspreq attributes.

- Add the SafeStack instrumentation pass that applies the safe stack to all
  functions that have the safestack attribute. This pass moves all unsafe local
  variables to the unsafe stack with a separate stack pointer, whereas all
  safe variables remain on the regular stack that is managed by LLVM as usual.

- Invoke the pass as the last stage before code generation (at the same time
  the existing cookie-based stack protector pass is invoked).

- Add unit tests for the safe stack.

Original patch by Volodymyr Kuznetsov and others at the Dependable Systems
Lab at EPFL; updates and upstreaming by myself.

Differential Revision: http://reviews.llvm.org/D6094

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239761 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-15 21:07:11 +00:00
Alex Lorenz
a15d888abf MIR Serialization: Connect the machine function analysis pass to the MIR parser.
This commit connects the machine function analysis pass (which creates machine
functions) to the MIR parser, which will initialize the machine functions 
with the state from the MIR file and reconstruct the machine IR.

This commit introduces a new interface called 'MachineFunctionInitializer',
which can be used to provide custom initialization for the machine functions.

This commit also introduces a new diagnostic class called 
'DiagnosticInfoMIRParser' which is used for MIR parsing errors.
This commit modifies the default diagnostic handling in LLVMContext - now the
the diagnostics are printed directly into llvm::errs() so that the MIR parsing 
errors can be printed with colours.  

Reviewers: Justin Bogner

Differential Revision: http://reviews.llvm.org/D9928


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239753 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-15 20:30:22 +00:00
Sanjoy Das
18a05df213 Unbreak the build from r239740.
Do not re-use an enum name as a field name.  Some bots don't like this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239746 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-15 19:29:44 +00:00
Sanjoy Das
8d5b28507b [CodeGen] Add a pass to fold null checks into nearby memory operations.
Summary:
This change adds an "ImplicitNullChecks" target dependent pass.  This
pass folds null checks into memory operation using the FAULTING_LOAD
pseudo-op introduced in previous patches.

Depends on D10197
Depends on D10199
Depends on D10200

Reviewers: reames, rnk, pgavlin, JosephTremoulet, atrick

Reviewed By: atrick

Subscribers: ab, JosephTremoulet, llvm-commits

Differential Revision: http://reviews.llvm.org/D10201

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239743 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-15 18:44:27 +00:00
Sanjoy Das
319c91bbb0 [TargetInstrInfo] Rename getLdStBaseRegImmOfs and implement for x86.
Summary:

TargetInstrInfo::getLdStBaseRegImmOfs to
TargetInstrInfo::getMemOpBaseRegImmOfs and implement for x86.  The
implementation only handles a few easy cases now and will be made more
sophisticated in the future.

This is NFCI: the only user of `getLdStBaseRegImmOfs` (now
`getmemOpBaseRegImmOfs`) is `LoadClusterMotion` and `LoadClusterMotion`
is disabled for x86.

Reviewers: reames, ab, MatzeB, atrick

Reviewed By: MatzeB, atrick

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10199

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239741 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-15 18:44:14 +00:00
Sanjoy Das
1991e2a4df [CodeGen] Introduce a FAULTING_LOAD_OP pseudo-op.
Summary:
This instruction encodes a loading operation that may fault, and a label
to branch to if the load page-faults.  The locations of potentially
faulting loads and their "handler" destinations are recorded in a
FaultMap section, meant to be consumed by LLVM's clients.

Nothing generates FAULTING_LOAD_OP instructions yet, but they will be
used in a future change.

The documentation (FaultMaps.rst) needs improvement and I will update
this diff with a more expanded version shortly.

Depends on D10196

Reviewers: rnk, reames, AndyAyers, ab, atrick, pgavlin

Reviewed By: atrick, pgavlin

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10197

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239740 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-15 18:44:08 +00:00
Arnaud A. de Grandmaison
981ffd1bc4 [MachineSink] Improve runtime performance. NFC.
This patch fixes a compilation time issue, when MachineSink faces PHIs
with a huge number of operands. This can happen for example in goto table
based interpreters, where some basic blocks can have several of those PHIs,
each one with several hundreds operands. MachineSink was spending a
significant time re-building and re-sorting the list of successors of
the current MachineBasicBlock. The computing and sorting of the current
MachineBasicBlock successors is now cached.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239720 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-15 09:09:06 +00:00
NAKAMURA Takumi
145cdc632a AsmPrinter.cpp: Avoid crashes for targeting like "arm-mingw32". CurrentFnSym might not be <MCSymbolELF> here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239692 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-14 00:23:40 +00:00
NAKAMURA Takumi
82b72bed60 Reformat.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239691 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-14 00:23:33 +00:00
Simon Pilgrim
4692cb1303 [DAGCombiner] Added BSWAP(BSWAP(x)) -> x combine pattern.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239682 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-13 16:25:12 +00:00
Sanjay Patel
75975e2a29 hoist loop-invariant; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239681 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-13 15:33:15 +00:00
Sanjay Patel
ea58c7de01 remove function names from comments and clean up; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239680 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-13 15:32:45 +00:00
Simon Pilgrim
4a9a71e3ec [SelectionDAG] Added assertions + UNDEF handling for BSWAP node creation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239679 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-13 15:23:58 +00:00
Sanjay Patel
4aeeb9e5dc remove unnecessary casts; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239678 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-13 15:06:33 +00:00
Simon Pilgrim
d8b27b1cb1 [DAGCombiner] Added BSWAP vector constant folding support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239675 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-13 14:08:15 +00:00
Simon Pilgrim
6b520d01a2 Stripped trailing whitespace. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239674 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-13 12:57:36 +00:00
Matthias Braun
8ce6c58e41 Rename TargetSubtargetInfo::enablePostMachineScheduler() to enablePostRAScheduler()
r213101 changed the behaviour of this method to not only affect the
PostMachineScheduler scheduler but also the PostRAScheduler scheduler,
renaming should make this fact clear. Also document that the preferred
way is to specify this in the scheduling model instead of overriding
this method.

Differential Revision: http://reviews.llvm.org/D10427

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239659 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-13 03:42:16 +00:00
Matthias Braun
6fee0b00e2 MachineLICM: Use TargetSchedModel instead of just itineraries
This will use Itinieraries if available, but will also work if just a
MCSchedModel is available.

Differential Revision: http://reviews.llvm.org/D10428

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239658 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-13 03:42:11 +00:00
Reid Kleckner
2bd0221fa4 [WinEH] Put finally pointers in the handler scope table field
We were putting them in the filter field, which is correct for 64-bit
but wrong for 32-bit.

Also switch the order of scope table entry emission so outermost entries
are emitted first, and fix an obvious state assignment bug.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239574 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 23:37:18 +00:00
Reid Kleckner
3e16bd3aaf [WinEH] Create an llvm.x86.seh.exceptioninfo intrinsic
This intrinsic is like framerecover plus a load. It recovers the EH
registration stack allocation from the parent frame and loads the
exception information field out of it, giving back a pointer to an
EXCEPTION_POINTERS struct. It's designed for clang to use in SEH filter
expressions instead of accessing the EXCEPTION_POINTERS parameter that
is available on x64.

This required a minor change to MC to allow defining a label variable to
another absolute framerecover label variable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239567 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 22:32:23 +00:00
Daniel Sanders
4ddb0ced90 Replace string GNU Triples with llvm::Triple in TargetMachine. NFC.
Summary:
For the moment, TargetMachine::getTargetTriple() still returns a StringRef.

This continues the patch series to eliminate StringRef forms of GNU triples
from the internals of LLVM that began in r239036.

Reviewers: rengolin

Reviewed By: rengolin

Subscribers: ted, llvm-commits, rengolin, jholewinski

Differential Revision: http://reviews.llvm.org/D10362

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239554 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 19:41:26 +00:00
Ahmed Bougacha
fd83cb21ce [CodeGen] ArrayRef'ize cond/pred in various TII APIs. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239553 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 19:30:37 +00:00
Rafael Espindola
6c56decee0 Generalize emitAbsoluteSymbolDiff.
This makes emitAbsoluteSymbolDiff always succeed and moves logic from the asm
printer to it.

The object one now also works on ELF. If two symbols are in the same fragment,
we will never move them apart.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239552 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 18:58:08 +00:00
Reid Kleckner
cd354fa84d Revert "Fix merges of non-zero vector stores"
This reverts commit r239539.

It was causing SDAG assertions while building freetype.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239543 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 17:25:24 +00:00
Matt Arsenault
564ff6478c Fix merges of non-zero vector stores
Now actually stores the non-zero constant instead of 0.
I somehow forgot to include this part of r238108.

The test change was just an independent instruction order swap,
so just add another check line to satisfy CHECK-NEXT.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239539 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 16:03:52 +00:00
Sanjay Patel
6b71bf10b6 remove function names from comments; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239532 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 14:26:49 +00:00
Arnaud A. de Grandmaison
3b8d35fb8d [LiveVariables] Improve isLiveOut runtime performances. NFC.
On large goto table based interpreters, where phi nodes can have (very) large
fan-ins, isLiveOut exhibited poor performances: about 40% of the full
codegen time was spent in PHIElim, sorting MachineBasicBlock addresses.

This patch improve the performances for such cases, and does not show
compile time regressions on the LNT, at bootstrap (llvm+clang+lldb) or
any other benchmarks we have in-house.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239510 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 07:50:21 +00:00
Arnaud A. de Grandmaison
a2cdb8ca59 [PHIElim] Use ranges and const-ify, NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239508 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 07:45:05 +00:00
Pete Cooper
5a118340dd Remove MachineModuleInfo::UsedFunctions as it has no users.
It hasn't been used since r130964.

This also removes MachineModuleInfo::isUsedFunction and
MachineModuleInfo::AnalyzeModule, both of which were only
there to support UsedFunctions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239501 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-11 01:04:56 +00:00
Sanjay Patel
bb79423d0f punctuation policing; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239484 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-10 19:52:58 +00:00
Reid Kleckner
3de99b70aa [WinEH] _except_handlerN uses 0 instead of 1 to indicate catch-all
Our usage of 1 was a holdover from __C_specific_handler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239482 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-10 18:14:07 +00:00
Sanjay Patel
708de57fee fix typo in comment; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239478 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-10 17:08:12 +00:00
Igor Laevsky
544d686bc0 [StatepointLowering] Reuse stack slots across basic blocks
During statepoint lowering we can sometimes avoid spilling of the value if we know that it was already spilled for previous statepoint.
We were doing this by checking if incoming statepoint value was lowered into load from stack slot. This was working only in boundaries of one basic block.

But instead of looking at the lowered node we can look directly at the llvm-ir value and if it was gc.relocate (or some simple modification of it) look up stack slot for it's derived pointer and reuse stack slot from it. This allows us to look across basic block boundaries.

Differential Revision: http://reviews.llvm.org/D10251



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239472 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-10 12:31:53 +00:00
Reid Kleckner
6d7e69b227 Remove safeseh debug print and remove extra braces
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239449 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-10 01:13:44 +00:00
Reid Kleckner
c8e72e9126 [WinEH] Emit .safeseh directives for all 32-bit exception handlers
Use a "safeseh" string attribute to do this. You would think we chould
just accumulate the set of personalities like we do on dwarf, but this
fails to account for the LSDA-loading thunks we use for
__CxxFrameHandler3. Each of those needs to make it into .sxdata as well.
The string attribute seemed like the most straightforward approach.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239448 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-10 01:02:30 +00:00
Reid Kleckner
a8c0a9b042 Fix -Wsign-compare warning in WinException.cpp
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239445 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-10 00:04:53 +00:00
Tobias Edler von Koch
cbe2100f7e [RegisterScavenger] Fix handling of predicated instructions
Summary:
The RegisterScavenger explicitly ignores <kill> flags on operands of
predicated instructions and therefore assumes that such registers remain
live. When it then scavenges such a register, it inserts a spill of this
(killed) register. This is invalid code and gets flagged up by the 
verifier.

Nowadays kill flags are set correctly on predicated instructions. This
patch makes the Scavenger respect them.

The bug has so far only been triggered by an internal pass, so I don't
have a test case unfortunately.

Fixes PR23119.

Reviewers: hfinkel, tobiasvk_caf

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9039

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239439 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 22:10:58 +00:00
Reid Kleckner
bdcbc426af [WinEH] Add 32-bit SEH state table emission prototype
This gets all the handler info through to the asm printer and we can
look at the .xdata tables now. I've convinced one small catch-all test
case to work, but other than that, it would be a stretch to say this is
functional.

The state numbering algorithm avoids doing any scope reconstruction as
we do for C++ to simplify the implementation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239433 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 21:42:19 +00:00
David Blaikie
6eee2375d9 Revert "[DWARF] Fix a few corner cases in expression emission"
This reverts commit r239380 due to apparently GDB regressions:
http://lab.llvm.org:8011/builders/clang-x86_64-ubuntu-gdb-75/builds/22562

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239420 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 18:01:51 +00:00
Keno Fischer
b4863a99c9 [DWARF] Fix a few corner cases in expression emission
Summary: I noticed an object file with `DW_OP_reg4 DW_OP_breg4 0` as a DWARF expression,
which I traced to a missing break (and `++I`) in this code snippet.
While I was at it, I also added support for a few other corner cases
along the same lines that I could think of.

Test Plan: Hand-crafted test case to exercises these cases is included.

Reviewers: echristo, dblaikie, aprantl

Reviewed By: aprantl

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10302

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239380 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 01:53:59 +00:00
Matt Arsenault
d2f17c4e2b Implement computeKnownBits for min/max nodes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239378 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 00:52:41 +00:00
Matt Arsenault
d99ce2f630 MC: Add target hook to control symbol quoting
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239370 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-09 00:31:39 +00:00
Keno Fischer
4332f869bf [InstrInfo] Refactor foldOperandImpl to thread through InsertPt. NFC
Summary:
This was a longstanding FIXME and is a necessary precursor to cases
where foldOperandImpl may have to create more than one instruction
(e.g. to constrain a register class). This is the split out NFC changes from
D6262.

Reviewers: pete, ributzka, uweigand, mcrosier

Reviewed By: mcrosier

Subscribers: mcrosier, ted, llvm-commits

Differential Revision: http://reviews.llvm.org/D10174

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239336 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 20:09:58 +00:00
Akira Hatanaka
fa6bc2e94d [ARM] Pass a callback to FunctionPass constructors to enable skipping execution
on a per-function basis.

Previously some of the passes were conditionally added to ARM's pass pipeline
based on the target machine's subtarget. This patch makes changes to add those
passes unconditionally and execute them conditonally based on the predicate
functor passed to the pass constructors. This enables running different sets of
passes for different functions in the module.

rdar://problem/20542263

Differential Revision: http://reviews.llvm.org/D8717


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239325 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 18:50:43 +00:00
Oliver Stannard
7c40b1a7bc Fix assertion failure in global-merge with unused ConstantExpr
The global-merge pass was crashing because it assumes that all ConstantExprs
(reached via the global variables that they use) have at least one user.

I haven't worked out a way to test this, as an unused ConstantExpr cannot be
represented by serialised IR, and global-merge can only be run in llc, which
does not run any passes which can make a ConstantExpr dead.

This (reduced to the point of silliness) C code triggers this bug when compiled
for arm-none-eabi at -O1:

  static a = 7;
  static volatile b[10] = {&a};

  c;
  main() {
    c = 0;
    for (; c < 10;)
      printf(b[c]);
  }

Differential Revision: http://reviews.llvm.org/D10314



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239308 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 16:55:31 +00:00
Simon Pilgrim
298222a930 [DAGCombiner] Added CTLZ vector constant folding support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239305 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 16:19:00 +00:00
Simon Pilgrim
d72b357107 [DAGCombiner] Added CTTZ vector constant folding support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239293 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-08 09:57:09 +00:00
Simon Pilgrim
43421abda8 [DAGCombiner] Added CTPOP vector constant folding support.
Added tests to the existing SSE/AVX test files.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239252 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-07 15:37:14 +00:00
Akira Hatanaka
a37c524912 Move the code in TargetPassConfig::addPass that inserts machine printer pass to
the overloaded version of addPass which takes Pass*.

This change enables inserting the machine printer pass when the overloaded
version of addPass that takes Pass* is called to add a pass, instead of the
one which takes AnalysisID. I need this to prevent make-check tests from
failing when I commit another patch later.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239192 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-05 21:58:14 +00:00
Fiona Glaser
5a0d6b758c DAGCombiner: don't duplicate (fmul x, c) in visitFNEG if fneg is free
For targets with a free fneg, this fold is always a net loss if it
ends up duplicating the multiply, so definitely avoid it.

This might be true for some targets without a free fneg too, but
I'll leave that for future investigation.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239167 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-05 17:52:34 +00:00
Andrea Di Biagio
406e5ea598 Simplify code; NFC.
Also, moved test cases from CodeGen/X86/fold-buildvector-bug.ll into
CodeGen/X86/buildvec-insertvec.ll and regenerated CHECK lines using
update_llc_test_checks.py.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239142 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-05 10:29:55 +00:00
Swaroop Sridhar
bb3883dfba Statepoint: Fix handling of Far Immediate calls
gc.statepoint intrinsics with a far immediate call target 
were lowered incorrectly as pc-rel32 calls.

This change fixes the problem, and generates an indirect call 
via a scratch register.

For example: 

Intrinsic:
  %safepoint_token = call i32 (i64, i32, void ()*, i32, i32, ...) @llvm.experimental.gc.statepoint.p0f_isVoidf(i64 0, i32 0, void ()* inttoptr (i64 140727162896504 to void ()*), i32 0, i32 0, i32 0, i32 0)

Old Incorrect Lowering:
  callq 140727162896504

New Correct Lowering:
  movabsq $140727162896504, %rax 
  callq *%rax

In lowerCallFromStatepoint(), the callee-target was modified and 
represented as a "TargetConstant" node, rather than a "Constant" node.
Undoing this modification enabled LowerCall() to generate the 
correct CALL instruction.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239114 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-04 23:03:21 +00:00
Benjamin Kramer
c9f2b5d535 [SDAG switch lowering] Fix switch case -> or merging for 0 and INT_MIN
The big/small ordering here is based on signed values so SmallValue will
be INT_MIN and BigValue 0. This shouldn't be a problem but the code
assumed that BigValue always had more bits set than SmallValue.

We used to just miss the transformation, but a recent refactoring of
mine turned this into an assertion failure.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239105 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-04 22:05:51 +00:00
Sergey Dmitrouk
a8dc0ee520 Erase constant dbgloc on reuse in PHI node
Basic block selection involves checking successor BBs for PHI nodes
that depend on the current BB.  In case such BBs are found, the value
being selected is a constant and such constant already exists in
current BB, it's value is reused.

This might lead to wrong locations in some situations, especially if
same constant value ends up being materialized twice in two different
ways, which discards that sharing and leaves us with wrong debug
location in the successor BB.

In code this involves the following sequence of calls:

 SelectionDAGBuilder::HandlePHINodesInSuccessorBlocks ->
 SelectionDAGBuilder::CopyValueToVirtualRegister ->
 SelectionDAGBuilder::getNonRegisterValue

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239089 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-04 20:48:40 +00:00
Ahmed Bougacha
0d9335eda7 [GlobalMerge] Take into account minsize on Global users' parents.
Now that we can look at users, we can trivially do this: when we would
have otherwise disabled GlobalMerge (currently -O<3), we can just run
it for minsize functions, as it's usually a codesize win.

Differential Revision: http://reviews.llvm.org/D10054


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239087 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-04 20:39:23 +00:00
Andrea Di Biagio
c07ee0c4ff [DAGCombiner] Fix wrong folding of a build_vector into a blend with zero.
Method 'visitBUILD_VECTOR' in the DAGCombiner knows how to combine a
build_vector of a bunch of extract_vector_elt nodes and constant zero nodes
into a shuffle blend with a zero vector.

However, method 'visitBUILD_VECTOR' forgot that a floating point
build_vector may contain negative zero as well as positive zero.

Example:

define <2 x double> @example(<2 x double> %A) {
entry:
  %0 = extractelement <2 x double> %A, i32 0
  %1 = insertelement <2 x double> undef, double %0, i32 0
  %2 = insertelement <2 x double> %1, double -0.0, i32 1
  ret <2 x double> %2
}

Before this patch, llc (with -mattr=+sse4.1) wrongly generated
  movq   %xmm0, %xmm0  # xmm0 = xmm0[0],zero

So, the sign bit of the negative zero was effectively lost.

This patch fixes the problem by adding explicit checks for positive zero.

With this patch, llc produces the following code for the example above:
  movhpd .LCPI0_0(%rip), %xmm0

where .LCPI0_0 referes to a 'double -0'.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239070 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-04 19:15:01 +00:00
Benjamin Kramer
b0ed8b72ef [SDag switch lowering] Simplify code a bit. No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239056 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-04 17:07:59 +00:00
Matt Arsenault
013ef59713 CodeGenPrepare: Provide address space to isLegalAddressingMode
Use -1 as the address space if it can't be determined.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239052 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-04 16:17:38 +00:00
Matt Arsenault
a1f2f389f6 Pass address space to isLegalAddressingMode in DAGCombiner
No test because I don't know of a target that makes use
of address spaces and indexed load / store.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239051 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-04 16:17:34 +00:00
Hans Wennborg
bebb0b5a34 Switch lowering: fix assert in buildBitTests (PR23738)
When checking (High - Low + 1).sle(BitWidth), BitWidth would be truncated
to the size of the left-hand side. In the case of this PR, the left-hand
side was i4, so BitWidth=64 got truncated to 0 and the assert failed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239048 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-04 15:55:00 +00:00
James Molloy
cd2647f4fd Don't create a MIN/MAX node if the underlying compare has more than one use.
If the compare in a select pattern has another use then it can't be removed, so we'd just
be creating repeated code if we created a min/max node.

Spotted by Matt Arsenault!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239037 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-04 13:48:23 +00:00
Sanjoy Das
8fadf8f4d3 [SelectionDAG] Fix PR23603.
Summary:
LLVM's MI level notion of invariant_load is different from LLVM's IR
level notion of invariant_load with respect to dereferenceability.  The
IR notion of invariant_load only guarantees that all *non-faulting*
invariant loads result in the same value.  The MI notion of invariant
load guarantees that the load can be legally moved to any location
within its containing function.  The MI notion of invariant_load is
stronger than the IR notion of invariant_load -- an MI invariant_load is
an IR invariant_load + a guarantee that the location being loaded from
is dereferenceable throughout the function's lifetime.

Reviewers: hfinkel, reames

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10075

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238881 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-02 22:33:30 +00:00
Rafael Espindola
f7e0685b9a Create a MCSymbolELF.
This create a MCSymbolELF class and moves SymbolSize since only ELF
needs a size expression.

This reduces the size of MCSymbol from 56 to 48 bytes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238801 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-02 00:25:12 +00:00
Matthias Braun
fa2b7e5cb4 LiveRangeEdit: Fix liveranges not shrinking on subrange kill.
If a dead instruction we may not only have a last-use in the main live
range but also in a subregister range if subregisters are tracked. We
need to partially rebuild live ranges in both cases.

The testcase only broke when subregister liveness was enabled. I
commited it in the current form because there is currently no flag to
enable/disable subregister liveness.

This fixes PR23720.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238785 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-01 21:26:26 +00:00
Owen Anderson
6f9474c1e1 Disable MachineSink on convergent operations, similar to how IR Sink is
restricted.  No test because no in-tree target currently has convergent
MachineInstr's.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238763 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-01 17:26:30 +00:00
Matt Arsenault
5f3a6430d6 Add address space argument to isLegalAddressingMode
This is important because of different addressing modes
depending on the address space for GPU targets.

This only adds the argument, and does not update
any of the uses to provide the correct address space.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238723 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-01 05:31:59 +00:00
Chandler Carruth
89a133960b [sdag] Add the helper I most want to the DAG -- building a bitcast
around a value using its existing SDLoc.

Start using this in just one function to save omg lines of code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238638 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-30 04:14:10 +00:00
Jim Grosbach
586c0042da MC: Clean up MCExpr naming. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238634 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-30 01:25:56 +00:00
Fiona Glaser
dbf84c95fe SelectionDAG: fix logic for promoting shift types
r238503 fixed the problem of too-small shift types by promoting them
during legalization, but the correct solution is to promote only the
operands that actually demand promotion.

This fixes a crash on an out-of-tree target caused by trying to
promote an operand that can't be promoted.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238632 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-29 23:37:22 +00:00
Benjamin Kramer
9589ff8949 Replace push_back(Constructor(foo)) with emplace_back(foo) for non-trivial types
If the type isn't trivially moveable emplace can skip a potentially
expensive move. It also saves a couple of characters.


Call sites were found with the ASTMatcher + some semi-automated cleanup.

memberCallExpr(
    argumentCountIs(1), callee(methodDecl(hasName("push_back"))),
    on(hasType(recordDecl(has(namedDecl(hasName("emplace_back")))))),
    hasArgument(0, bindTemporaryExpr(
                       hasType(recordDecl(hasNonTrivialDestructor())),
                       has(constructExpr()))),
    unless(isInTemplateInstantiation()))

No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238602 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-29 19:43:39 +00:00
Matthias Braun
3bd732d1ee MachineCopyPropagation: Remove the copies instead of using KILL instructions.
For some history here see the commit messages of r199797 and r169060.

The original intent was to fix cases like:

%EAX<def> = COPY %ECX<kill>, %RAX<imp-def>
%RCX<def> = COPY %RAX<kill>

where simply removing the copies would have RCX undefined as in terms of
machine operands only the ECX part of it is defined. The machine
verifier would complain about this so 169060 changed such COPY
instructions into KILL instructions so some super-register imp-defs
would be preserved. In r199797 it was finally decided to always do this
regardless of super-register defs.

But this is wrong, consider:
R1 = COPY R0
...
R0 = COPY R1
getting changed to:
R1 = KILL R0
...
R0 = KILL R1

It now looks like R0 dies at the first KILL and won't be alive until the
second KILL, while in reality R0 is alive and must not change in this
part of the program.

As this only happens after register allocation there is not much code
still performing liveness queries so the issue was not noticed.  In fact
I didn't manage to create a testcase for this, without unrelated changes
I am working on at the moment.

The fix is simple: As of r223896 the MachineVerifier allows reads from
partially defined registers, so the whole transforming COPY->KILL thing
is not necessary anymore. This patch also changes a similar (but more
benign case as the def and src are the same register) case in the
VirtRegRewriter.

Differential Revision: http://reviews.llvm.org/D10117

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238588 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-29 18:19:25 +00:00
Alex Lorenz
83d291ae8b MIR Serialization: use correct line and column numbers for LLVM IR errors.
This commit translates the line and column numbers for LLVM IR
errors from the numbers in the YAML block scalar to the numbers 
in the MIR file so that the MIRParser users can report LLVM IR 
errors with the correct line and column numbers.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10108


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238576 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-29 17:05:41 +00:00
Reid Kleckner
16e4a624c4 [WinEH] Emit EH tables for __CxxFrameHandler3 on 32-bit x86
Small (really small!) C++ exception handling examples work on 32-bit x86
now.

This change disables the use of .seh_* directives in WinException when
CFI is not in use. It also uses absolute symbol references in the tables
instead of imagerel32 relocations.

Also fixes a cache invalidation bug in MMI personality classification.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238575 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-29 17:00:57 +00:00
Matthias Braun
2ec7970df4 This should have been a reference
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238540 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-29 02:59:59 +00:00
Matthias Braun
e67bd6c248 CodeGen: Use mop_iterator instead of MIOperands/ConstMIOperands
MIOperands/ConstMIOperands are classes iterating over the MachineOperand
of a MachineInstr, however MachineInstr::mop_iterator does the same
thing.

I assume these two iterators exist to have a uniform interface to
iterate over the operands of a machine instruction bundle and a single
machine instruction. However in practice I find it more confusing to have 2
different iterator classes, so this patch transforms (nearly all) the
code to use mop_iterators.

The only exception being MIOperands::anlayzePhysReg() and
MIOperands::analyzeVirtReg() still needing an equivalent, I leave that
as an exercise for the next patch.

Differential Revision: http://reviews.llvm.org/D9932

This version is slightly modified from the proposed revision in that it
introduces MachineInstr::getOperandNo to avoid the extra counting
variable in the few loops that previously used MIOperands::getOperandNo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238539 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-29 02:56:46 +00:00
Matthias Braun
97c5de758a MachineFrameInfo: Simplify pristine register calculation.
About pristine regsiters:
Pristine registers "hold a value that is useless to the current
function, but that must be preserved - they are callee saved registers
that have not been saved." This concept saves compile time as it frees
the prologue/epilogue inserter from adding every such register to every
basic blocks live-in list.

However the current code in getPristineRegs is formulated in a
complicated way: Inside the function prologue and epilogue all callee
saves are considered pristine, while in the rest of the code only the
non-saved ones are considered pristine.  This requires logic to
differentiate between prologue/epilogue and the rest and in the presence
of shrink-wrapping this even becomes complicated/expensive.  It's also
unnecessary because the prologue epilogue inserters already mark
callee-save registers that are saved/restores properly in the respective
blocks in the prologue/epilogue (see updateLiveness() in
PrologueEpilogueInserter.cpp). So only declaring non-saved/restored
callee saved registers as pristine just works.

Differential Revision: http://reviews.llvm.org/D10101

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238524 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-28 23:20:35 +00:00
Reid Kleckner
178db50629 Rename Win64Exception.(cpp|h) to WinException.(cpp|h)
This is in preparation for reusing this for 32-bit x86 EH table
emission.  Also updates the type name for consistency. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238521 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-28 22:47:01 +00:00
Alex Lorenz
3682046086 MIR Serialization: print and parse machine function names.
This commit introduces a serializable structure called
'llvm::yaml::MachineFunction' that stores the machine
function's name. This structure will mirror the machine 
function's state in the future.

This commit prints machine functions as YAML documents
containing a YAML mapping that stores the state of a machine
function. This commit also parses the YAML documents
that contain the machine functions.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D9841


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238519 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-28 22:41:12 +00:00
Quentin Colombet
354851651c [MachineCopyPropagation] Fix a bug with undef handling when the value is actualy alive.
Test case will follow.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238518 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-28 22:38:40 +00:00
Reid Kleckner
5f50442d79 [WinEH] Start inserting state number stores for C++ EH
This moves all the state numbering code for C++ EH to WinEHPrepare so
that we can call it from the X86 state numbering IR pass that runs
before isel.

Now we just call the same state numbering machinery and insert a bunch
of stores. It also populates MachineModuleInfo with information about
the current function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238514 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-28 22:00:24 +00:00
David Majnemer
81f64c04d7 [SelectionDAG] Scalar shift amounts may require legalization
The shift amount may be too small to cope with promoted left hand side,
make sure to promote it as well.

This fixes PR23664.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238503 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-28 21:29:59 +00:00
Duncan P. N. Exon Smith
2c7cce70cd AsmPrinter: Stop exposing underlying DIE children list, NFC
Update `DIE` API to hide the implementation of `DIE::Children` so we can
swap it out.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238468 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-28 19:56:34 +00:00
Duncan P. N. Exon Smith
bfecc6bdee AsmPrinter: Rename begin_values() => values_begin(), NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238456 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-28 18:55:38 +00:00
Benjamin Kramer
331b719b2b [AsmPrinter] Destroy allocated DIEAbbrevs on teardown.
DIEAbbrev contains a SmallVector that can leak for overly large abbrevs. They
used to be owned by the DIE, but after the recent refactoring DWARFFile
allocates its own abbrevs.

Leak found by asan.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238418 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-28 12:55:43 +00:00
Duncan P. N. Exon Smith
2c46a37b03 AsmPrinter: Avoid a warning in NDEBUG, NFC
Should fix the -Werror release build:
http://lab.llvm.org:8011/builders/lld-x86_64-darwin13/builds/11113

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238375 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-27 23:02:36 +00:00
Duncan P. N. Exon Smith
59be554de4 AsmPrinter: Return added DIE from DIE::addChild()
Change `DIE::addChild()` to return a reference to the just-added node,
and update consumers to use it directly.  An upcoming commit will
abstract away (and eventually change) the underlying storage of
`DIE::Children`.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238372 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-27 22:59:03 +00:00
Fiona Glaser
49e9f44cb1 RegisterPressure: fix debug prints in case of physical registers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238371 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-27 22:51:47 +00:00
Duncan P. N. Exon Smith
636aba5bd1 AsmPrinter: Stop exposing underlying DIEValue list, NFC
Change the `DIE` API to hide the implementation of the list of
`DIEValue`s.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238369 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-27 22:44:06 +00:00
Duncan P. N. Exon Smith
95afdd3a07 AsmPrinter: Remove DIEHash::AttrEntry, NFC
Remove "the most boring struct ever" (thanks to review by Eric).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238366 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-27 22:36:37 +00:00
Duncan P. N. Exon Smith
611a2f2322 AsmPrinter: Store abbreviation data directly in DIE and DIEValue
Stop storing a `DIEAbbrev` in `DIE`, since the data fits neatly inside
the `DIEValue` list.  Besides being a cleaner data structure (avoiding
the parallel arrays), this gives us more freedom to rearrange the
`DIEValue` list.

This fixes the temporary memory regression from 845 MB up to 879 MB, and
drops it further to 829 MB for a net memory decrease of around 1.9%
(incremental decrease around 5.7%).

(I'm looking at `llc` memory usage on `verify-uselistorder.lto.opt.bc`;
see r236629 for details.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238364 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-27 22:31:41 +00:00
Duncan P. N. Exon Smith
09fe4bf794 Reapply "AsmPrinter: Change DIEValue to be stored by value"
This reverts commit r238350, effectively reapplying r238349 after fixing
(all?) the problems, all somehow related to how I was using
`AlignedArrayCharUnion<>` inside `DIEValue`:

  - MSVC can only handle `sizeof()` on types, not values.  Change the
    assert.
  - GCC doesn't know the `is_trivially_copyable` type trait.  Instead of
    asserting it, add destructors.
  - Call placement new even when constructing POD (i.e., the pointers).
  - Instead of copying the char buffer, copy the casted classes.

I've left in a couple of `static_assert`s that I think both MSVC and GCC
know how to handle.  If the bots disagree with me, I'll remove them.

  - Check that the constructed type is either standard layout or a
    pointer.  This protects against a programming error: we really want
    the "small" `DIEValue`s to be small and simple, so don't
    accidentally change them not to be.
  - Similarly, check that the size of the buffer is no bigger than a
    `uint64_t` or a pointer.  (I thought checking against
    `sizeof(uint64_t)` would be good enough, but Chandler suggested that
    pointers might sometimes be bigger than that in the context of
    sanitizers.)

I've also committed r238359 in the meantime, which introduces a
DIEValue.def to simplify dispatching between the various types (thanks
to a review comment by David Blaikie).  Without that, this commit would
be almost unintelligible.

Here's the original commit message:
--
Change `DIEValue` to be stored/passed/etc. by value, instead of
reference.  It's now a discriminated union, with a `Val` field storing
the actual type.  The classes that used to inherit from `DIEValue` no
longer do.  There are two categories of these:

  - Small values fit in a single pointer and are stored by value.
  - Large values require auxiliary storage, and are stored by reference.

The only non-mechanical change is to tools/dsymutil/DwarfLinker.cpp.  It
was relying on `DIEInteger`s being passed around by reference, so I
replaced that assumption with a `PatchLocation` type that stores a safe
reference to where the `DIEInteger` lives instead.

This commit causes a temporary regression in memory usage, since I've
left merging `DIEAbbrevData` into `DIEValue` for a follow-up commit.  I
measured an increase from 845 MB to 879 MB, around 3.9%.  The follow-up
drops it lower than the starting point, and I've only recently brought
the memory this low anyway, so I'm committing these changes separately
to keep them incremental.  (I also considered swapping the commits, but
the other one first would cause a lot more code churn.)

(I'm looking at `llc` memory usage on `verify-uselistorder.lto.opt.bc`;
see r236629 for details.)
--

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238362 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-27 22:14:58 +00:00
Duncan P. N. Exon Smith
344593ce6c AsmPrinter: Introduce DIEValue.def, NFC
Use a .def macro file to iterate through the various subclasses of
`DIEValue`.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238359 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-27 21:15:43 +00:00
Duncan P. N. Exon Smith
3c41ae83f2 Revert "AsmPrinter: Change DIEValue to be stored by value"
This reverts commit r238349, since it caused some errors on bots:
  - std::is_trivially_copyable isn't available until GCC 5.0.
  - It was complaining about strict aliasing with my use of
    ArrayCharUnion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238350 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-27 19:30:27 +00:00
Duncan P. N. Exon Smith
b9d92c6a8d AsmPrinter: Change DIEValue to be stored by value
Change `DIEValue` to be stored/passed/etc. by value, instead of
reference.  It's now a discriminated union, with a `Val` field storing
the actual type.  The classes that used to inherit from `DIEValue` no
longer do.  There are two categories of these:

  - Small values fit in a single pointer and are stored by value.
  - Large values require auxiliary storage, and are stored by reference.

The only non-mechanical change is to tools/dsymutil/DwarfLinker.cpp.  It
was relying on `DIEInteger`s being passed around by reference, so I
replaced that assumption with a `PatchLocation` type that stores a safe
reference to where the `DIEInteger` lives instead.

This commit causes a temporary regression in memory usage, since I've
left merging `DIEAbbrevData` into `DIEValue` for a follow-up commit.  I
measured an increase from 845 MB to 879 MB, around 3.9%.  The follow-up
drops it lower than the starting point, and I've only recently brought
the memory this low anyway, so I'm committing these changes separately
to keep them incremental.  (I also considered swapping the commits, but
the other one first would cause a lot more code churn.)

(I'm looking at `llc` memory usage on `verify-uselistorder.lto.opt.bc`;
see r236629 for details.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238349 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-27 19:22:50 +00:00
Alex Lorenz
61aecc8c23 Resubmit r237954 (MIR Serialization: print and parse LLVM IR using MIR format).
This commit a 3rd attempt at comitting the initial MIR serialization patch.
The first commit (r237708) was reverted in 237730. Then the second commit
(r237954) was reverted in r238007, as the MIR library under CodeGen caused
a circular dependency where the CodeGen library depended on MIR and MIR
library depended on CodeGen.

This commit has fixed the dependencies between CodeGen and MIR by
reorganizing the MIR serialization code - the code that prints out
MIR has been moved to CodeGen, and the MIR library has been renamed
to MIRParser. Now the CodeGen library doesn't depend on the
MIRParser library, thus the circular dependency no longer exists.

--Original Commit Message--

MIR Serialization: print and parse LLVM IR using MIR format.

This commit is the initial commit for the MIR serialization project.
It creates a new library under CodeGen called 'MIR'. This new
library adds a new machine function pass that prints out the LLVM IR
using the MIR format. This pass is then added as a last pass when a
'stop-after' option is used in llc. The new library adds the initial
functionality for parsing of MIR files as well. This commit also
extends the llc tool so that it can recognize and parse MIR input files.

Reviewers: Duncan P. N. Exon Smith, Matthias Braun, Philip Reames

Differential Revision: http://reviews.llvm.org/D9616 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238341 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-27 18:02:19 +00:00
Jan Vesely
72be0e4224 SelectionDAG: Don't do libcall on div/rem if divrem is custom
v2: TargetLoweringBase:: -> TargetLowering::
    Use Ops array
v3: Explicitly use value 0 for ?DIV
    Remove redundant newline

Differential revision: http://reviews.llvm.org/D7803
reviewer: ab

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238336 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-27 16:54:09 +00:00
Rafael Espindola
eac1f66427 Use operator<< instead of print in a few more places.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238315 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-27 13:05:42 +00:00
Quentin Colombet
bdfc11784b [ShrinkWrap] Add a target hook to check whether or not
the target can handle a given basic block as prologue
or epilogue.

Related to <rdar://problem/20821487>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238292 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-27 06:25:48 +00:00
Matthias Braun
f5b4273058 MachineBasicBlock: Cleanup computeRegisterLiveness()
- Clean documentation comment
- Change the API to accept an iterator so you can actually pass
  MachineBasicBlock::end() now.
- Add more "const".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238288 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-27 05:12:39 +00:00
Akira Hatanaka
6f49135066 Remove NoFramePointerElim and NoFramePointerElimOverride from TargetOptions and
remove ExecutionEngine's dependence on CodeGen. NFC.

This is a follow-up to r238080.

Differential Revision: http://reviews.llvm.org/D9830


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238244 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-26 20:17:20 +00:00
Adrian Prantl
2cc3e0a5ec Use "auto &" in range-based for-loop and remove the extra braces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238243 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-26 20:06:51 +00:00
Adrian Prantl
74f44b6c69 Fix a use-after-free in a DEBUG output.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238242 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-26 20:06:48 +00:00
Matt Arsenault
a0dd2b4df8 CodeGenPrepare: Don't match addressing modes through addrspacecast
This was resulting in the addrspacecast being removed and incorrectly
replaced with a ptrtoint when sinking.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238217 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-26 16:59:43 +00:00
Elena Demikhovsky
17b7d6bf25 Added promotion to EXTRACT_SUBVECTOR operand.
I encountered with this case in one of KNL tests for i1 vectors.
v16i1 = EXTRACT_SUBVECTOR v32i1, x



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238130 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-25 11:33:13 +00:00
NAKAMURA Takumi
4d3b6d43cc Reformat.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238126 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-25 01:43:34 +00:00
NAKAMURA Takumi
f61fb0c9a7 Prune CRLFs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238125 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-25 01:43:23 +00:00
Duncan P. N. Exon Smith
518dcb905e AsmPrinter: Avoid creating symbols in DwarfStringPool
Stop creating symbols we don't need in `DwarfStringPool`.  The consumers
only call `DwarfStringPoolEntryRef::getSymbol()` when DWARF is
relocatable, so this just stops creating the unused symbols when it's
not.  This drops memory usage from 851 MB to 845 MB, around 0.7%.

(I'm looking at `llc` memory usage on `verify-uselistorder.lto.opt.bc`;
see r236629 for details.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238122 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-24 16:58:59 +00:00
Duncan P. N. Exon Smith
b976cabda3 AsmPrinter: Prune an include, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238121 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-24 16:54:59 +00:00
Duncan P. N. Exon Smith
6c44d1fc4e AsmPrinter: Remove dead code, NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238120 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-24 16:51:29 +00:00
Duncan P. N. Exon Smith
9ec6380779 AsmPrinter: Avoid EmitLabelDifference() in DwarfAccelTable
Mint a new function, `AsmPrinter::emitDwarfStringOffset()`, which takes
a `DwarfStringPoolEntryRef`.  When DWARF is relocatable across sections,
this defers to `emitSectionOffset()` and emits the `MCSymbol`;
otherwise, just emit the offset directly, without using any intermediate
symbols.

`EmitLabelDifference()` is already optimized to emit absolute label
differences cheaply when possible, so there aren't any major memory
savings here (853 MB down to 851 MB, or 0.2%).  However, it prepares for
making the `MCSymbol`s in the `DwarfStringPool` optional.

(I'm looking at `llc` memory usage on `verify-uselistorder.lto.opt.bc`;
see r236629 for details.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238119 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-24 16:48:54 +00:00
Duncan P. N. Exon Smith
3755781deb AsmPrinter: Use DwarfStringPoolEntry in DwarfAccelTable, NFC
This is just an API change, but it prepares to stop using
`EmitLabelDifference()` when possible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238118 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-24 16:44:32 +00:00
Duncan P. N. Exon Smith
24ad5c9e05 AsmPrinter: Make DIEString small
Expose the `DwarfStringPool` entry in a header, and store a pointer to
it directly in `DIEString`.  Instead of choosing at creation time how to
emit it, use the `dwarf::Form` to determine that at emission time.
Besides avoiding the other `DIEValue`, this shaves two pointers off of
`DIEString`; the data is now a single pointer.  This is a nice cleanup
on its own -- and drops memory usage from 861 MB down to 853 MB, around
0.9% -- but it's also preparation for passing `DIEValue`s by value.

(I'm looking at `llc` memory usage on `verify-uselistorder.lto.opt.bc`;
see r236629 for details.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238117 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-24 16:40:47 +00:00
Duncan P. N. Exon Smith
1717728066 AsmPrinter: Extract DwarfStringPoolEntry from DwarfStringPool, NFC
Extract out `DwarfStringPoolEntry` and `DwarfStringPoolRef` from
`DwarfStringPool` so that downstream users can start using
`DwarfStringPool::getEntry()` directly.  This will allow users to delay
the decision between emitting a symbol or an offset until later.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238116 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-24 16:33:33 +00:00
Duncan P. N. Exon Smith
e3ae958f94 AsmPrinter: Emit the DwarfStringPool offset directly when possible
Change `DwarfStringPool` to calculate byte offsets on-the-fly, and
update `DwarfUnit::getLocalString()` to use a `DIEInteger` instead of a
`DIEDelta` when Dwarf doesn't use relocations (i.e., Mach-O).  This
eliminates another call to `EmitLabelDifference()`, and drops memory
usage from 865 MB down to 861 MB, around 0.5%.

(I'm looking at `llc` memory usage on `verify-uselistorder.lto.opt.bc`;
see r236629 for details.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238114 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-24 16:14:59 +00:00
Duncan P. N. Exon Smith
8d2d4e2637 AsmPrinter: Refactor DwarfStringPool::getEntry(), NFC
Move `DwarfStringPool`'s `getEntry()` to the header (and make it a
member function) in preparation for calculating symbol offsets
on-the-fly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238112 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-24 16:06:08 +00:00
Matt Arsenault
f44ed0919c Add target hook to allow merging stores of nonzero constants
On GPU targets, materializing constants is cheap and stores are
expensive, so only doing this for zero vectors was silly.

Most of the new testcases aren't optimally merged, and are for
later improvements.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238108 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-24 00:51:27 +00:00
Aaron Ballman
a5d0a48209 Silencing a spurious -Wreturn-type warning; NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238099 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-23 14:46:49 +00:00
Duncan P. N. Exon Smith
b5f8c9b2ec AsmPrinter: Remove the vtable-entry from DIEValue
Remove all virtual functions from `DIEValue`, dropping the vtable
pointer from its layout.  Instead, create "impl" functions on the
subclasses, and use the `DIEValue::Type` to implement the dynamic
dispatch.

This is necessary -- obviously not sufficient -- for passing `DIEValue`s
around by value.  However, this change stands on its own: we make tons
of these.  I measured a drop in memory usage from 888 MB down to 860 MB,
or around 3.2%.

(I'm looking at `llc` memory usage on `verify-uselistorder.lto.opt.bc`;
see r236629 for details.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238084 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-23 01:45:07 +00:00
Duncan P. N. Exon Smith
804c199b75 CodeGen: Remove redundant DIETypeSignature::dump(), NFC
We already have this in `DIEValue`; no reason to shadow it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238082 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-23 01:26:26 +00:00
Akira Hatanaka
01461204b3 Stop resetting NoFramePointerElim in TargetMachine::resetTargetOptions.
This is part of the work to remove TargetMachine::resetTargetOptions.

In this patch, instead of updating global variable NoFramePointerElim in
resetTargetOptions, its use in DisableFramePointerElim is replaced with a call
to TargetFrameLowering::noFramePointerElim. This function determines on a
per-function basis if frame pointer elimination should be disabled.

There is no change in functionality except that cl:opt option "disable-fp-elim"
can now override function attribute "no-frame-pointer-elim". 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238080 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-23 01:14:08 +00:00
Akira Hatanaka
c17da7166d Simplify and rename function overrideFunctionAttributes. NFC.
This is in preparation to making changes needed to stop resetting
NoFramePointerElim in resetTargetOptions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238079 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-23 01:12:26 +00:00
Ahmed Bougacha
d8319655f2 [AArch64][CGP] Sink zext feeding stxr/stlxr into the same block.
The usual CodeGenPrepare trickery, on a target-specific intrinsic.
Without this, the expansion of atomics will usually have the zext
be hoisted out of the loop, defeating the various patterns we have
to catch this precise case.

Differential Revision: http://reviews.llvm.org/D9930


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238054 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-22 21:37:17 +00:00
Puyan Lotfi
d9a08b08ac Compile time improvements to VirtRegRewriter.
This change to VirtRegRewriter::addMBBLiveIns adds live-in registers for each
MachineBasicBlock's LiveIns set without isLiveIn checks as they are being added
because doing so is expensive. After all live-in registers are added, the LiveIn
vectors are sorted and uniqued.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238008 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-22 08:11:26 +00:00
NAKAMURA Takumi
b6b98c12d5 Revert r237954, "Resubmit r237708 (MIR Serialization: print and parse LLVM IR using MIR format)."
It brought cyclic dependencies between LLVMCodeGen and LLVMMIR.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238007 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-22 07:17:07 +00:00
Duncan P. N. Exon Smith
ec8c491a06 SDAG: Give SDDbgValues their own allocator (and reset it)
Previously `SDDbgValue`s used the general allocator that lives for all
of `SelectionDAG`.  Instead, give them their own allocator, and reset it
whenever `SDDbgInfo::clear()` is called, plugging a spiritual leak.

This drops `SelectionDAGBuilder::visitIntrinsicCall()` off of my heap
profile (was at around 2% of `llc` for codegen of `-flto -g`).  Thanks
to Pete Cooper for spotting the problem and suggesting the fix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237998 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-22 05:45:19 +00:00
Duncan P. N. Exon Smith
73993abb6c SDAG: Cleanup initialization of SDDbgValue, NFC
Cleanup how `SDDbgValue` is initialized, and rearrange the fields to
save two pointers in the struct layout.  No real functionality change
though (and I doubt the memory savings would show up in a profile).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237997 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-22 05:35:53 +00:00
Quentin Colombet
3ad083f2cb [InlineSpiller] Fix rematerialization for bundles.
Prior to this patch, we could update the operand of another MI in the same
bundle.

Longer version:
Before InlineSpiller rematerializes a vreg, it iterates over operands of each MI
in a bundle, collecting all (MI, OpNo) pairs that reference that vreg.

Then if it does rematerialize, it goes through the pair list and replaces the
operands with the new (rematerialized) vreg.  The problem is, it tries to
replace all of these operands in the main MI ! This works fine for single MIs.
However, if we are processing a bundle of MIs and the list contains multiple
pairs - the rematerialization will either crash trying to access a non-existing
operand of the main MI, or silently corrupt one of the existing ones. It will
also ignore other MIs in the bundle.

The obvious fix is to use the MI pointers saved in collected (MI, OpNo) pairs.
This must have been the original intent of the pair list but somehow these
pointers got lost.

Patch by Dmitri Shtilman <dshtilman@icloud.com>!

Differential revision: http://reviews.llvm.org/D9904

<rdar://problem/21002163>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237964 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-21 21:41:55 +00:00
Sanjay Patel
a33f5160eb fix typo in comment; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237962 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-21 21:29:13 +00:00
Alex Lorenz
3e5034d130 Resubmit r237708 (MIR Serialization: print and parse LLVM IR using MIR format).
This commit is a 2nd attempt at committing the initial MIR serialization patch.
The first commit (r237708) made the incremental buildbots unstable and was 
reverted in r237730. The original commit didn't add a terminating null 
character to the LLVM IR source which was passed to LLParser, and this 
sometimes caused the test 'llvmIR.mir' to fail with a parsing error because 
the LLVM IR source didn't have a null character immediately after the end 
and thus LLLexer encountered some garbage characters that ultimately caused 
the error.

This commit also includes the other test fixes I committed in
r237712 (llc path fix) and r237723 (remove target triple) which
also got reverted in r237730.

--Original Commit Message--

MIR Serialization: print and parse LLVM IR using MIR format.

This commit is the initial commit for the MIR serialization project.
It creates a new library under CodeGen called 'MIR'. This new
library adds a new machine function pass that prints out the LLVM IR 
using the MIR format. This pass is then added as a last pass when a 
'stop-after' option is used in llc. The new library adds the initial 
functionality for parsing of MIR files as well. This commit also 
extends the llc tool so that it can recognize and parse MIR input files.

Reviewers: Duncan P. N. Exon Smith, Matthias Braun, Philip Reames

Differential Revision: http://reviews.llvm.org/D9616


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237954 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-21 20:54:45 +00:00
Rafael Espindola
7521964d28 Move alignment from MCSectionData to MCSection.
This starts merging MCSection and MCSectionData.

There are a few issues with the current split between MCSection and
MCSectionData.

* It optimizes the the not as important case. We want the production
of .o files to be really fast, but the split puts the information used
for .o emission in a separate data structure.

* The ELF/COFF/MachO hierarchy is not represented in MCSectionData,
leading to some ad-hoc ways to represent the various flags.

* It makes it harder to remember where each item is.

The attached patch starts merging the two by moving the alignment from
MCSectionData to MCSection.

Most of the patch is actually just dropping 'const', since
MCSectionData is mutable, but MCSection was not.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237936 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-21 19:20:38 +00:00
Sanjay Patel
430cdabf46 use range-based for-loops; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237918 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-21 17:43:26 +00:00
Sanjay Patel
090f1dedf0 use range-based for-loops; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237917 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-21 17:22:45 +00:00
Sanjay Patel
7d83b1223c use range-based for-loop
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237914 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-21 17:04:17 +00:00
Sanjay Patel
57f70578fa use range-based for-loop; NFCI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237908 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-21 16:00:50 +00:00
Manuel Klimek
2267264ceb std::sort must be called with a strict weak ordering.
Found by a debug enabled stl.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237906 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-21 15:38:25 +00:00
Simon Pilgrim
87d1836793 [X86][SSE] Improve support for 128-bit vector sign extension
This patch improves support for sign extension of the lower lanes of vectors of integers by making use of the SSE41 pmovsx* sign extension instructions where possible, and optimizing the sign extension by shifts on pre-SSE41 targets (avoiding the use of i64 arithmetic shifts which require scalarization).

It converts SIGN_EXTEND nodes to SIGN_EXTEND_VECTOR_INREG where necessary, that more closely matches the pmovsx* instruction than the default approach of using SIGN_EXTEND_INREG which splits the operation (into an ANY_EXTEND lowered to a shuffle followed by shifts) making instruction matching difficult during lowering. Necessary support for SIGN_EXTEND_VECTOR_INREG has been added to the DAGCombiner.

Differential Revision: http://reviews.llvm.org/D9848

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237885 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-21 10:05:03 +00:00
Duncan P. N. Exon Smith
583dac827c AsmPrinter: Compute absolute label difference directly
Create a low-overhead path for `EmitLabelDifference()` that emits a
emits an absolute number when (1) the output is an object stream and (2)
the two symbols are in the same data fragment.

This drops memory usage on Mach-O from 975 MB down to 919 MB (5.8%).
The only call is when `!doesDwarfUseRelocationsAcrossSections()` --
i.e., on Mach-O -- since otherwise an absolute offset from the start of
the section needs a relocation.  (`EmitLabelDifference()` is cheaper on
ELF anyway, since it creates 1 fewer temp symbol, and it gets called far
less often.  It's not clear to me if this is even a bottleneck there.)

(I'm looking at `llc` memory usage on `verify-uselistorder.lto.opt.bc`;
see r236629 for details.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237876 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-21 02:41:23 +00:00
Andrew Kaylor
f12338a6b7 Fix build error
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237859 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-20 23:58:44 +00:00
Andrew Kaylor
008a1efecf Fix build warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237855 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-20 23:28:03 +00:00
Andrew Kaylor
d0f4ffa472 [WinEH] C++ EH state numbering fixes
Differential Revision: http://reviews.llvm.org/D9787



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237854 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-20 23:22:24 +00:00
Pete Cooper
05b0f7dc93 Don't generate comments in the DebugLocStream unless required. NFC.
The ByteStreamer here wasn't taking account of whether the asm streamer was text based and verbose.  Only with that combination should we emit comments.

This change makes sure that we only actually convert a Twine to a string using Twine::str() if we need the comment.  This saves about 10000 small allocations on a test case involving the verify-use_list-order bitcode going through llc with debug info.

Note, this is NFC as the comments would ultimately never be emitted unless required.

Reviewed by Duncan Exon Smith and David Blaikie.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237851 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-20 22:51:27 +00:00
Pete Cooper
d4483d4512 Revert "Add bool to DebugLocDwarfExpression to control emitting comments."
This reverts commit 0037b6bcbc874aa1b93d7ce3ad8dba3753ee2d9d (r237827).

David Blaikie suggested some alternatives to this which are better.  Reverting to apply a better solution later.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237849 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-20 22:37:48 +00:00
Pete Cooper
c212d49d75 Add bool to DebugLocDwarfExpression to control emitting comments.
DebugLocDwarfExpression::EmitOp was creating temporary strings by concatenating Twine's.

When emitting to object files, these comments are thrown away.

This commit adds a boolean to the constructor of the DwarfExpression to control whether it will actually emit
any comments.  This prevents it from even generating the temporary comments which would have been thrown away anyway.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237827 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-20 19:50:03 +00:00
Matthias Braun
fa3d0dc026 DAGCombiner: Continue combining if FoldConstantArithmetic() fails.
DAG.FoldConstantArithmetic() can fail even though both operands are
Constants if OpaqueConstants are involved. Continue trying other combine
possibilities in tis case.

Differential Revision: http://reviews.llvm.org/D6946

Somewhat related to PR21801 / rdar://19211454

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237822 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-20 18:54:02 +00:00
Pawel Bylica
12f6308247 Fix icmp lowering
Summary:
During icmp lowering it can happen that a constant value can be larger than expected (see the code around the change).
APInt::getMinSignedBits() must be checked again as the shift before can change the constant sign to positive.
I'm not sure it is the best fix possible though.

Test Plan: Regression test included.

Reviewers: resistor, chandlerc, spatel, hfinkel

Reviewed By: hfinkel

Subscribers: hfinkel, llvm-commits

Differential Revision: http://reviews.llvm.org/D9147

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237812 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-20 17:21:09 +00:00
Pete Cooper
9584e07a9c Change Function::getIntrinsicID() to return an Intrinsic::ID. NFC.
Now that Intrinsic::ID is a typed enum, we can forward declare it and so return it from this method.

This updates all users which were either using an unsigned to store it, or had a now unnecessary cast.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237810 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-20 17:16:39 +00:00
Daniel Sanders
a77462187f Revert r237789 - [mips] The naming convention for private labels is ABI dependant.
It works, but I've noticed that I missed several callers of createMCAsmInfo()
and many don't have a TargetMachine to provide.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237792 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-20 14:18:59 +00:00
Daniel Sanders
e1207bb8a2 [mips] The naming convention for private labels is ABI dependant.
Summary:
For N32/N64, private labels begin with '.L' but for O32 they begin with '$'.

MCAsmInfo now has an initializer function which can be used to provide information from the TargetMachine to control the assembly syntax.

Reviewers: vkalintiris

Reviewed By: vkalintiris

Subscribers: jfb, sandeep, llvm-commits, rafael

Differential Revision: http://reviews.llvm.org/D9821

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237789 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-20 13:16:42 +00:00
Igor Laevsky
efab5a1dfa [StatepointLowering] Support of the gc.relocates for invoke statepoints.
This change implements support for lowering of the gc.relocates tied to the invoke statepoint.
This is acomplished by storing frame indices of the lowered values in "StatepointRelocatedValues" map inside FunctionLoweringInfo instead of storing them in per-basic block structure StatepointLowering.
After this change StatepointLowering is used only during "LowerStatepoint" call and it is not necessary to store it as a field in SelectionDAGBuilder anymore.

Differential Revision: http://reviews.llvm.org/D7798


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237786 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-20 11:37:25 +00:00
Swaroop Sridhar
95d08bce87 Add a GCStrategy for CoreCLR
This change adds a new GC strategy for supporting the CoreCLR runtime.

This strategy is currently identical to Statepoint-example GC, 
but is necessary for several upcoming changes specific to CoreCLR, such as:

1. Base-pointers not explicitly reported for interior pointers
2. Different format for stack-map encoding
3. Location of Safe-point polls: polls are only needed before loop-back edges and before tail-calls (not needed at function-entry)
4. Runtime specific handshake between calls to managed/unmanaged functions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237753 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-20 01:07:23 +00:00
Philip Reames
486f97bf19 Remove a stale comment
The todo was implemented a while ago; I just forgot to remove the comment.  



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237736 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-19 22:26:33 +00:00
Alex Lorenz
e5a723675b Revert r237708 (MIR serialization) - incremental buildbots became unstable.
The incremental buildbots entered a pass-fail cycle where during the fail
cycle one of the tests from this commit fails for an unknown reason. I
have reverted this commit and will investigate the cause of this problem.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237730 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-19 21:41:28 +00:00
Matthias Braun
dfc41dbcda MachineInstr: Remove unused parameter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237726 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-19 21:22:20 +00:00
Sanjay Patel
041ab65fcd use 'auto *' for pointers; clearer usage, no deep copying
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237719 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-19 20:10:16 +00:00
Sanjay Patel
0f9fcd22b3 tidy up
1. remove duplicate local variable
2. add local variable with name to match comment
3. remove useless comment



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237715 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-19 19:10:57 +00:00
Sanjay Patel
f75a247286 use range-based for-loop
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237711 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-19 18:24:33 +00:00
Alex Lorenz
328f462f3c MIR Serialization: print and parse LLVM IR using MIR format.
This commit is the initial commit for the MIR serialization project.
It creates a new library under CodeGen called 'MIR'. This new
library adds a new machine function pass that prints out the LLVM IR 
using the MIR format. This pass is then added as a last pass when a 
'stop-after' option is used in llc. The new library adds the initial 
functionality for parsing of MIR files as well. This commit also 
extends the llc tool so that it can recognize and parse MIR input files.

Reviewers: Duncan P. N. Exon Smith, Matthias Braun, Philip Reames

Differential Revision: http://reviews.llvm.org/D9616


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237708 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-19 18:17:39 +00:00
Matthias Braun
f7ad33bd8a RegisterCoalescer: Improve a comment.
Explain the relation of the example to the variables in the code,
explain what bad behaviour the code avoids in this case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237706 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-19 17:52:32 +00:00
Sanjay Patel
038aeda7cf use range-based for loop
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237705 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-19 17:49:14 +00:00
Matthias Braun
42cff157db SelectionDAG: Cleanup and simplify FoldConstantArithmetic
This cleans up the FoldConstantArithmetic code by factoring out the case
of two ConstantSDNodes into an own function. This avoids unnecessary
complexity for many callers who already have ConstantSDNode arguments.

This also avoids an intermeidate SmallVector datastructure and a loop
over that datastructure.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237651 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-19 01:40:21 +00:00
Matthias Braun
09f87b4a7b DAGCombiner: Factor common pattern into isOneConstant() function. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237645 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-19 00:25:21 +00:00
Matthias Braun
91088c696d DAGCombiner: Factor common pattern into isAllOnesConstant() function. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237644 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-19 00:25:20 +00:00
Matthias Braun
a6698bb5d4 DAGCombiner: Use isNullConstant() where possible
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237643 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-19 00:25:17 +00:00
Matthias Braun
42d8237570 Revert accidental change in r237633
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237635 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-18 23:18:13 +00:00
Matthias Braun
4f5829ac4d DAGCombiner: Factor common pattern into isNullConstant() function. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237633 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-18 23:07:27 +00:00
David Blaikie
042dd34f9c Simplify IRBuilder::CreateCall* by using ArrayRef+initializer_list/braced init only
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237624 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-18 22:13:54 +00:00
Matthias Braun
e4603f0daf MachineInstr: Change return value of getOpcode() to unsigned.
This was previously returning int. However there are no negative opcode
numbers and more importantly this was needlessly different from
MCInstrDesc::getOpcode() (which even is the value returned here) and
SDValue::getOpcode()/SDNode::getOpcode().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237611 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-18 20:27:55 +00:00
Jim Grosbach
19696daa21 MC: Clean up method names in MCContext.
The naming was a mish-mash of old and new style. Update to be consistent
with the new. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237594 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-18 18:43:14 +00:00
Hal Finkel
292c78ba68 Preserve the order of READ_REGISTER and WRITE_REGISTER
At the present time, we don't have a way to represent general dependency
relationships, so everything is represented using memory dependency. In order
to preserve the data dependency of a READ_REGISTER on WRITE_REGISTER, we need
to model WRITE_REGISTER as writing (which we had been doing) and model
READ_REGISTER as reading (which we had not been doing). Fix this, and also the
way that the chain operands were generated at the SDAG level.

Patch by Nicholas Paul Johnson, thanks! Test case by me.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237584 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-18 16:42:10 +00:00
Oliver Stannard
0139af335f Revert r237579, as it broke windows buildbots
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237583 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-18 16:39:16 +00:00
Oliver Stannard
d811b4bacb [LLVM - ARM/AArch64] Add ACLE special register intrinsics
This patch implements LLVM support for the ACLE special register intrinsics in
section 10.1, __arm_{w,r}sr{,p,64}.

This patch is intended to lower the read/write_register instrinsics, used to
implement the special register intrinsics in the clang patch for special
register intrinsics (see http://reviews.llvm.org/D9697), to ARM specific
instructions MRC,MCR,MSR etc. to allow reading an writing of coprocessor
registers in AArch32 and AArch64. This is done by inspecting the register
string passed to the intrinsic and then lowering to the appropriate
instruction.

Patch by Luke Cheeseman.

Differential Revision: http://reviews.llvm.org/D9699



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237579 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-18 16:23:33 +00:00
Hal Finkel
b6f6eee8fd [DAGCombine] Be more pedantic about use iteration in CombineToPreIndexedLoadStore
In CombineToPreIndexedLoadStore, when the offset is a constant, we have code
that looks for other uses of the pointer which are constant offset computations
so that they can be rewritten in terms of the updated pointer so that we don't
need to keep a copy of the base pointer to compute these constant offsets.

Unfortunately, when it iterated over the uses, it did so by SDNodes, and so we
could confuse ourselves if the base pointer was produced by a node that had
multiple results (because we would not immediately exclude uses of the other
node results). This was reported as PR22755. Unfortunately, we don't have a
test case (and I've also been unable to produce one thus far), but at least the
mistake is clear. The right way to fix this problem is to make use of the information
contained in the use iterators to filter out any uses of other results of the
node producing the base pointer.

This should be mostly NFC, but should also fix PR22755 (for which,
unfortunately, we have no in-tree test case).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237576 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-18 15:46:02 +00:00
Andrew Trick
01c0018953 MachineScheduler debug output clarity.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237545 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-17 23:40:31 +00:00
Andrew Trick
eddedaab45 RegisterPressureTracker: reword stale comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237544 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-17 23:40:27 +00:00
Benjamin Kramer
11ba91f321 [WinEH] Push unique_ptr through the Action interface.
This was the source of many leaks in the past, this should fix them once and
for all.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237524 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-16 15:40:03 +00:00
Craig Topper
819ce3c51d Correct indentation. NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237512 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-16 05:42:08 +00:00
Matthias Braun
3ac70da982 MachineSink: Collect registers before clearing their killflags.
Currently whenever we sink any instruction, we do clearKillFlags for
every use of every use operand for that instruction, apparently there
are a lot of duplication, therefore compile time penalties.

This patch collect all the interested registers first, do clearKillFlags
for it all together at once at the end, so we only need to do
clearKillFlags once for one register, duplication is avoided.

Patch by Lawrence Hu!

Differential Revision: http://reviews.llvm.org/D9719

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237510 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-16 03:11:07 +00:00
James Molloy
7363a8bcdd [SDAGBuilder] Make the AArch64 builder happier.
I intended this loop to only unwrap SplitVector actions, but it
was more broad than that, such as unwrapping WidenVector actions,
which makes operations seem legal when they're not.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237457 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-15 17:41:29 +00:00
James Molloy
4fa71b66a8 Add SDNodes for umin, umax, smin and smax.
This adds new SDNodes for signed/unsigned min/max. These nodes are built from
select/icmp pairs matched at SDAGBuilder stage.

This patch adds the nodes, as well as legalization support and sets them to
be "expand" for all targets.

NFC for now; this will be tested when I switch AArch64 to using these new
nodes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237423 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-15 09:03:15 +00:00
Akira Hatanaka
634e01a3e5 Stop resetting SanitizeAddress in TargetMachine::resetTargetOptions. NFC.
Instead of doing that, create a temporary copy of MCTargetOptions and reset its
SanitizeAddress field based on the function's attribute every time an InlineAsm
instruction is emitted in AsmPrinter::EmitInlineAsm. 

This is part of the work to remove TargetMachine::resetTargetOptions (the FIXME
added to TargetMachine.cpp in r236009 explains why this function has to be
removed).

Differential Revision: http://reviews.llvm.org/D9570


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2015-05-15 00:20:44 +00:00
Matthias Braun
49d3196418 Turn effective assert(0) into llvm_unreachable
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237379 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-14 18:33:29 +00:00
Matthias Braun
be4ab8dafe TargetSchedule: factor out common code; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237376 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-14 18:01:13 +00:00
Matthias Braun
e9c8191eeb Remove MCInstrItineraries includes in parts that don't use them anymore
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237375 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-14 18:01:11 +00:00
Ahmed Bougacha
d8b3f0d785 [CodeGen] Use standard -not gnueabi- naming for f16 libcalls on Darwin.
Other targets probably should as well.  Since r237161, compiler-rt has
both, but I don't see why anything other than gnueabi would use a
gnueabi naming scheme.


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2015-05-14 01:00:51 +00:00
Nick Lewycky
172e8df4af Revert r237046. See the testcase on the thread where r237046 was committed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237317 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-13 23:41:47 +00:00
Sergey Dmitrouk
6eb9a62fe0 [DebugInfo] Debug locations for constant SD nodes
Several updates for [DebugInfo] Add debug locations to constant SD nodes (r235989).
Includes:

 *  re-enabling the change (disabled recently);
 *  missing change for FP constants;
 *  resetting debug location of constant node if it's used more than at one place
    to prevent emission of wrong locations in case of coalesced constants;
 *  a couple of additional tests.

Now all look ups in CSEMap are wrapped by additional method.

Comment in D9084 suggests that debug locations aren't useful for "target constants",
so there might be one more change related to this API (namely, dropping debug
locations for getTarget*Constant methods).

Differential Revision: http://reviews.llvm.org/D9604

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2015-05-13 08:58:03 +00:00
Sanjoy Das
ead2d1fbe0 [Statepoints] Support for "patchable" statepoints.
Summary:
This change adds two new parameters to the statepoint intrinsic, `i64 id`
and `i32 num_patch_bytes`.  `id` gets propagated to the ID field
in the generated StackMap section.  If the `num_patch_bytes` is
non-zero then the statepoint is lowered to `num_patch_bytes` bytes of
nops instead of a call (the spill and reload code remains unchanged).
A non-zero `num_patch_bytes` is useful in situations where a language
runtime requires complete control over how a call is lowered.

This change brings statepoints one step closer to patchpoints.  With
some additional work (that is not part of this patch) it should be
possible to get rid of `TargetOpcode::STATEPOINT` altogether.

PlaceSafepoints generates `statepoint` wrappers with `id` set to
`0xABCDEF00` (the old default value for the ID reported in the stackmap)
and `num_patch_bytes` set to `0`.  This can be made more sophisticated
later.

Reviewers: reames, pgavlin, swaroop.sridhar, AndyAyers

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9546

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237214 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-12 23:52:24 +00:00
Saleem Abdulrasool
82550fed5c CodeGen: ignore DEBUG_VALUE nodes in KILL tagging
DEBUG_VALUE nodes do not take part in code generation.  Ignore them when
performing KILL updates.  Addresses PR23486.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237211 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-12 23:36:18 +00:00
Pat Gavlin
11fb9642dc [Statepoints] Clean up statepoint argument accessors.
Differential Revision: http://reviews.llvm.org/D9622

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2015-05-12 21:33:48 +00:00
Pete Cooper
f23c6af13d Convert PHI getIncomingValue() to foreach over incoming_values(). NFC.
We already had a method to iterate over all the incoming values of a PHI.  This just changes all eligible code to use it.

Ineligible code included anything which cared about the index, or was also trying to get the i'th incoming BB.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237169 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-12 20:05:31 +00:00
Pat Gavlin
81b3ceba60 [Statepoints] Split the calling convention and statepoint flags operand to STATEPOINT into two separate operands.
Differential Revision: http://reviews.llvm.org/D9623

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2015-05-12 19:50:19 +00:00
Igor Laevsky
00666a17ff Reverse ordering of base and derived pointer during safepoint lowering.
According to the documentation in StackMap section for the safepoint we should have:
"The first Location in each pair describes the base pointer for the object. The second is the derived pointer actually being relocated."
But before this change we emitted them in reverse order - derived pointer first, base pointer second.



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2015-05-12 13:12:14 +00:00
Eric Christopher
0552d51c45 Migrate existing backends that care about software floating point
to use the information in the module rather than TargetOptions.

We've had and clang has used the use-soft-float attribute for some
time now so have the backends set a subtarget feature based on
a particular function now that subtargets are created based on
functions and function attributes.

For the one middle end soft float check go ahead and create
an overloadable TargetLowering::useSoftFloat function that
just checks the TargetSubtargetInfo in all cases.

Also remove the command line option that hard codes whether or
not soft-float is set by using the attribute for all of the
target specific test cases - for the generic just go ahead and
add the attribute in the one case that showed up.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237079 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-12 01:26:05 +00:00
Andrew Kaylor
d1074b0e7f Fixing memory leak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237072 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-12 00:13:51 +00:00
Sanjoy Das
23ac4f1856 Refactoring gc_relocate related code in CodeGenPrepare.cpp
Summary:
The original code inserted new instructions by following a
Create->Remove->ReInsert flow. This patch removes the unnecessary
Remove->ReInsert part by setting up the InsertPoint correctly at the
very beginning. This change does not introduce any functionality change.

Patch by Chen Li!

Reviewers: reames, AndyAyers, sanjoy

Reviewed By: sanjoy

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9687

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237070 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-11 23:47:30 +00:00
Andrew Kaylor
e04fe6c135 [WinEH] Handle nested landing pads that return directly to the parent function.
Differential Revision: http://reviews.llvm.org/D9684



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2015-05-11 23:06:02 +00:00
Sanjay Patel
f6548b86b6 propagate IR-level fast-math-flags to DAG nodes; 2nd try; NFC
This is a less ambitious version of:
http://reviews.llvm.org/rL236546

because that was reverted in:
http://reviews.llvm.org/rL236600

because it caused memory corruption that wasn't related to FMF
but was actually due to making nodes with 2 operands derive from a
plain SDNode rather than a BinarySDNode. 

This patch adds the minimum plumbing necessary to use IR-level
fast-math-flags (FMF) in the backend without actually using
them for anything yet. This is a follow-on to:
http://reviews.llvm.org/rL235997

...which split the existing nsw / nuw / exact flags and FMF
into their own struct.
 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237046 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-11 21:07:09 +00:00