general idea here is to have a group of x86 target specific nodes which are
going to be selected during lowering and then directly matched in isel.
The commit includes the addition of those specific nodes and a *bunch* of
patterns, and incrementally we're going to switch between them and what we
have right now. Both the patterns and target specific nodes can change as
we move forward with this work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111691 91177308-0d34-0410-b5e6-96231b3b80d8
extending vector load should extend each element in the same way as the
corresponding scalar extending load.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111577 91177308-0d34-0410-b5e6-96231b3b80d8
into a separate header to allow clients to use them without pulling in
SelectionDAG-specific declarations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101268 91177308-0d34-0410-b5e6-96231b3b80d8
