Colin LeMahieu
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cf2daa3671
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[Hexagon] Adding combine reg, reg with predicated forms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223667 91177308-0d34-0410-b5e6-96231b3b80d8
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2014-12-08 17:33:06 +00:00 |
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Colin LeMahieu
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5c7adadf6d
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[Hexagon] Adding packhl instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223664 91177308-0d34-0410-b5e6-96231b3b80d8
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2014-12-08 17:01:18 +00:00 |
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Colin LeMahieu
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ec51bc6f3a
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[Hexagon] Adding sub/and/or reg, imm forms
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223522 91177308-0d34-0410-b5e6-96231b3b80d8
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2014-12-05 21:38:29 +00:00 |
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Colin LeMahieu
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5db47f1376
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[Hexagon] Updating mux_ir/ri/ii/rr with encoding bits
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223515 91177308-0d34-0410-b5e6-96231b3b80d8
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2014-12-05 21:09:27 +00:00 |
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Colin LeMahieu
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4fda99f866
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[Hexagon] Adding tfrih/l instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223506 91177308-0d34-0410-b5e6-96231b3b80d8
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2014-12-05 20:07:19 +00:00 |
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Colin LeMahieu
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189606dbfe
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[Hexagon] Adding add reg, imm form with encoding bits and test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223504 91177308-0d34-0410-b5e6-96231b3b80d8
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2014-12-05 19:51:23 +00:00 |
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Colin LeMahieu
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78ec9010c5
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[Hexagon] Adding DoubleRegs decoder. Moving C2_mux and A2_nop. Adding combine imm-imm form.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223494 91177308-0d34-0410-b5e6-96231b3b80d8
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2014-12-05 18:24:06 +00:00 |
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Colin LeMahieu
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0785bdf107
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[Hexagon] Adding combine reg-reg forms.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223485 91177308-0d34-0410-b5e6-96231b3b80d8
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2014-12-05 17:38:36 +00:00 |
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Colin LeMahieu
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4c58675d35
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[Hexagon] Marking several instructions as isCodeGenOnly=0 and adding direct disassembly tests for many instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223482 91177308-0d34-0410-b5e6-96231b3b80d8
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2014-12-05 17:27:39 +00:00 |
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Colin LeMahieu
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0af45bd715
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[Hexagon] Adding lit exception if Hexagon isn't built.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223335 91177308-0d34-0410-b5e6-96231b3b80d8
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2014-12-04 04:28:38 +00:00 |
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Colin LeMahieu
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152ac18e80
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[Hexagon] Marking some instructions as CodeGenOnly=0 and adding disassembly tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223334 91177308-0d34-0410-b5e6-96231b3b80d8
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2014-12-04 03:41:21 +00:00 |
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Colin LeMahieu
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38d3e4d5d8
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[Hexagon] Reverting 220584 to address ASAN errors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221210 91177308-0d34-0410-b5e6-96231b3b80d8
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2014-11-04 00:14:36 +00:00 |
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Colin LeMahieu
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8699f5390b
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[Hexagon] Resubmission of 220427
Modified library structure to deal with circular dependency between HexagonInstPrinter and HexagonMCInst.
Adding encoding bits for add opcode.
Adding llvm-mc tests.
Removing unit tests.
http://reviews.llvm.org/D5624
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220584 91177308-0d34-0410-b5e6-96231b3b80d8
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2014-10-24 19:00:32 +00:00 |
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NAKAMURA Takumi
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effe629b3d
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Revert r220427, "[Hexagon] Adding encoding bits for add opcode."
It brought cyclic dependecy between HexagonAsmPrinter and HexagonDesc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220478 91177308-0d34-0410-b5e6-96231b3b80d8
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2014-10-23 11:31:22 +00:00 |
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Colin LeMahieu
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545127f54d
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[Hexagon] Adding encoding bits for add opcode.
Adding llvm-mc tests.
Removing unit tests.
http://reviews.llvm.org/D5624
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220427 91177308-0d34-0410-b5e6-96231b3b80d8
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2014-10-22 20:58:35 +00:00 |
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