Commit Graph

4 Commits

Author SHA1 Message Date
Saleem Abdulrasool
3f6dea4864 ARM: fail less catastrophically on invalid Windows input
Windows supports a restricted set of relocations (compared to ARM ELF).  In some
cases, we may end up generating an unsupported relocation.  This can occur with
bad input to the assembler in particular (the frontend should never generate
code that cannot be compiled).  Generate an error rather than just aborting.

The change in the API is driven by the desire to provide a slightly more helpful
message for debugging purposes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226779 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-22 04:03:32 +00:00
Saleem Abdulrasool
7a3698ecc9 MC: adjust text section flags for WoA
Correct the section flags for code built for Windows on ARM with
`-ffunction-sections`.  Windows on ARM uses solely Thumb-2 instructions, and
indicates that the function is thumb by placing it in a text section that has
IMAGE_SCN_MEM_16BIT flag set.

When we encounter a .section directive, a new section is constructed.  This may
be a text segment.  In order to identify that we need the additional flag,
expose the target triple through the ObjectFileInfo as this information is lost
otherwise.

Since any modern ARM targeting environment on Windows would be Thumb-2 (Windows
ARM NT or Windows Embedded Compact), introducing a new flag to indicate the
section attribute seems to be a bit overkill.  Simply depend on the target
triple.  Since there is one location that this information is currently needed,
creating a target specific assembly parser and delegating the parsing of section
switches also feels a bit heavy handed.  If it turns out that this information
ends up changing additional behaviour, then it may be worth considering that
alternative.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211481 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-22 22:25:01 +00:00
Saleem Abdulrasool
ea3ab85c01 MC: fix text section characteristics for WoA
link.exe requires that the text section has the IMAGE_SCN_MEM_16BIT flag set.
Otherwise, it will treat the function as ARM.  If this occurs, then jumps to the
function will fail, switching from thumb to ARM mode execution.

With this change, it is possible to link using the MSVC linker as well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210415 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-08 03:57:49 +00:00
Saleem Abdulrasool
cba7ac7bda MC: correct IMAGE_REL_ARM_MOV32T relocation emission
This corrects the emission of IMAGE_REL_ARM_MOV32T relocations.  Previously, we
were avoiding the high portion of the relocation too early.  If there was a
section-relative relocation with an offset greater than 16-bits (65535), you
would end up truncating the high order bits of the offset.  Allow the current
relocation representation to flow through out the MC layer to the object writer.
Use the new ability to restrict recorded relocations to avoid emitting the
relocation into the final object.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209337 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-21 23:17:56 +00:00