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5 Commits

Author SHA1 Message Date
Hal Finkel
800125f3a3 Add ppc440 itin. entries for LdStSTD* 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153844 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-01 19:23:04 +00:00
Hal Finkel
20b529b3f9 Split the LdStGeneral PPC itin. class into LdStLoad and LdStStore. 
Loads and stores can have different pipeline behavior, especially on
embedded chips. This change allows those differences to be expressed.
Except for the 440 scheduler, there are no functionality changes.
On the 440, the latency adjustment is only by one cycle, and so this
probably does not affect much. Nevertheless, it will make a larger
difference in the future and this removes a FIXME from the 440 itin.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153821 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-01 04:44:16 +00:00
Jia Liu
31d157ae1a Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150878 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-18 12:03:15 +00:00
Hal Finkel
e9e5791556 Remove >80-col line and unicode 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142209 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-17 18:10:08 +00:00
Hal Finkel
b31d3d271f Add PPC 440 scheduler and some associated tests (new files) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142171 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-17 04:03:55 +00:00