Commit Graph

102263 Commits

Author SHA1 Message Date
Matt Arsenault
d879166376 Move ExtractVectorElements to SelectionDAG.
This seems generally useful, and makes sense to
go along with SplitVector.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206041 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-11 17:47:30 +00:00
Tom Stellard
e04360918b SelectionDAG: Use helper function to improve legalization of ISD::MUL
The TargetLowering::expandMUL() helper contains lowering code extracted
from the DAGTypeLegalizer and allows the SelectionDAGLegalizer to expand more
ISD::MUL patterns without having to use a library call.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206037 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-11 16:12:01 +00:00
Tom Stellard
fdde7d2110 SelectionDAG: Factor ISD::MUL lowering code out of DAGTypeLegalizer
This code has been moved to a new function in the TargetLowering
class called expandMUL().  The purpose of this is to be able
to share lowering code between the SelectionDAGLegalize and
DAGTypeLegalizer classes.

No functionality changed intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206036 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-11 16:11:58 +00:00
Daniel Sanders
ae6f7070ba Revert: r205182 - llvm/test/MC/Mips/mips64r2/valid-xfail.s: This REQUIRES asserts. Seems it doesn't fail with -Asserts.
This was most likely caused by an uninitialized value and the relevant code was re-written in r205292. Reverting to see if it still fails on any of the buildbots.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206033 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-11 15:33:36 +00:00
Diego Novillo
bb7b423bdc Fix use-after-free bug caught by address sanitizer:
http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-bootstrap/builds/2959

The location string is returned as a std::string, not a StringRef.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206032 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-11 13:55:56 +00:00
Simon Atanasyan
eb0c9094ac [yaml2obj][ELF] ELF Relocations Support.
The patch implements support for both relocation record formats: Elf_Rel
and Elf_Rela. It is possible to define relocation against symbol only.
Relocations against sections will be implemented later. Now yaml2obj
recognizes X86_64, MIPS and Hexagon relocation types.

Example of relocation section specification:
Sections:
- Name: .text
  Type: SHT_PROGBITS
  Content: "0000000000000000"
  AddressAlign: 16
  Flags: [SHF_ALLOC]

- Name: .rel.text
  Type: SHT_REL
  Info: .text
  AddressAlign: 4
  Relocations:
    - Offset: 0x1
      Symbol: glob1
      Type: R_MIPS_32
    - Offset: 0x2
      Symbol: glob2
      Type: R_MIPS_CALL16

The patch reviewed by Michael Spencer, Sean Silva, Shankar Easwaran.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206017 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-11 04:13:39 +00:00
David Blaikie
77cf856e56 Implement depth_first and inverse_depth_first range factory functions.
Also updated as many loops as I could find using df_begin/idf_begin -
strangely I found no uses of idf_begin. Is that just used out of tree?

Also a few places couldn't use df_begin because either they used the
member functions of the depth first iterators or had specific ordering
constraints (I added a comment in the latter case).

Based on a patch by Jim Grosbach. (Jim - you just had iterator_range<T>
where you needed iterator_range<idf_iterator<T>>)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206016 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-11 01:50:01 +00:00
Jim Grosbach
ae64ab542a [c++11] Range'ify use list loops in InstrEmitter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206015 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-11 01:13:16 +00:00
Jim Grosbach
84f004436a [c++11] Range'ify use list loops in DAGCombiner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206014 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-11 01:13:13 +00:00
Jim Grosbach
a117c712c7 [ARM64,C++11] Range'ify use-lists iterators in address type promotion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206013 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-11 01:13:10 +00:00
David Blaikie
e6cd1ac2d5 Use value types instead of 'new'd objects to store dwarf labels for asm files
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206009 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-11 00:43:52 +00:00
Jim Grosbach
62fc093cf2 [ARM64,C++11]: Range'ify use-list iterators in DAGToDAG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206007 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-11 00:27:22 +00:00
Jim Grosbach
098f42dbc7 [ARM64,C++11]: More range-based loop simplification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206006 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-11 00:27:19 +00:00
Jim Grosbach
fb4b420326 SDNode: Add uses() iterator_range convenience methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206005 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-11 00:27:17 +00:00
David Blaikie
42382d3e37 Remove lazy-initialization of section caches in MCContext
This seems to have been a cargo-culted habit from the very first such
cache which didn't have any specific justification (but might've been a
layering constraint at the time).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206003 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-10 23:55:11 +00:00
Reid Kleckner
bc1fd917f0 Move the segmented stack switch to a function attribute
This removes the -segmented-stacks command line flag in favor of a
per-function "split-stack" attribute.

Patch by Luqman Aden and Alex Crichton!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205997 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-10 22:58:43 +00:00
Josh Magee
ee66766568 [stack protector] Refactor and clean-up test. No functionality change.
Refactored stack-protector.ll to use new-style function attributes everywhere
and eliminated unnecessary attributes.

This cleanup is in preparation for an upcoming test change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205996 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-10 22:47:27 +00:00
Louis Gerbarg
93bb4ead52 Test commit.
Update contact information in CREDITS.TXT.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205995 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-10 22:25:51 +00:00
David Blaikie
83ee956104 Simplify make_range by using move semantics
Move the iterators into the range the same way the range's ctor moves
them into the members.

Also remove some redundant top level parens in the return statement.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205993 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-10 22:03:48 +00:00
Jim Grosbach
eb690d8491 [ARM64,C++11]: Range'ify loops in InstrInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205992 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-10 22:00:18 +00:00
Kaelyn Takata
c39b659b89 Remove the use of "%e" as it is not a valid expansion like "%t".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205991 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-10 21:55:58 +00:00
David Blaikie
fe25521451 Reimplement debug info compression by compressing the whole section, rather than a fragment.
To support compressing the debug_line section that contains multiple
fragments (due, I believe, to variation in choices of line table
encoding depending on the size of instruction ranges in the actual
program code) we needed to support compressing multiple MCFragments in a
single pass.

This patch implements that behavior by mutating the post-relaxed and
relocated section to be the compressed form of its former self,
including renaming the section.

This is a more flexible (and less invasive, to a degree) implementation
that will allow for other features such as "use compression only if it's
smaller than the uncompressed data".

Compressing debug_frame would be a possible further extension to this
work, but I've left it for now. The hurdle there is alignment sections -
which might require going as far as to refactor
MCAssembler.cpp:writeFragment to handle writing to a byte buffer or an
MCObjectWriter (there's already a virtual call there, so it shouldn't
add substantial compile-time cost) which could in turn involve
refactoring MCAsmBackend::writeNopData to use that same abstraction...
which involves touching all the backends. This would remove the limited
handling of fragment writing seen in
ELFObjectWriter.cpp:getUncompressedData which would be nice - but it's
more invasive.

I did discover that I (perhaps obviously) don't need to handle
relocations when I rewrite the fragments - since the relocations have
already been applied and computed (and stored into
ELFObjectWriter::Relocations) by this stage (necessarily, because we
need to have written any immediate values or assembly-time relocations
into the data already before we compress it, which we have). The test
case doesn't necessarily cover that in detail - I can add more test
coverage if that's preferred.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205990 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-10 21:53:53 +00:00
David Blaikie
22f3236dd6 Revert debug info compression support.
To support compression for debug_line and debug_frame a different
approach is required. To simplify review, revert the old implementation
and XFAIL the test case. New implementation to follow shortly.

Reverts r205059 and r204958.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205989 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-10 21:53:47 +00:00
Jim Grosbach
13772fb0a7 [ARM64,C++11]: Range'ify loops in the conditional-compare pass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205988 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-10 21:49:24 +00:00
Jim Grosbach
b4dd10a723 iterator_range: Add an llvm::make_range() helper method.
Convenience wrapper to make dealing with sub-ranges easier. Like the
iterator_range<> itself, if/when this sort of thing gets standards
blessing, it will be replaced by the official version.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205987 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-10 21:49:22 +00:00
Kevin Enderby
e7ef041ba4 For the ARM integrated assembler add checking of the
alignments on vld/vst instructions.  And report errors for
alignments that are not supported.

While this is a large diff and an big test case, the changes
are very straight forward.  But pretty much had to touch
all vld/vst instructions changing the addrmode to one of the
new ones that where added will do the proper checking for
the specific instruction.

FYI, re-committing this with a tweak so MemoryOp's default
constructor is trivial and will work with MSVC 2012. Thanks
to Reid Kleckner and Jim Grosbach for help with the tweak.

rdar://11312406


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205986 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-10 20:18:58 +00:00
Adrian Prantl
a7ff9e9e6a Revert "Follow-up to r205973: change the return type to const MDNode*."
This reverts commit r205974, it turns out that this wasn't such a great idea
after all. Using DIVariable as return value is self-documenting and marginally
more type safe.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205979 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-10 18:37:53 +00:00
Adrian Prantl
cccac6162d Follow-up to r205973: change the return type to const MDNode*.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205974 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-10 17:50:30 +00:00
Adrian Prantl
b7b9bf458b Debug info: Factor the retrieving of the DIVariable from a MachineInstr
into a function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205973 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-10 17:39:48 +00:00
NAKAMURA Takumi
f0aeabb5a6 AddLLVM: Mute the prefix "lib" in SHARED on win32.
- LLVMSupport.dll
  - libLLVMSupport.dll.a

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205969 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-10 15:47:04 +00:00
Daniel Sanders
d95a78ca52 [mips] NotMips64 predicate is really a test for 32-bit GPR's.
Summary:
Similarly, the HasMips64 on the 64-bit move InstAlias is a test for 64-bit
GPR's.

No functional change.

Reviewers: matheusalmeida

Reviewed By: matheusalmeida

Differential Revision: http://reviews.llvm.org/D3263

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205968 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-10 15:00:28 +00:00
Arnold Schwaighofer
e2d124d396 Reapply "SLPVectorizer: Ignore users that are insertelements we can reschedule them"
This commit reapplies 205018. After 205855 we should correctly vectorize
intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205965 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-10 13:41:35 +00:00
Daniel Sanders
feb96be96e [mips] Switch the MIPS-III and MIPS-IV assembler tests to use -mcpu=mips4.
Summary:
It is now the smallest superset for these ISA's.

FeatureMips4 now contains FeatureFPIdx since [ls][dw]xc1 were added in MIPS-IV.
Made the FPIdx feature bit lowercase so that it can be used in the -mattr option.

Depends on D3274

Reviewers: matheusalmeida

Reviewed By: matheusalmeida

Differential Revision: http://reviews.llvm.org/D3275

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205964 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-10 13:16:49 +00:00
NAKAMURA Takumi
c137b5d6c4 ARM64/*/LLVMBuild.txt: Prune redundant deps.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205963 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-10 12:46:13 +00:00
NAKAMURA Takumi
accaa640cf LLVMBuild.txt: Add missing dependencies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205962 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-10 11:16:47 +00:00
NAKAMURA Takumi
6c5bb2e764 LLVMBuild.txt: Reformat.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205961 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-10 11:16:17 +00:00
Dmitri Gribenko
7aca6639c2 SaveAndRestore: fix coding style and Doxygenify comments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205959 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-10 09:44:32 +00:00
David Majnemer
878657074a YAMLIO: Allow scalars to dictate quotation rules
Introduce ScalarTraits::mustQuote which determines whether or not a
StringRef needs quoting before it is acceptable to output.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205955 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-10 07:37:33 +00:00
Simon Atanasyan
fb52dba011 Use range-based for loops. No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205953 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-10 06:02:49 +00:00
NAKAMURA Takumi
f2eed86ea5 Fix abuse of StringRef on ARM64SysReg::MRSMapper::toString(Val, Valid).
FIXME: Could we use SmallString here?

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205950 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-10 03:05:59 +00:00
Saleem Abdulrasool
6c66c4d2eb ARM64: add an explicit cast to silence a silly warning
GCC 4.8 complains with:
  warning: enumeral and non-enumeral type in conditional expression

Although this is silly and harmless in this case, add an explicit cast to
silence the warning.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205949 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-10 02:48:10 +00:00
Juergen Ributzka
d631cc4563 [ARM64] Fix immediate cost calculation for types larger than i64.
The immediate cost calculation code was hitting an assertion in the included
test case, because APInt was still internally 128-bits. Truncating it to 64-bits
fixed the issue.

Fixes <rdar://problem/16572521>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205947 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-10 01:36:59 +00:00
Reid Kleckner
6a6b4d5dfa Revert "For the ARM integrated assembler add checking of the alignments on vld/vst instructions. And report errors for alignments that are not supported."
It doesn't build with MSVC 2012, because MSVC doesn't allow union
members that have non-trivial default constructors.  This change added
'SMLoc AlignmentLoc' to MemoryOp, which made MemoryOp's default ctor
non-trivial.

This reverts commit r205930.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205944 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-10 00:52:14 +00:00
Jim Grosbach
31689680ec Fix to support properly cleaning up failed address sinking against constants
As it turns out the source of the sunkaddr can be a constant, in which case
there is not an instruction to delete, causing the cleanup code introduced in
r204833 to crash. This patch adds a dynamic check to ensure the deleted value is
in fact an instruction and not a constant.

Patch by Louis Gerbarg <lgg@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205941 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-10 00:27:45 +00:00
Jim Grosbach
6472a514dc X86: Tighten up test.
llc CPU autodection bites again. Speculative fix for bot failures.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205940 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-10 00:27:43 +00:00
Jim Grosbach
afb4ef3549 Add support for load folding of avx1 logical instructions
AVX supports logical operations using an operand from memory. Unfortunately
because integer operations were not added until AVX2 the AVX1 logical
operation's types were preventing the isel from folding the loads. In a limited
number of cases the peephole optimizer would fold the loads, but most were
missed. This patch adds explicit patterns with appropriate casts in order for
these loads to be folded.

The included test cases run on reduced examples and disable the peephole
optimizer to ensure the folds are being pattern matched.

Patch by Louis Gerbarg <lgg@apple.com>

rdar://16355124

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205938 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-09 23:39:25 +00:00
Jim Grosbach
e9915738be SelectionDAG: Don't constant fold target-specific nodes.
FoldConstantArithmetic() only knows how to deal with a few target independent
ISD opcodes. Bail early if it sees a target-specific ISD node. These node do
funny things with operand types which may break the assumptions of the code
that follows, and there's no actual folding that can be done anyway. For example,
non-constant 256 bit vector shifts on X86 have a shift-amount operand that's a
128-bit v4i32 vector regardless of what the first operand type is and that breaks
the assumption that the operand types must match.

rdar://16530923

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205937 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-09 23:28:11 +00:00
Kevin Enderby
34d14bb534 For the ARM integrated assembler add checking of the
alignments on vld/vst instructions.  And report errors for
alignments that are not supported.

While this is a large diff and an big test case, the changes
are very straight forward.  But pretty much had to touch
all vld/vst instructions changing the addrmode to one of the
new ones that where added will do the proper checking for
the specific instruction.

rdar://11312406


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205930 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-09 21:32:59 +00:00
Chad Rosier
c3de5ed072 [AArch64] Implement the isZExtFree APIs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205926 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-09 20:51:21 +00:00
Chad Rosier
fe5c9cee80 [AArch64] Implement the isTruncateFree API.
In AArch64 i64 to i32 truncate operation is a subregister access.

This allows more opportunities for LSR optmization to eliminate
variables of different types (i32 and i64).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205925 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-09 20:43:40 +00:00