Commit Graph

92684 Commits

Author SHA1 Message Date
Arnold Schwaighofer
d8f8c35f4d ARM sched model: Cortex A9 - More InstRW sched resources
Add more InstRW mappings.

Reapply 183266.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183435 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-06 19:30:21 +00:00
Rafael Espindola
ab9ba5321d Add a testcase from pr16244.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183433 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-06 19:15:23 +00:00
Arnold Schwaighofer
f1f6dcefa8 ARM sched model: Add branch thumb instructions
Reapply 183265.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183432 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-06 18:51:01 +00:00
Arnold Schwaighofer
a6db677197 ARM sched model: Add branch thumb2 instructions
Reapply 183264.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183430 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-06 18:42:09 +00:00
Arnold Schwaighofer
87aab6dc96 ARM sched model: Add branch instructions
Reapply 183263.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183428 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-06 18:21:13 +00:00
Arnold Schwaighofer
3ba4778c95 ARM sched model: Add preload thumb2 instructions
Reapply 183262.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183427 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-06 18:06:30 +00:00
Jakub Staszak
239f8a4e11 Remove unimplemented definition. Found using [-Wunused-member-function].
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183426 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-06 17:52:45 +00:00
Arnold Schwaighofer
e022a6b0f4 ARM sched model: Add preload instructions
Reapply 183261.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183425 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-06 17:26:12 +00:00
Kevin Enderby
54154f3bf1 Teach llvm-objdump with the -macho parser how to use the data in code table
from the LC_DATA_IN_CODE load command.  And when disassembling print
the data in code formatted for the kind of data it and not disassemble those
bytes.

I added the format specific functionality to the derived class MachOObjectFile
since these tables only appears in Mach-O object files. This is my first
attempt to modify the libObject stuff so if folks have better suggestions
how to fit this in or suggestions on the implementation please let me know.

rdar://11791371


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183424 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-06 17:20:50 +00:00
Arnold Schwaighofer
f2988a0084 ARM sched model: Add more ALU and CMP thumb instructions
Reapply of 183260.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183423 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-06 17:03:13 +00:00
Rafael Espindola
7de80e04d9 Revert "Use IRBuilder instead of ConstantInt methods. It simplifies code a little bit."
This reverts commit 183328. It caused pr16244 and broke the bots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183422 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-06 17:03:05 +00:00
Arnold Schwaighofer
826de688b0 ARM sched model: Add more ALU and CMP thumb2 instructions
Reapply of 183259.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183421 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-06 16:35:25 +00:00
Vincent Lejeune
5f035d048e R600: Remove leftover code in R600MachineScheduler.cpp
Spotted by Benjamin Kramer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183413 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-06 14:18:29 +00:00
Rafael Espindola
e3a0e7f29d Print symbol names in relocations when dumping COFF as YAML.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183403 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-06 13:06:17 +00:00
Bill Wendling
2ed7659b88 Cast to the correct type. Pointer, not reference.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183385 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-06 05:39:29 +00:00
NAKAMURA Takumi
0ac857462f R600OptimizeVectorRegisters.cpp: Tweak a warning. [-Wsometimes-uninitialized]
FIXME: Is it false alarm?

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183371 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-06 02:15:12 +00:00
NAKAMURA Takumi
7b6d32a361 R600OptimizeVectorRegisters.cpp: Suppress a warning. [-Wunused-variable]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183370 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-06 02:15:06 +00:00
NAKAMURA Takumi
3ebcf388cd Trailing linefeed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183369 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-06 02:15:00 +00:00
Bill Wendling
b88cef5a16 Cast to the proper type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183365 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-06 01:04:21 +00:00
Jakub Staszak
c6e2ab3a57 Remove unneeded cast<>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183363 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-06 00:49:57 +00:00
Sean Silva
272d881234 Add some class documentation to BinaryRef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183362 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-06 00:47:12 +00:00
Bill Wendling
6a2e7ac0b6 Cache the TargetLowering info object as a pointer.
Caching it as a pointer allows us to reset it if the TargetMachine object
changes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183361 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-06 00:43:09 +00:00
Jakub Staszak
f2d03d74ff Use IRBuilder instead of ConstantInt methods.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183360 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-06 00:37:23 +00:00
Bill Wendling
384ceb8446 Don't cache the TargetLoweringInfo object inside of the FunctionLowering object.
The TargetLoweringInfo object is owned by the TargetMachine. In the future, the
TargetMachine object may change, which may also change the TargetLoweringInfo
object.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183356 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-06 00:11:39 +00:00
Sean Silva
cfb476fb20 Rename operator== parameter to RHS.
The previous name `Ref` is overly generic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183354 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-05 23:58:14 +00:00
Sean Silva
0d861a24d8 Remove error-prone methods of BinaryRef.
A user shouldn't care about the internal state, and these methods by
their very nature require asserting a predicate on the internal state.
As such, they cannot be used safely without introducing hidden
long-distance dependencies on the manner of construction of the
BinaryRef.

Use writeAsBinary(raw_ostream &) and writeAsHex(raw_ostream &) if you
need to access the data in a binary or hex format.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183353 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-05 23:55:26 +00:00
Sean Silva
4370ddb8b8 Add writeAsHex(raw_ostream &) method to BinaryRef.
This hides the implementation. A future commit will remove the
error-prone getHex() and getBinary() methods.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183352 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-05 23:47:23 +00:00
Tom Stellard
c170230b3a R600: Replace predicate loop with predicate function
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183351 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-05 23:39:50 +00:00
Sean Silva
6acc982e74 Rename BinaryRef::isBinary to more descriptive DataIsHexString.
And add a doxygen comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183350 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-05 23:32:31 +00:00
Sean Silva
63958fba58 Add BinaryRef binary_size() method.
This avoids making assumptions about the data representation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183349 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-05 23:32:27 +00:00
Sean Silva
2b1068952a Comment BinaryRef::Data.
Also, state an invariant.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183348 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-05 23:32:23 +00:00
Bill Wendling
08368387a4 Add space to assert message.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183346 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-05 23:13:26 +00:00
Sean Silva
639adc59f8 Add writeAsBinary(raw_ostream &) method to BinaryRef.
Previously, yaml2coff.cpp had a writeHexData static helper function to
do this, but it is generally useful functionality.

Also, validate hex strings up-front to avoid running having to handle
errors "deep inside" the yaml2obj code (it also gives better diagnostics
than it used to).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183345 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-05 22:59:00 +00:00
Vincent Lejeune
f3d6e32c09 R600: Add a pass that merge Vector Register
Previously commited @183279 but tests were failing, reverted @183286
It was broken because @183336 was missing, now it's there.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183343 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-05 21:38:04 +00:00
Sean Silva
f41d317054 [docs] Add link to C++ ABI document.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183342 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-05 21:11:16 +00:00
Sean Silva
c85756f4b0 [docs] Add link to SysV ABI document.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183341 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-05 21:11:11 +00:00
Sean Silva
d56d756611 [ELF] Add ELFOSABI_GNU.
ELFOSABI_LINUX is a historical alias for ELFOSABI_GNU according to
<http://www.sco.com/developers/gabi/latest/ch4.eheader.html>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183339 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-05 20:55:58 +00:00
Rafael Espindola
c9f2cc7e05 Don't hide the first ELF symbol.
The first symbol on ELF is dummy, but it has a defined content and readelf
normally displays it. With this change llvm-readobj also displays it and we
can check that llvm-mc output is correct according to the standard.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183337 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-05 20:33:54 +00:00
Vincent Lejeune
512119770e R600: Schedule copy from phys register at beginning of block
It allows regalloc pass to remove them by trivially assigning associated reg

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183336 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-05 20:27:35 +00:00
Sean Silva
6ed30e0f0c yaml2obj: split out COFF logic into separate file
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183335 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-05 19:56:47 +00:00
Akira Hatanaka
8270e68c56 [mips] brcond + setgt/setugt instruction selection patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183334 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-05 19:49:55 +00:00
Sean Silva
db9dc53871 yaml2obj: add -format=<fmt> to choose input YAML interpretation
See the comment in yaml2obj.cpp for why this is currently needed.
Eventually we can get rid of this, but for now it is needed in order to
make forward progress with adding ELF support, and should be
straightforward to remove later.

Also, preserve the default of COFF, to avoid breaking existing tests.
This policy can easily be changed later though.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183332 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-05 18:51:34 +00:00
Jakub Staszak
cc81b38c4c Use IRBuilder instead of ConstantInt methods. It simplifies code a little bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183328 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-05 18:27:02 +00:00
Michael Liao
9a508ef64a [PATCH] Fix VGATHER* operand constraints
Add earlyclobber constaints to prevent input register being allocated as
the output register because, according to Intel spec [1], "If any pair
of the index, mask, or destination registers are the same, this
instruction results a UD fault."

---
[1] http://software.intel.com/sites/default/files/319433-014.pdf



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183327 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-05 18:12:26 +00:00
Rafael Espindola
bcb1ea8ef6 Represent symbols with a SymbolIndex,SectionIndex pair.
With this patch we use the SectionIndex directly, instead of counting the
number of symbol tables. This saves a DenseMap lookup every time we want to
find which symbol a relocation refers to.

Also simplify based on the fact that there is at most one SHT_SYMTAB and one
SHT_DYNSYM.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183326 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-05 17:54:19 +00:00
Arnold Schwaighofer
31588f3005 ARM sched model: Add more ALU and CMP instructions
Reapply of 183258.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183321 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-05 16:36:51 +00:00
Arnold Schwaighofer
c82157378e ARM sched model: Add divsion, loads, branches, vfp cvt
Add some generic SchedWrites and assign resources for Swift and Cortex A9.

Reapply of r183257. (Removed empty InstRW for division on swift)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183319 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-05 16:06:11 +00:00
Arnold Schwaighofer
d87bd5627e ARMInstrInfo: Improve isSwiftFastImmShift
An instruction with less than 3 inputs is trivially a fast immediate shift.

Reapply of 183256, should not have caused the tablegen segfault on linux either.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183314 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-05 14:59:36 +00:00
Arnold Schwaighofer
fcce70ad52 SubtargetEmitter fix
Don't output data if we are supposed to ignore the record.

Reapply of 183255, I don't think this was causing the tablegen segfault on linux
testers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183311 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-05 14:06:50 +00:00
Mihai Popa
2248cf5906 This is a simple patch that changes RRX and RRXS to accept all registers as operands.
According to the ARM reference manual, RRX(S) have defined encodings for lr, pc and sp.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183307 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-05 13:23:51 +00:00