6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-12-26 05:32:25 +00:00
Code Issues Projects Releases Wiki Activity
49,224 Commits 39 Branches 0 Tags 277 MiB
d94061f123
Commit Graph

11505 Commits

Author SHA1 Message Date
Chris Lattner
d94061f123 remove more remnants of small section support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76936 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-24 03:14:35 +00:00
Chris Lattner
013e6b6309 Remove SectionKind::Small*. This was only used on mips, and is apparently 
a sad mistake that is regretted. :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76935 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-24 03:11:51 +00:00
Evan Cheng
865763bf80 Thumb2 should use the register scavenger. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76930 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-24 01:05:51 +00:00
Evan Cheng
b74bb1a7a4 FLDD, FLDS, FCPYD, FCPYS, FSTD, FSTS, VMOVD, VMOVQ maps to the same instructions on all sub-targets. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76925 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-24 00:53:56 +00:00
Eric Christopher
fbd6687cf1 Update insertps handling based on feedback. Move to a v4f32 style 
to support vector arguments and scalar arguments correctly. Update
lowering and fix comment to refer to pinsr* instead of insertps.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76921 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-24 00:33:09 +00:00
Dan Gohman
d2cb3d2c32 Remove the IA-64 backend. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76920 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-24 00:30:09 +00:00
David Goodwin
5ff58b5c3a Correctly handle the Thumb-2 imm8 addrmode. Specialize frame index elimination more exactly for Thumb-2 to get better code gen. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76919 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-24 00:16:18 +00:00
Sean Callanan
74e5210809 Added a 2+-byte NOP instruction to the Intel tables, 
for the assembler/disassembler to use.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76914 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-23 23:39:34 +00:00
Evan Cheng
eee839dd3c Thumb2 does not allow the use of "pc" register as part of the load / store address. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76909 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-23 23:09:51 +00:00
Duncan Sands
daf2212e83 Revert r75581: it causes massive breakage in the Ada 
testsuite, due to exception handling not working
correctly.  Maybe because the libgcc unwinder is
miscompiled - not sure, and I won't have time to
look into it before leaving on holiday.  Note that
miscompilations of libgcc are not picked up by the
nightly testers, because they dynamically link with
libgcc, so pick up the system version rather than
the version built as part of llvm-gcc.  This is a
nasty flaw in the nightly testers.  (On the other
hand the Ada testsuite links with the just built
libgcc).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76895 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-23 19:00:02 +00:00
Evan Cheng
d3d9d66dd2 Fix up ARM constant island pass for Thumb2. 
Also fixed up code to fully use the SoImm field for ADR on ARM mode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76890 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-23 18:27:47 +00:00
Evan Cheng
81c102ba66 Since we have moved unified assembly, switch to ADR instruction instead of a the difficult-to-read .set + add syntax to materialize pc-relative address. 
Turns out this also fixed a poor code selection on Thumb1. I have no idea why we were using a mov + add to do the same thing as ADR before.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76889 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-23 18:26:03 +00:00
David Goodwin
b53cc014d0 Fix frame index elimination to correctly handle thumb-2 addressing modes that don't allow negative offsets. During frame elimination convert *i12 opcode to a *i8 when necessary due to a negative offset. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76883 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-23 17:06:46 +00:00
Evan Cheng
697712c7d4 80 col violation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76872 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-23 07:58:08 +00:00
Eric Christopher
1e5cdea9d7 Support insertps via the intrinsic and add a couple of simple 
testcases to make sure it's being generated.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76843 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-23 02:22:41 +00:00
Sanjiv Gupta
0f009d2ea5 Do not call getMangledName on Intrinsics. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76842 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-23 02:11:04 +00:00
Chris Lattner
819c4f365f remove SectionFlags::Small: it is only used on Xcore, and we'll find 
a better solution for it in the future.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76818 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-22 23:27:22 +00:00
Dan Gohman
41d0b9d952 x86 isel tweak: use lea (%reg,%reg) instead of lea (,%reg,2). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76817 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-22 23:26:55 +00:00
David Goodwin
e1e52edfff Fix typo in addrmode definition. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76806 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-22 22:24:31 +00:00
Evan Cheng
eadf04992a Use getTargetConstant instead of getConstant since it's meant as an constant operand. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76803 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-22 22:03:29 +00:00
Daniel Dunbar
3d5126fbad Switch some clients to Value::getName(), and other getName() user 
simplification.
 - NFC


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76789 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-22 21:33:09 +00:00
Daniel Dunbar
8f60302ee5 Simplify some uses of Value::getName() 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76786 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-22 21:10:12 +00:00
Daniel Dunbar
7384e1b39d Fix indentation. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76778 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-22 20:26:37 +00:00
Evan Cheng
78dd9dbdfb Eliminate a redudant check Eli pointed out. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76762 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-22 18:08:05 +00:00
Chris Lattner
38c3363090 doxygenify 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76750 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-22 16:53:56 +00:00
Richard Osborne
5550f62778 Thread local globals don't require special handling by the linker and so can 
be placed in the standard data / bss sections.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76735 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-22 11:01:00 +00:00
Duncan Sands
ed4b2dc313 Revert commit 76707, it was breaking the llvm-gcc build 
on linux platforms.  The binutils assembler does not
recognize the "s" flag, see for example
http://sourceware.org/binutils/docs/as/Section.html 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76733 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-22 10:35:05 +00:00
Evan Cheng
756da12ae4 Don't forget D16 - D31 are clobbered by calls and sjlj eh. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76729 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-22 06:46:53 +00:00
Evan Cheng
4a8b7d030b Add R12 to the list of registers clobbered by 16-bit Thumb calls as a pre-caution. r12 could be live once we have mixed 32-bit and 16-bit instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76728 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-22 06:37:28 +00:00
Evan Cheng
3b6627b944 Fix a obvious copy-n-paste bug. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76727 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-22 06:12:40 +00:00
Evan Cheng
8295d99bff Get rid one of the getRegisterNumbering. Also add D16 - D31. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76725 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-22 05:55:18 +00:00
Eli Friedman
3dae284f5e Add support for MMX VSETCC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76713 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-22 01:06:52 +00:00
Sean Callanan
5292588ad4 Added the unconditional JMP with an 8-bit relocation for the 
assembler / disassembler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76712 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-22 01:05:20 +00:00
Evan Cheng
064a6eacab Add an entry. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76711 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-22 00:58:27 +00:00
Chris Lattner
f1581564b6 inline the two MergeableConstSection implementations into their 
only caller.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76710 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-22 00:47:11 +00:00
Chris Lattner
828f704c10 set the ELF "small" flag on objects that end up in .rodata.cst4 consistently, 
updating a mips testcase to expect it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76707 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-22 00:41:56 +00:00
Chris Lattner
2804616ba3 don't set the small flag yet. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76706 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-22 00:30:39 +00:00
Chris Lattner
298414ec18 remove the SelectSectionForMachineConst hook, replacing it with 
a new getSectionForMergableConstant hook.  This removes one dependence
of TAI on Type, and provides the hook with enough info to make the 
right decision based on whether the global has relocations etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76705 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-22 00:28:43 +00:00
Evan Cheng
fc6ad402fb Let each target determines whether a machine instruction is dead. If true, that allows late codeine passes to delete it. 
This is considered a workaround. The problem is some targets are not modeling side effects correctly. PPC is apparently one of those. This patch allows ppc llvm-gcc to bootstrap on Darwin. Once we find out which instruction definitions are wrong, we can remove the PPCInstrInfo workaround.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76703 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-22 00:25:27 +00:00
Owen Anderson
e922c02019 Get rid of the Pass+Context magic. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76702 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-22 00:24:57 +00:00
Chris Lattner
7cf12c7efd reimplement Constant::ContainsRelocations as 
Constant::getRelocationInfo(), which has a much simpler
to use API.  It still should not be part of libvmcore, but
is better than it was.  Also teach it to be smart about 
hidden visibility.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76700 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-22 00:05:44 +00:00
Evan Cheng
5d8f1cae76 Fixing cp island pass. Step 1: Determine whether the constant pool offset can be 
negative on an individual bases rather than basing on whether it's in thumb
mode.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76698 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-21 23:56:01 +00:00
Evan Cheng
7fdf962e5c Fix comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76693 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-21 23:54:22 +00:00
Chris Lattner
b2fb9ccbb7 simplify code now that it is inlined. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76689 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-21 23:49:55 +00:00
Chris Lattner
97d2cae44b Now that RelocBehaviour() is never overloaded, it doesn't need to be 
virtual.  Just inline it into its two current call sites in preparation
for simplifying the code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76686 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-21 23:47:11 +00:00
Chris Lattner
1a1b323504 this doesn't break any of the 4 ia64 tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76683 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-21 23:42:24 +00:00
Chris Lattner
9d8052f08f alpha doesn't need to redefine this: it only supports PIC codegen anyway. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76682 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-21 23:41:35 +00:00
Chris Lattner
354c0165e7 no really, I can spell! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76679 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-21 23:36:01 +00:00
Chris Lattner
cb45963643 add an API so target-independent codegen can determine if a constant 
pool entry will require relocations against it.  I implemented this
conservatively for ARM, someone who is knowledgable about it should
see if this can be improved.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76678 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-21 23:34:23 +00:00
Chris Lattner
117c7e2a6a remove the last bits of SectionFlagsForGlobal. There is some flag here that 
depends on XS1A, but I think the ReadOnlySection is already set up for this
and there is no testcase that this breaks.  If this is really needed, we can
add the appropriate parameterization to TargetAsmInfo in the future to support
this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76667 91177308-0d34-0410-b5e6-96231b3b80d8
 2009-07-21 22:42:37 +00:00