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Author SHA1 Message Date
Daniel Sanders
0543dab791 [mips] MIPS-IV is broadly the same as MIPS64 so duplicate all -mcpu=mips64 tests with -mcpu=mips4 as a starting point 
Summary:
Two exceptions to this:
  test/CodeGen/Mips/octeon.ll
  test/CodeGen/Mips/octeon_popcnt.ll
these test extensions to MIPS64

One test is altered for MIPS-IV:
  test/CodeGen/Mips/mips64countleading.ll
    Tests dclo/dclz which were added in MIPS64. The MIPS-IV version tests
    that dclo/dclz are not emitted.

Four tests fail and are not in this patch:
  test/CodeGen/Mips/abicalls.ll
  test/CodeGen/Mips/fcopysign-f32-f64.ll
  test/CodeGen/Mips/fcopysign.ll
  test/CodeGen/Mips/stack-alignment.ll

Depends on D3343

Reviewers: matheusalmeida, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D3344

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206185 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-04-14 16:00:28 +00:00
Akira Hatanaka
990d639f55 Add code in MipsDAGToDAGISel for selecting constant +0.0. 
MIPS64 can generate constant +0.0 with a single DMTC1 instruction. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146999 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-20 22:25:50 +00:00