Jakob Stoklund Olesen
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c5ddb74089
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These tests no longer require linear scan because reserved register coalescing is now universal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128936 91177308-0d34-0410-b5e6-96231b3b80d8
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2011-04-05 21:40:41 +00:00 |
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Jakob Stoklund Olesen
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a6f7499244
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Fix Mips, Sparc, and XCore tests that were dependent on register allocation.
Add an extra run with -regalloc=basic to keep them honest.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128654 91177308-0d34-0410-b5e6-96231b3b80d8
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2011-03-31 18:42:43 +00:00 |
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Venkatraman Govindaraju
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fc3faa75cb
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Sparc backend:
Rename FLUSH to FLUSHW.
Output "ta 3" instead of a "flushw" instruction if v8 instruction set is used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123997 91177308-0d34-0410-b5e6-96231b3b80d8
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2011-01-21 22:00:00 +00:00 |
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Venkatraman Govindaraju
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860b64cb1e
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Implement RETURNADDR and FRAMEADDR lowering in SPARC backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123310 91177308-0d34-0410-b5e6-96231b3b80d8
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2011-01-12 05:08:36 +00:00 |
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