Kevin Qin
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16511208f2
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[AArch64 NEON] Custom lower conversion between vector integer and vector floating point if element bit-width doesn't match.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199462 91177308-0d34-0410-b5e6-96231b3b80d8
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2014-01-17 05:52:35 +00:00 |
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Chad Rosier
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fafd264de4
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[AArch64] Refactor the Neon vector/scalar floating-point convert intrinsics so
that they use float/double rather than the vector equivalents when appropriate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196930 91177308-0d34-0410-b5e6-96231b3b80d8
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2013-12-10 16:11:39 +00:00 |
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Chad Rosier
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72800f3a06
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[AArch64] Refactor the Neon vector/scalar floating-point convert implementation.
Specifically, reuse the ARM intrinsics when possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196926 91177308-0d34-0410-b5e6-96231b3b80d8
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2013-12-10 15:35:33 +00:00 |
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Hao Liu
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a339740cb8
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[AArch64]Add missing pair intrinsics such as:
int32_t vminv_s32(int32x2_t a)
which should be compiled into SMINP Vd.2S,Vn.2S,Vm.2S
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196749 91177308-0d34-0410-b5e6-96231b3b80d8
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2013-12-09 03:51:42 +00:00 |
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Hao Liu
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1296bb3ba6
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[AArch64]Add missing floating point convert, round and misc intrinsics.
E.g. int64x1_t vcvt_s64_f64(float64x1_t a) -> FCVTZS Dd, Dn
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196210 91177308-0d34-0410-b5e6-96231b3b80d8
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2013-12-03 06:06:55 +00:00 |
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Kevin Qin
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27df434c5e
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Add test case for AArch64 NEON instruction set misc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194673 91177308-0d34-0410-b5e6-96231b3b80d8
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2013-11-14 06:45:17 +00:00 |
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