Commit Graph

120128 Commits

Author SHA1 Message Date
Kostya Serebryany
dd6dcb6cee [libFuzzer] fix the strncmp interceptor -- it should respect short strings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243691 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-30 21:22:22 +00:00
Eric Christopher
f4745ecbb4 Fix TableGen code generation for ReadNone attribute.
Patch by Pete Abred!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243689 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-30 21:16:34 +00:00
Sanjay Patel
3b00227629 enable fast-math-flag propagation to DAG nodes
This uncovered latent bugs previously:
http://reviews.llvm.org/D10403

...but it's time to try again because internal tests aren't finding more.

If time passes and no other bugs are reported, we can remove this cl::opt.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243687 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-30 21:06:55 +00:00
Adhemerval Zanella
044eeda22c Enable dfsan for aarch64
This patch enable DFSan memory transformation for aarch64 (39-bit VMA).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243684 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-30 20:49:35 +00:00
Mehdi Amini
93204d28b8 Add a TargetMachine hook that verifies DataLayout compatibility
Summary: Also provide the associated assertion when CodeGen starts.

Reviewers: echristo

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11654

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243682 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-30 20:33:18 +00:00
Wei Mi
4db6728b3a [SLP vectorizer]: Choose the best consecutive candidate to pair with a store instruction.
The patch changes the SLPVectorizer::vectorizeStores to choose the immediate
succeeding or preceding candidate for a store instruction when it has multiple
consecutive candidates. In this way it has better chance to find more slp
vectorization opportunities.

Differential Revision: http://reviews.llvm.org/D10445


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243666 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-30 17:40:39 +00:00
Mehdi Amini
778e06475b Fix lli with OrcLazyJIT: the default DataLayout was used.
Set the correct one using the TargetMachine instead.

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243664 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-30 17:29:33 +00:00
Matt Arsenault
ece90bb19e AMDGPU: Set SubRegIndex size and offset
I'm not sure what reasons the comment here could have
had for not setting these. Without these set, there is
an assertion hit during DWARF emission.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243661 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-30 17:03:11 +00:00
Matt Arsenault
b240003d58 AMDGPU: Fix unreachable when emitting binary debug info
Copy implementation of applyFixup from AArch64 with AArch64 bits
ripped out.

Tests will be included with a later commit. Several other
problems must be fixed before binary debug info emission
will work.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243660 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-30 17:03:08 +00:00
Alex Lorenz
fbd94791e6 MIR Serialization: Serialize the machine basic block's successor weights.
Reviewers: Duncan P. N. Exon Smith


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243659 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-30 16:54:38 +00:00
David Majnemer
cfe562c99b [COFF] Add IMAGE_SCN_TYPE_NOLOAD to SectionCharacteristics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243658 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-30 16:47:56 +00:00
Tom Stellard
a495784ea0 AMDGPU/SI: Simplify moveSMRDToVALU()
Summary:
Replace the switch on instruction opcode with a switch on register size.
This way we don't need to update the switch statement when we add new
SMRD variants.

Reviewers: arsenm

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11601

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243652 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-30 16:20:42 +00:00
Tom Stellard
a3a8dc4c30 AMDGPU/SI: Remove isTriviallyReMaterializable() function from SIInstrInfo
Summary:
This function is never called.  isReallyTriviallyReMaterializable() is
the function that should be implemented instead.

Reviewers: arsenm

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11620

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243651 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-30 16:20:40 +00:00
Vasileios Kalintiris
f04b7c7d06 [mips] Fix out-of-date debug information in test file.
Update the debug info in the check-lines because the change in r243638
introduced a constant initialization before the prologue's end as part
of a register spill.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243640 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-30 13:13:09 +00:00
NAKAMURA Takumi
fc77c83c74 MCJITTests/MCJITCAPITest.cpp: Try to appease i686-win32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243639 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-30 13:06:53 +00:00
Vasileios Kalintiris
458b5f3d9b [mips][FastISel] Remove hidden mips-fast-isel option.
Summary:
This hidden option would disable code generation through FastISel by
default. It was removed from the available options and from the
Fast-ISel tests that required it in order to run the tests.

Reviewers: dsanders

Subscribers: qcolombet, llvm-commits

Differential Revision: http://reviews.llvm.org/D11610

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243638 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-30 12:39:33 +00:00
Vasileios Kalintiris
3b79f0ccc3 [mips][FastISel] Apply only zero-extension to constants prior to their materialization.
Summary:
Previously, we would sign-extend non-boolean negative constants and
zero-extend otherwise. This was problematic for PHI instructions with
negative values that had a type with bitwidth less than that of the
register used for materialization.

More specifically, ComputePHILiveOutRegInfo() assumes the constants
present in a PHI node are zero extended in their container and
afterwards deduces the known bits.

For example, previously we would materialize an i16 -4 with the
following instruction:

  addiu $r, $zero, -4

The register would end-up with the 32-bit 2's complement representation
of -4. However, ComputePHILiveOutRegInfo() would generate a constant
with the upper 16-bits set to zero. The SelectionDAG builder would use
that information to generate an AssertZero node that would remove any
subsequent trunc & zero_extend nodes.

In theory, we should modify ComputePHILiveOutRegInfo() to consult
target-specific hooks about the way they prefer to materialize the
given constants. However, git-blame reports that this specific code
has not been touched since 2011 and it seems to be working well for every
target so far.

Reviewers: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11592

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243636 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-30 11:51:44 +00:00
Daniel Sanders
4b26be6066 [test-release.sh] Add -no-libunwind to disable it on targets that don't support it.
Summary:
Mips doesn't implement unw_getcontext() or libunwind::Registers_*::jumpto() yet
so we must disable libunwind for this release.

Reviewers: hans

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11563

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243633 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-30 10:14:57 +00:00
Michael Kuperstein
78a589c319 [X86] Recognize "flags" as an identifier, not a register in Intel-syntax inline asm
Patch by: marina.yatsina@intel.com
Differential Revision: http://reviews.llvm.org/D11512


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243630 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-30 10:10:25 +00:00
Matt Arsenault
d8c145fd49 Add amdopencl environment to triple
This is used by the AMD x86 OpenCL implementation
to change some ABI details on Windows and Linux.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243627 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-30 08:16:51 +00:00
Adam Nemet
77907c7555 [LoopVer] Add missing std::move
The reason I was passing this vector by value in the constructor so that
I wouldn't have to copy when initializing the corresponding member but
then I forgot the std::move.

The use-case is LoopDistribution which filters the checks then
std::moves it to LoopVersioning's constructor.  With this interface we
can avoid any copies.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243616 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-30 04:21:13 +00:00
Adam Nemet
52aafdb50a [LDist] Filter the checks locally rather than in LAA, NFC
Before, we were passing the pointer partitions to LAA.  Now, we get all
the checks from LAA and filter out the checks within partitions in
LoopDistribution.

This effectively concludes the steps to move filtering memchecks from
LAA into its clients.  There is still some cleanup left to remove the
unused interfaces in LAA that still take PtrPartition.

(Moving this functionality to LoopDistribution also requires
needsChecking on pointers to be made public.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243613 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-30 03:29:16 +00:00
Kostya Serebryany
11186e1752 [libFuzzer] implement strncmp hook for data-flow-guided fuzzing (w/ and w/o dfsan), add a test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243611 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-30 02:33:45 +00:00
Lang Hames
7c8bec314a [MCJIT] Fix a memory leak in a unit test that was introduced in r243589.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243609 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-30 02:05:37 +00:00
Kostya Serebryany
c01d39e6b8 [libFuzzer] implement memcmp hook for data-flow-guided fuzzing (w/o dfsan), extend the memcmp fuzzer test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243603 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-30 01:34:58 +00:00
Pete Cooper
b1d5086803 Prefix make_reverse_iterator with llvm namespace.
This was fallout from r243581.  Turns out C++14 has make_reverse_iterator.

Thanks to Filipe and David for the quick fix suggestion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243598 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-30 00:40:42 +00:00
Sanjay Patel
b7177b045f push fast-math check for machine-combiner reassociations into instruction-type check; NFC
This makes it simpler to add instruction types that don't depend on fast-math.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243596 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-30 00:04:21 +00:00
Matthias Braun
6821f63c91 IR: Implement Value::mergeUseLists() iteratively
This avoids stack overflows when the the compiler does not perform tail call
elimination. Apparently this happens for MSVC with the /Ob2 switch which
may be used by external code including this header.

Reported by and based on a patch from Jean-Francois Riendeau.

Related to rdar://21900756

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243590 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-29 23:22:48 +00:00
Lang Hames
7fe1972500 [MCJIT] Fix PR20656 by teaching MCJIT to honor ExecutionEngine's global mapping.
This is important for users of the C API who can't supply custom symbol
resolvers yet.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243589 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-29 23:12:33 +00:00
Nick Lewycky
6fc1adf9c7 Fix typo "fuction" noticed in comments in AssumptionCache.h, and also all the other files that have the same typo. All comments, no functionality change! (Merely a "fuctionality" change.)
Bonus change to remove emacs major mode marker from SystemZMachineFunctionInfo.cpp because emacs already knows it's C++ from the extension. Also fix typo "appeary" in AMDGPUMCAsmInfo.h.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243585 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-29 22:32:47 +00:00
Frederic Riss
3134cebe28 [dsymutil] Re-add command line option -v this time printing the version.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243584 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-29 22:29:50 +00:00
Frederic Riss
ba72b708c1 [dsymutil] Use option categories.
Prevent all the unrelated LLVM options to appear in the -help output
by introducing a tool specific option category. As a drive-by improve
the wording of the help message.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243583 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-29 22:29:46 +00:00
Frederic Riss
2096f62462 [dsymutil] Rename -v option to -verbose
The dsymutil-classic -v option dumps the tool version rather than
putting it in verbose mode. Rename -v to -verbose and update the
tests that use it (in the process removing it from a few tests that
didn't require it anymore since the -dump-debug-map option was
introduced).
A followup commit will reintroduce the -v option that dumps the
version.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243582 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-29 22:29:34 +00:00
Pete Cooper
639ec3da92 Reapply "Add reverse(ContainerTy) range adapter."
This reverts commit r243567, which ultimately reapplies r243563.

The fix here was to use std::enable_if for overload resolution.  Thanks to David
Blaikie for lots of help on this, and for the extra tests!

Original commit message follows:

For cases where we needed a foreach loop in reverse over a container,
we had to do something like

 for (const GlobalValue *GV : make_range(TypeInfos.rbegin(),
                                         TypeInfos.rend())) {

This provides a convenience method which shortens this to

 for (const GlobalValue *GV : reverse(TypeInfos)) {

There are 2 versions of this, with a preference to the rbegin() version.

The first uses rbegin() and rend() to construct an iterator_range.

The second constructs an iterator_range from the begin() and end() methods
wrapped in std::reverse_iterator's.

Reviewed by David Blaikie.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243581 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-29 22:19:09 +00:00
Eric Christopher
b026a8ade1 Rename hasCompatibleFunctionAttributes->areInlineCompatible based
on suggestions. Currently the function is only used for inline purposes
and this is more descriptive for the use.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243578 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-29 22:09:48 +00:00
Simon Pilgrim
f66eda96eb [X86][SSE] Keep 32-bit target i64 vector shifts on SSE unit.
This patch improves the 32-bit target i64 constant matching to detect the shuffle vector splats that are introduced by i64 vector shift vectorization (D8416).

Differential Revision: http://reviews.llvm.org/D11327

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243577 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-29 21:44:27 +00:00
Tim Northover
3614662adb AArch64: use 32-bit MOV rather than UBFX to truncate registers.
It's potentially more efficient on Cyclone, and from the optimization guides &
schedulers looks like it has no effect on Cortex-A53 or A57. In general you'd
expect a MOV to be about the most efficient instruction with its semantics,
even though the official "UXTW" alias is really a UBFX.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243576 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-29 21:34:32 +00:00
Alex Lorenz
81474d36a0 MIR Serialization: Serialize the frame info's save and restore points.
This commit serializes the save and restore machine basic block references from
the machine frame information class.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243575 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-29 21:09:09 +00:00
Alex Lorenz
3b4ca38ce1 MIR Parser: Extract the code that parses MBB references into a new method. NFC.
This commit extracts the code that's used by the class 'MIRParserImpl' to parse
the machine basic block references into a new method named 'parseMBBReference'.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243572 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-29 20:57:11 +00:00
Simon Pilgrim
5ff91d8781 [X86][SSE] Vectorize i64 ASHR operations
This patch vectorizes the v2i64/v4i64 ASHR shift operations - the last remaining integer vector shifts that are still being transferred to/from the scalar unit to be completed.

Differential Revision: http://reviews.llvm.org/D11439

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243569 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-29 20:31:45 +00:00
Pete Cooper
c54abc96f8 Revert "Add reverse(ContainerTy) range adapter."
This reverts commit r243563.

The GCC buildbots were extremely unhappy about this.  Reverting while
we discuss a better way of doing overload resolution.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243567 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-29 20:29:10 +00:00
David Blaikie
0552dc73a4 [opaque pointers] Remove use of PointerType::getElementType in favor of GEPOperator::getSourceElementType
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243566 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-29 20:26:23 +00:00
Pete Cooper
a53ce4e0be Add reverse(ContainerTy) range adapter.
For cases where we needed a foreach loop in reverse over a container,
we had to do something like

  for (const GlobalValue *GV : make_range(TypeInfos.rbegin(),
                                          TypeInfos.rend())) {

This provides a convenience method which shortens this to

  for (const GlobalValue *GV : reverse(TypeInfos)) {

There are 2 versions of this, with a preference to the rbegin() version.

The first uses rbegin() and rend() to construct an iterator_range.

The second constructs an iterator_range from the begin() and end() methods
wrapped in std::reverse_iterator's.

Reviewed by David Blaikie.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243563 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-29 20:00:39 +00:00
Alexey Samsonov
67e53da671 [ASan] Disable dynamic alloca and UAR detection in presence of returns_twice calls.
Summary:
returns_twice (most importantly, setjmp) functions are
optimization-hostile: if local variable is promoted to register, and is
changed between setjmp() and longjmp() calls, this update will be
undone. This is the reason why "man setjmp" advises to mark all these
locals as "volatile".

This can not be enough for ASan, though: when it replaces static alloca
with dynamic one, optionally called if UAR mode is enabled, it adds a
whole lot of SSA values, and computations of local variable addresses,
that can involve virtual registers, and cause unexpected behavior, when
these registers are restored from buffer saved in setjmp.

To fix this, just disable dynamic alloca and UAR tricks whenever we see
a returns_twice call in the function.

Reviewers: rnk

Subscribers: llvm-commits, kcc

Differential Revision: http://reviews.llvm.org/D11495

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243561 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-29 19:36:08 +00:00
Colin LeMahieu
55e9a41ac8 [llvm-objdump] Inverting logic to match the word "predicate". Returning true when we want it rather than when we want to discard it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243558 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-29 19:21:13 +00:00
Colin LeMahieu
154b3f0725 [llvm-objdump] Merging MachO DumpSections in to FilterSections. Simplifying some predicate logic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243556 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-29 19:08:10 +00:00
Jingyue Wu
7e90f694b6 Roll forward r242871
r242871 missed one place that should be guarded with isPhysicalReg. This patch
fixes that.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243555 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-29 18:59:09 +00:00
Alex Lorenz
dd741a8795 MIR Serialization: Serialize the '.cfi_def_cfa' CFI instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243554 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-29 18:57:23 +00:00
Alex Lorenz
0b7483edda MIR Parser: Parse multiple LHS register machine operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243553 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-29 18:51:21 +00:00
Sanjay Patel
7a641cc940 move DAGCombiner's allowableAlignment() helper function into the TLI
Making allowableAlignment() more accessible was suggested as a predecessor patch
for D10662, so I've pulled it into TargetLowering. This let's us remove 4 instances
of duplicate logic in LegalizeDAG.

There's a subtle functional change in the implementation: the existing 
allowableAlignment() code was using getPrefTypeAlignment() when checking 
alignment with the DataLayout and assumed that was fast. In this implementation,
we use getABITypeAlignment() and assume that is fast. See the TODO comment or the
discussion in the Phab review for future improvements in this implementation
(don't use the data layout at all).

There are no regression test changes from this difference, and I'm not sure how to
expose it via a test. I think we actually do want to provide the 'Fast' param when
checking this from DAGCombiner::MergeConsecutiveStores(). Ie, we shouldn't merge 
stores if the new stores are not going to be fast. But that change will require 
fixing allowsMisalignedMemoryAccess() overrides as noted in D10662.

Differential Revision: http://reviews.llvm.org/D10905



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243549 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-29 18:24:18 +00:00