Commit Graph

21710 Commits

Author SHA1 Message Date
Bill Wendling
ddc3c96465 Merging r195636:
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r195636 | aemerson | 2013-11-25 03:24:18 -0800 (Mon, 25 Nov 2013) | 2 lines

Revert r195599 as it broke the builds.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195671 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-25 18:07:39 +00:00
Daniel Sanders
975e958dbc Merging r195635:
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r195635 | dsanders | 2013-11-25 11:14:43 +0000 (Mon, 25 Nov 2013) | 19 lines

Fixed tryFoldToZero() for vector types that need expansion.

Summary:
Moved the requirement for SelectionDAG::getConstant() to return legally
typed nodes slightly earlier. There were two optional DAGCombine passes
that were missed out and were required to produce type-legal DAGs.

Simplified a code-path in tryFoldToZero() to use SelectionDAG::getConstant().
This provides support for both promoted and expanded vector types whereas the
previous code only supported promoted vector types.

Fixes a "Type for zero vector elements is not legal" assertion detected by
an llvm-stress generated test.

Reviewers: resistor

CC: llvm-commits

Differential Revision: http://llvm-reviews.chandlerc.com/D2251
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195651 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-25 15:53:39 +00:00
Bill Wendling
c844be2422 Merging r195591:
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r195591 | haoliu | 2013-11-24 17:53:26 -0800 (Sun, 24 Nov 2013) | 5 lines

Fixed a bug about disassembling AArch64 post-index load/store single element instructions.
ie. echo "0x00 0x04 0x80 0x0d" | ../bin/llvm-mc -triple=aarch64 -mattr=+neon -disassemble
    echo "0x00 0x00 0x80 0x0d" | ../bin/llvm-mc -triple=aarch64 -mattr=+neon -disassemble
will be disassembled into the same instruction st1 {v0b}[0], [x0], x0.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195619 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-25 06:23:37 +00:00
Bill Wendling
e8bb6e26b8 Merging r195330:
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r195330 | apazos | 2013-11-21 00:16:15 -0800 (Thu, 21 Nov 2013) | 5 lines

Implemented Neon scalar vdup_lane intrinsics.

Fixed scalar dup alias and added test case.


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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195612 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-25 05:38:48 +00:00
Bill Wendling
83a5c7898e Merging r195327:
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r195327 | apazos | 2013-11-20 23:37:04 -0800 (Wed, 20 Nov 2013) | 6 lines

Implemented Neon scalar by element intrinsics.

Intrinsics implemented: vqdmull_lane, vqdmulh_lane, vqrdmulh_lane,
vqdmlal_lane, vqdmlsl_lane scalar Neon intrinsics.


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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195611 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-25 05:38:27 +00:00
Bill Wendling
fd76325f8a Merging r195514:
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r195514 | tstellar | 2013-11-22 15:07:58 -0800 (Fri, 22 Nov 2013) | 6 lines

R600/SI: Fixing handling of condition codes

We were ignoring the ordered/onordered bits and also the signed/unsigned
bits of condition codes when lowering the DAG to MachineInstrs.

NOTE: This is a candidate for the 3.4 branch.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195609 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-25 05:36:37 +00:00
Bill Wendling
e96466ecc0 Merging r195493:
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r195493 | arsenm | 2013-11-22 11:24:39 -0800 (Fri, 22 Nov 2013) | 6 lines

StructurizeCFG: Fix verification failure with some loops.

If the beginning of the loop was also the entry block
of the function, branches were inserted to the entry block
which isn't allowed. If this occurs, create a new dummy
function entry block that branches to the start of the loop.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195606 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-25 05:23:10 +00:00
Bill Wendling
215aad562c Merging r195492:
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r195492 | arsenm | 2013-11-22 11:24:37 -0800 (Fri, 22 Nov 2013) | 1 line

StructurizeCFG: Fix inverting a branch on an argument
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2013-11-25 05:22:53 +00:00
Bill Wendling
f02a188899 Merging r195491:
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r195491 | probinson | 2013-11-22 11:11:24 -0800 (Fri, 22 Nov 2013) | 11 lines

Teach ISel not to optimize 'optnone' functions (revised).

Improvements over r195317:
- Set/restore EnableFastISel flag instead of just running FastISel within
  SelectAllBasicBlocks; the flag is checked in various places, and
  FastISel won't run properly if those places don't do the right thing.
- Test looks for normal ISel versus FastISel behavior, and not
  something more subtle that doesn't work everywhere.

Based on work by Andrea Di Biagio.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195604 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-25 05:21:50 +00:00
Bill Wendling
3343ddf466 Merging r195477:
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r195477 | rafael | 2013-11-22 09:58:12 -0800 (Fri, 22 Nov 2013) | 13 lines

Add a fixed version of r195470 back.

The fix is simply to use CurI instead of I when handling aliases to
avoid accessing a invalid iterator.

original message:

Convert linkonce* to weak* instead of strong.

Also refactor the logic into a helper function. This is an important improve
on mingw where the linker complains about mixed weak and strong symbols.
Converting to weak ensures that the symbol is not dropped, but keeps in a
comdat, making the linker happy.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195603 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-25 05:20:58 +00:00
Bill Wendling
16f81f7832 Merging r195476:
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r195476 | hliao | 2013-11-22 09:56:57 -0800 (Fri, 22 Nov 2013) | 6 lines

Fix PR18014

- When simplifying the mask generation for BLEND, check whether that mask is
  also consumed by other non-BLEND insns. If true, skip that simplification.


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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195602 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-25 05:20:10 +00:00
Bill Wendling
e1679735d6 Merging r195599:
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r195599 | void | 2013-11-24 21:01:21 -0800 (Sun, 24 Nov 2013) | 4 lines

Don't look past volatile loads.

A volatile load should block us from trying to coalesce stores.
PR18023
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195600 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-25 05:02:20 +00:00
Bill Wendling
0162226db8 Merging r195439:
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r195439 | kcc | 2013-11-22 02:30:39 -0800 (Fri, 22 Nov 2013) | 3 lines

Revert r195318 as it causes miscompilation (PR18029)


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2013-11-22 18:01:22 +00:00
Richard Sandiford
92ee08fbc2 Add file missing from r195474.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195475 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-22 17:37:52 +00:00
Richard Sandiford
fff1ff9191 Merging r195473:
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r195473 | rsandifo | 2013-11-22 17:28:28 +0000 (Fri, 22 Nov 2013) | 10 lines

[SystemZ] Fix TMHH and TMHL usage for z10 with -O0

I've no idea why I decided to handle TMxx differently from all the other
high/low logic operations, but it was a stupid thing to do.  The high
registers aren't available as separate 32-bit registers on z10,
so subreg_h32 can't be used on a GR64 there.

I've normally been testing with z196 and with -O3 and so hadn't noticed
this until now.

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2013-11-22 17:37:28 +00:00
Bill Wendling
f0061998dd Merging r195398:
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r195398 | tstellar | 2013-11-21 16:41:05 -0800 (Thu, 21 Nov 2013) | 7 lines

SelectionDAG: Optimize expansion of vec_type = BITCAST scalar_type

The legalizer can now do this type of expansion for more
type combinations without loading and storing to and
from the stack.

NOTE: This is a candidate for the 3.4 branch.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195414 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-22 05:18:23 +00:00
Bill Wendling
54075bbea7 Merging r195339:
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r195339 | chapuni | 2013-11-21 02:55:15 -0800 (Thu, 21 Nov 2013) | 5 lines

Revert r195317 (and r195333), "Teach ISel not to optimize 'optnone' functions."

It broke, at least, i686 target. It is reproducible with "llc -mtriple=i686-unknown".

FYI, it didn't appear to add either "-O0" or "-fast-isel".
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2013-11-21 20:18:40 +00:00
Bill Wendling
11d31dff58 Merging r195333:
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r195333 | kcc | 2013-11-21 01:28:16 -0800 (Thu, 21 Nov 2013) | 1 line

add 'REQUIRES: asserts' to a test that uses 'llc -debug'; this fixes the no-asserts build
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195374 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-21 20:06:33 +00:00
Daniel Sanders
4e2d2f091e Merging r195355:
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r195355 | dsanders | 2013-11-21 13:24:49 +0000 (Thu, 21 Nov 2013) | 20 lines

Add support for legalizing SETNE/SETEQ by inverting the condition code and the result of the comparison.

Summary:
LegalizeSetCCCondCode can now legalize SETEQ and SETNE by returning the inverse
condition and requesting that the caller invert the result of the condition.

The caller of LegalizeSetCCCondCode must handle the inverted CC, and they do
so as follows:
  SETCC, BR_CC:
    Invert the result of the SETCC with SelectionDAG::getNOT()
  SELECT_CC:
    Swap the true/false operands.

This is necessary for MSA which lacks an integer SETNE instruction.

Reviewers: resistor

CC: llvm-commits

Differential Revision: http://llvm-reviews.chandlerc.com/D2229
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195363 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-21 15:03:54 +00:00
Bill Wendling
0a0da619eb Merging r195317:
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r195317 | probinson | 2013-11-20 22:33:32 -0800 (Wed, 20 Nov 2013) | 4 lines

Teach ISel not to optimize 'optnone' functions.

Based on work by Andrea Di Biagio.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195321 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-21 07:11:48 +00:00
Bill Wendling
ade90c9f1d Merging r195272:
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r195272 | hfinkel | 2013-11-20 12:54:55 -0800 (Wed, 20 Nov 2013) | 4 lines

PPC popcnt[dw] do not have record forms

The instruction definitions incorrectly specified that popcntd and popcntw have
record forms; they do not. This mistake was causing invalid code generation.
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2013-11-21 07:07:01 +00:00
Bill Wendling
8ae03404a3 Merging r195318:
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r195318 | void | 2013-11-20 23:04:30 -0800 (Wed, 20 Nov 2013) | 29 lines

The basic problem is that some mainstream programs cannot deal with the way
clang optimizes tail calls, as in this example:

int foo(void);
int bar(void) {
 return foo();
}

where the call is transformed to:

  calll .L0$pb
.L0$pb:
  popl  %eax
.Ltmp0:
  addl  $_GLOBAL_OFFSET_TABLE_+(.Ltmp0-.L0$pb), %eax
  movl  foo@GOT(%eax), %eax
  popl  %ebp
  jmpl  *%eax                   # TAILCALL

However, the GOT references must all be resolved at dlopen() time, and so this
approach cannot be used with lazy dynamic linking (e.g. using RTLD_LAZY), which
usually populates the PLT with stubs that perform the actual resolving.

This patch changes X86TargetLowering::LowerCall() to skip tail call
optimization, if the called function is a global or external symbol.

Patch by Dimitry Andric!

PR15086
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2013-11-21 07:05:41 +00:00
Petar Jovanovic
0ff917e854 Merging r195157:
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r195157 | petarj | 2013-11-19 22:56:00 +0100 (Tue, 19 Nov 2013) | 8 lines

[mips] Resolve relocation for the stubs in MCJIT when load address is known

Instead of processing relocation for branch to stubs right away, emit a
modified relocation and add it to queue to be resolved later when final load
address is known.
This resolves seven MIPS MCJIT issues that were caused by missing relocation
fixups at the end.

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2013-11-21 00:52:34 +00:00
Bill Wendling
dd9c5e98c8 Merging r195162:
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r195162 | arnolds | 2013-11-19 14:20:20 -0800 (Tue, 19 Nov 2013) | 12 lines

SLPVectorizer: Fix stale for Value pointer array

We are slicing an array of Value pointers and process those slices in a loop.
The problem is that we might invalidate a later slice by vectorizing a former
slice.

Use a WeakVH to track the pointer. If the pointer is deleted or RAUW'ed we can
tell.

The test case will only fail when running with libgmalloc.

radar://15498655
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2013-11-20 06:28:12 +00:00
Bill Wendling
a87a147ee7 Merging r195152:
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r195152 | jacksprat | 2013-11-19 12:53:28 -0800 (Tue, 19 Nov 2013) | 1 line

reverts 195057 per request
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2013-11-20 06:21:08 +00:00
Bill Wendling
2af1d85c5d Merging r195129:
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r195129 | mcinally | 2013-11-19 06:36:00 -0800 (Tue, 19 Nov 2013) | 2 lines

Fix assembly operands for the SSE2 cvtsd2ss instruction.

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2013-11-20 06:17:43 +00:00
Bill Wendling
43f41cc550 Merging r195118:
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r195118 | chandlerc | 2013-11-19 01:03:18 -0800 (Tue, 19 Nov 2013) | 22 lines

Fix an issue where SROA computed different results based on the relative
order of slices of the alloca which have exactly the same size and other
properties. This was found by a perniciously unstable sort
implementation used to flush out buggy uses of the algorithm.

The fundamental idea is that findCommonType should return the best
common type it can find across all of the slices in the range. There
were two bugs here previously:

1) We would accept an integer type smaller than a byte-width multiple,
   and if there were different bit-width integer types, we would accept
   the first one. This caused an actual failure in the testcase updated
   here when the sort order changed.
2) If we found a bad combination of types or a non-load, non-store use
   before an integer typed load or store we would bail, but if we found
   the integere typed load or store, we would use it. The correct
   behavior is to always use an integer typed operation which covers the
   partition if one exists.

While a clever debugging sort algorithm found problem #1 in our existing
test cases, I have no useful test case ideas for #2. I spotted in by
inspection when looking at this code.
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2013-11-20 06:15:56 +00:00
Bill Wendling
9584f0352b Merging r195100:
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r195100 | djasper | 2013-11-18 20:26:05 -0800 (Mon, 18 Nov 2013) | 6 lines

Add .clang-format without column limit to subdirectory tests/.

A column limit in the test folder can lead to trouble as the RUN, CHECK,
etc. comments can potentially be broken over multiple lines changing
their meaning. Without column limit, clang-format will simply keep the
test author's line breaks.
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2013-11-19 06:39:18 +00:00
Bill Wendling
1070c0a336 Merging r195094:
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r195094 | atrick | 2013-11-18 19:29:59 -0800 (Mon, 18 Nov 2013) | 3 lines

Use symbolic operands in the patchpoint folding routine and fix a spilling bug.

Fixes <rdar://15487687> [JS] AnyRegCC argument ends up being spilled
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195113 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-19 06:37:03 +00:00
Hao Liu
36c7806f4e Implement AArch64 neon instructions class SIMD lsone and SIMD lone-post.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195078 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-19 02:17:05 +00:00
Jiangning Liu
f11b55c5cc Implement AArch64 SISD intrinsics for vget_high and vget_low.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195074 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-19 01:46:48 +00:00
Kevin Qin
282a979ddd implement MC layer of AArch64 neon instruction PMULL and PMULL2 with 128 bit integer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195072 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-19 01:40:25 +00:00
Jiangning Liu
01dd5728cc Add predicate for AArch64 crypto instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195071 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-19 01:38:31 +00:00
Jack Carter
e53969b475 [Mips] Support for MicroMips STO refactoring.
No true functional changes.

Change the "hack" name of emitMipsHackSTOCG to emitSymSTO.

Remove demonstration code in AsmParser for emitMipsHackSTOCG and
emitMipsHackELFFlags. The STO field is in an ELF symbol and is not
an explicit directive. That said, we are missing the compliment call
in AsmParser and that will need to be addressed soon.

XFAIL dummy tests for emitMipsHackELFFlags and emitMipsHackELFFlags.
These will built out with following patches.


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2013-11-19 01:25:18 +00:00
David Blaikie
26efdc5621 llvm-dwarfdump: support for emitting only the debug_types section using -debug-dump
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195063 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-19 00:29:42 +00:00
Reid Kleckner
a7b7a7d629 Revert "COFF: Emit all MCSymbols rather than filtering out some of them"
This reverts commit r190888, to fix PR17967.  The original change wasn't
the right way to get @feat.00 into the object file.  The right fix is to
make @feat.00 be a global symbol.

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2013-11-18 23:08:12 +00:00
Adrian Prantl
940267e7f2 Debug info: Let LowerDbgDeclare perfom the dbg.declare -> dbg.value
lowering only for load/stores to scalar allocas. The resulting values
confuse the backend and don't add anything because we can describe
array-allocas with a dbg.declare intrinsic just fine.

rdar://problem/15464571

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2013-11-18 23:04:38 +00:00
Paul Robinson
fe45fd084d The 'optnone' attribute means don't inline anything into this function
(except functions marked always_inline).
Functions with 'optnone' must also have 'noinline' so they don't get
inlined into any other function.

Based on work by Andrea Di Biagio.


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2013-11-18 21:44:03 +00:00
Matt Arsenault
3560dd2dcd R600/SI: Fix moveToVALU when the first operand is VSrc.
Moving into a VSrc doesn't always work, since it could be
replaced with an SGPR later.

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2013-11-18 20:09:55 +00:00
Matt Arsenault
9bc4b2c0da R600/SI: Fix multiple SGPR reads when using VCC.
No other SGPR operands are allowed, so if VCC is
used, move the other to a VGPR.

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2013-11-18 20:09:50 +00:00
Matt Arsenault
e64a289609 R600/SI: Implement add i64, but do not yet enable.
Test doesn't actually check the output. I need
to fix add i64 being matched for the addressing
calculations.

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2013-11-18 20:09:47 +00:00
Matt Arsenault
3e38856f04 R600/SI: Move patterns to match add / sub to scalar instructions
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2013-11-18 20:09:29 +00:00
Tom Stellard
b570599c8f R600: Enable the IR structurizer by default
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2013-11-18 19:43:44 +00:00
Tom Stellard
44248e0f63 R600: Fix a crash in the AMDILCFGStrucurizer
The ifPatternMatch() function was not correctly reporting the number
of matches in some cases.

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2013-11-18 19:43:38 +00:00
Tom Stellard
204c953cd5 R600/SI: Fix illegal VGPR->SGPR copy inside of loop
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195026 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-18 18:50:20 +00:00
Tom Stellard
bf9ddd5e8f R600/SI: Fix another case of illegal VGPR->SGPR copy
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195025 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-18 18:50:15 +00:00
Alexey Samsonov
64409ad8e3 [ASan] Fix PR17867 - make sure ASan doesn't crash if use-after-scope and use-after-return are combined.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195014 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-18 14:53:55 +00:00
NAKAMURA Takumi
874081c8fa [PR17978] Mark two ARM/fast-isel tests as XFAIL:vg_leak due to GV.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195010 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-18 13:50:19 +00:00
Arnold Schwaighofer
07a3c481c6 LoopVectorizer: Extend the induction variable to a larger type
In some case the loop exit count computation can overflow. Extend the type to
prevent most of those cases.

The problem is loops like:
int main ()
{
  int a = 1;
  char b = 0;
  lbl:
    a &= 4;
    b--;
    if (b) goto lbl;
  return a;
}

The backedge count is 255. The induction variable type is i8. If we add one to
255 to get the exit count we overflow to zero.

To work around this issue we extend the type of the induction variable to i32 in
the case of i8 and i16.

PR17532

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195008 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-18 13:14:32 +00:00
Daniel Sanders
23427207ea [mips] Fix 'ran out of registers' in MIPS32 with FP64 when generating code for (ConstantFP 0.0)
Fixed an inappropriate use of BuildPairF64 when compiling for MIPS32 with FP64
which resulted in an impossible constraint on the register allocation. It now
uses BuildPairF64_64.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195007 91177308-0d34-0410-b5e6-96231b3b80d8
2013-11-18 13:12:43 +00:00