Commit Graph

115126 Commits

Author SHA1 Message Date
Michael Liao
de3983775e [SwitchLowering] Remove incoming values in the reverse order
- To prevent invalidating *successive* indices.
 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232510 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 18:03:10 +00:00
Adam Nemet
5a6068638e [docs] Fix copy-and-paste bug in def-use example
This appeared when the example was converted to use range-based loop in
r207755.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232509 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 17:51:58 +00:00
David Blaikie
25e7243eda Fix GCC -Wparentheses warning (& reformat now that the precedence is fixed)
Benign warning (clang deliberately suppresses this case) but does
regularly produce bad formatting, so it's nice to fix/reformat.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232508 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 17:48:24 +00:00
Duncan P. N. Exon Smith
2f5bc29926 Verifier: Set --verify-debug-info=true by default
r186634 started verifying debug info, and r194986 disabled it by default
because it was too expensive to run the checks on every function (since
most of the graph was reachable from each function).

r206300 moved the checks to module-level to make it cheaper, but there
was already quite a bit of testcase bitrot (and the verifier would only
print `<badref>`) so I guess no one had time to turn it back on.

This does just that.  Upgrade scripts this past autumn and winter
probably fixed some of the bitrot, and this weekend I fixed the verifier
output (r232275, r232417, r232418) and thusly the remaining failing
testcases (r232290, r232415).

This is part of PR22777.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232505 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 17:28:41 +00:00
Kevin Enderby
73cd697dec Add the option, -dis-symname to llvm-objdump used with -macho and
-disassemble to disassemble just one symbol’s instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232503 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 17:10:57 +00:00
Dmitry Vyukov
6e4a97dfce asan: optimization experiments
The experiments can be used to evaluate potential optimizations that remove
instrumentation (assess false negatives). Instead of completely removing
some instrumentation, you set Exp to a non-zero value (mask of optimization
experiments that want to remove instrumentation of this instruction).
If Exp is non-zero, this pass will emit special calls into runtime
(e.g. __asan_report_exp_load1 instead of __asan_report_load1). These calls
make runtime terminate the program in a special way (with a different
exit status). Then you run the new compiler on a buggy corpus, collect
the special terminations (ideally, you don't see them at all -- no false
negatives) and make the decision on the optimization.

The exact reaction to experiments in runtime is not implemented in this patch.
It will be defined and implemented in a subsequent patch.

http://reviews.llvm.org/D8198



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232502 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 16:59:19 +00:00
Reid Kleckner
78158ce3a4 Use an underlying enum type of unsigned to silence a -Wmicrosoft warning about being unable to put (unsigned)-1 into the default underyling type of int
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232498 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 16:50:20 +00:00
Daniel Sanders
4bb6aeb874 [systemz] Distinguish the 'Q', 'R', 'S', and 'T' inline assembly memory constraints.
Summary:
But still handle them the same way since I don't know how they differ on
this target.

No functional change intended.

Reviewers: uweigand

Reviewed By: uweigand

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8251


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232495 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 16:16:14 +00:00
Shankar Easwaran
abc795d1f6 [Object][ELF] ELFEntityIterator : Add operators for random access
Fix review comments from djasper.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232494 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 15:44:20 +00:00
Rafael Espindola
0bea785427 Remove the error prone GetTempSymbol API.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232487 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 15:02:17 +00:00
Samuel Antao
7684e7d987 Fix R0 use in PowerPC VSX store for FastIsel.
The VSX stores are sometimes generated with a undefined index register, causing %noreg to be used and R0 to be emitted later on. The semantics of the VSX store (e.g. stdsdx) requires R0 to be used as base if we want zero to be used in the computation of the effective address instead of the content of R0. This patch checks if no index register was generated and forces R0 to be used as base address.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232486 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 15:00:57 +00:00
Rafael Espindola
6fe99b7d5c Convert the last 4 users of GetTempSymbol to createTempSymbol.
Despite using the same name these are unrelated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232485 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 14:58:47 +00:00
Rafael Espindola
2e59282624 Switch two simple uses of GetTempSymbol to createTempSymbol.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232484 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 14:54:43 +00:00
Rafael Espindola
cebed4aaf1 Use createTempSymbol to avoid collisions instead of an ad hoc method.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232483 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 14:50:32 +00:00
Rafael Espindola
b80d90e9d0 Make EmitFunctionHeader a private helper.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232481 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 14:38:30 +00:00
Daniel Sanders
42c951a74c Re-commit: [hexagon] Distinguish the 'o', 'v', and 'm' inline assembly memory constraints.
Summary:
But still handle them the same way since I don't know how they differ on
this target.

No functional change intended.

Reviewers: kparzysz, adasgupt

Reviewed By: kparzysz, adasgupt

Subscribers: colinl, llvm-commits

Differential Revision: http://reviews.llvm.org/D8204

Like for the PowerPC target, I've had to add 'i' to the constraint mappings in
order to pass 2007-12-17-InvokeAsm.ll. It's not clear why 'i' has historically
been treated as a memory constraint.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232480 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 14:37:39 +00:00
Rafael Espindola
99739705ac Call EmitFunctionHeader just before EmitFunctionBody.
This avoids switching to .AMDGPU.config and back and hardcoding the
section it switches back to.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232479 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 14:34:42 +00:00
Rafael Espindola
e9141ce303 Convert the easy cases of GetTempSymbol to createTempSymbol.
In these cases no code was depending on GetTempSymbol finding an existing
symbol.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232478 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 14:22:31 +00:00
Rafael Espindola
e503379196 Don't duplicate comment from the .h. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232476 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 14:06:24 +00:00
Rafael Espindola
a480f88b3c Move the EH symbol to the asm printer and use it for the SJLJ case too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232475 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 13:57:48 +00:00
Toma Tabacu
f28b151b52 [mips] [IAS] Add support for the XOR $reg,imm pseudo-instruction.
Summary:
This adds a MipsInstAlias which expands to XORi $reg,$reg,imm. For example, "xor $6, 0x3A" should be expanded to "xori $6, $6, 58".
This should work for all MIPS ISAs.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8284

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232473 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 13:17:44 +00:00
Rafael Espindola
03b47b8e5b Remove dead code. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232472 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 13:09:01 +00:00
Rafael Espindola
4d3df54336 Replace a use of GetTempSymbol with createTempSymbol.
This is cleaner and avoids a crash in a corner case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232471 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 12:54:04 +00:00
Daniel Sanders
06c5d245a2 Fix r232466 by adding 'i' to the mappings for inline assembly memory constraints.
It's not completely clear why 'i' has historically been treated as a memory
constraint. According to the documentation, it represents a constant immediate.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232470 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 12:00:04 +00:00
Renato Golin
ce1f16421f [ARM] Add support for ARMV6K subtarget (LLVM)
ARMv6K is another layer between ARMV6 and ARMV6T2. This is the LLVM
side of the changes.

ARMV6 family LLVM implementation.

+-------------------------------------+
| ARMV6                               |
+----------------+--------------------+
| ARMV6M (thumb) | ARMV6K (arm,thumb) | <- From ARMV6K and ARMV6M processors
+----------------+--------------------+    have support for hint instructions
| ARMV6T2 (arm,thumb,thumb2)          |    (SEV/WFE/WFI/NOP/YIELD). They can
+-------------------------------------+    be either real or default to NOP.
| ARMV7 (arm,thumb,thumb2)            |    The two processors also use
+-------------------------------------+    different encoding for them.

Patch by Vinicius Tinti.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232468 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 11:55:28 +00:00
Daniel Sanders
a0a7510711 [ppc] Distinguish the 'es', 'o', 'm', 'Q', 'Z', and 'Zy' inline assembly memory constraints.
Summary:
But still handle them the same way since I don't know how they differ on
this target.

Of these, 'es', and 'Q' do not have backend tests but are accepted by
clang.

No functional change intended. Depends on D8173.

Reviewers: hfinkel

Reviewed By: hfinkel

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8213

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232466 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 11:09:13 +00:00
Yaron Keren
0401f798d1 Teach Twine to support SmallString.
Enable removing .str() member calls for these frequent cases. 

 http://reviews.llvm.org/D6372



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232465 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 09:51:17 +00:00
David Blaikie
c57441f716 Recommit simplification first attempted in r232309 (fixed a bit in r232312, with fixes in r232314)
Messed it up because I didn't realize there were two different iterators
here (& clearly didn't build any of this... ) - still seems easier to
just use the injected class name than introduce a self typedef.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232462 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 05:49:45 +00:00
Ahmed Bougacha
df08543f48 [AArch64] Use intermediate step for concat_vectors of illegal truncs.
Optimize concat_vectors of truncated vectors, where the intermediate
type is illegal, to avoid said illegality,  e.g.,
  (v4i16 (concat_vectors (v2i16 (truncate (v2i64))),
                         (v2i16 (truncate (v2i64)))))
->
  (v4i16 (truncate (v4i32 (concat_vectors (v2i32 (truncate (v2i64))),
                                          (v2i32 (truncate (v2i64)))))))

This isn't really target-specific, and, as such, would best go in the
DAGCombiner.  However, ISD::TRUNCATE legality isn't keyed on both input
and result type, so we might generate worse code when we don't know
better.  On AArch64 we know it's fine for v2i64->v4i16 and v4i32->v8i8.
rdar://20022387


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232459 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 03:23:09 +00:00
Ahmed Bougacha
1c48733f54 [AArch64] Factor out N->getOperand()s; format. NFCI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232458 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 03:19:18 +00:00
Richard Smith
3d8b0caf98 Fix ODR violations caused by putting anonymous namespaces in header files (and
then using the symbols from those anonymous namespaces from outside the
anonymous namespace).

This was "detected" by causing the modules selfhost to fail in some cases.
The corresponding Clang bug was fixed in r232455.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232457 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 02:36:51 +00:00
Shankar Easwaran
64a7eb58cd [Object][ELF] ELFEntityIterator : Add operators for random access
Add operators add/subtract for random access. This is essentially used by
lld.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232453 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 02:12:35 +00:00
Sanjoy Das
505179177b [IRCE] Re-commit tests cases.
Re-commit the test cases added in r232444.  These now use
-irce-print-changed-loops and -irce-print-range-checks so they run
correctly on a without asserts build of llvm.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232452 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 01:40:24 +00:00
Sanjoy Das
71bd86378b [IRCE] Add a -irce-print-range-checks option.
-irce-print-range-checks prints out the set of range checks recognized
by IRCE.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232451 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 01:40:22 +00:00
Duncan P. N. Exon Smith
ed1d6bdfbd MapMetadata: Allow unresolved metadata if it won't change
Allow unresolved nodes through the `MapMetadata()` if
`RF_NoModuleLevelChanges`, since there's no remapping to do anyway.

This fixes PR22929.  I'll add a clang test as a follow-up.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232449 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 01:14:40 +00:00
Sanjoy Das
58d2381868 [IRCE] Delete two tests.
I accidentally checked in two tests that used -debug-only -- these fail
on a release LLVM build.  Temporarily delete these from the repo to keep
the bots green while I fix this locally.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232446 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 00:54:50 +00:00
Sanjoy Das
51c83cddb6 [IRCE] Add comments, NFC.
This change adds some comments that justify why a potentially
overflowing operation is safe.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232445 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 00:42:16 +00:00
Sanjoy Das
eaf8532f7a [IRCE] Support half-range checks.
This change to IRCE gets it to recognize "half" range checks.  Half
range checks are range checks that only either check if the index is
`slt` some positive integer ("length") or if the index is `sge` `0`.

The range solver does not try to be clever / aggressive about solving
half-range checks -- it transforms "I < L" to "0 <= I < L" and "0 <= I"
to "0 <= I < INT_SMAX".  This is safe, but not always optimal.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232444 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 00:42:13 +00:00
Justin Bogner
bdd2212363 llvm-cov: Warn instead of error if a .gcda has arcs from an exit block
Patch by Vanderson M. Rosario. Thanks!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232443 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 00:18:51 +00:00
Duncan P. N. Exon Smith
b47d918825 AsmWriter: Assert on unresolved metadata nodes
Assert that `MDNode::isResolved()`.  While in theory the `Verifier`
should catch this, it doesn't descend into all debug info, and the
`DebugInfoVerifier` doesn't call into the `Verifier`.  Besides, this
helps to catch bugs when `-disable-verify=true`.

Note that I haven't come across a place where this fails with clang
today, so no testcase.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232442 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-17 00:16:35 +00:00
Justin Bogner
6837ab53fb GCOV: Make the exit block placement from r223193 optional
By default we want our gcov emission to stay 4.2 compatible, which
means we need to continue emit the exit block last by default. We add
an option to emit it before the body for users that need it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232438 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-16 23:52:03 +00:00
Peter Collingbourne
4556b1fe22 LowerBitSets: do not use private aliases at all on Darwin.
LLVM currently turns these into linker-private symbols, which can be dead
stripped by the Darwin linker.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232435 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-16 23:36:24 +00:00
Rafael Espindola
7b8bb89ecd Pass in a "const Triple &T" instead of a raw StringRef.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232429 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-16 22:29:29 +00:00
Rafael Espindola
63641de2e6 Remove unused argument. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232428 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-16 22:06:15 +00:00
David Blaikie
712d00bc64 Add testing for mismatched explicit type on a gep operator when loading from bitcode
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232427 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-16 22:03:50 +00:00
David Blaikie
2a83bf6228 Add testing for mismatched explicit type on a load instruction when loading from bitcode
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232424 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-16 21:48:46 +00:00
Rafael Espindola
9130d115d6 There is only one Asm streamer, there is no need for targets to register it.
Instead, have the targets register a TargetStreamer to be use with the
asm streamer (if any).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232423 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-16 21:43:42 +00:00
Justin Bogner
4fefd5cdf4 InstrProf: Fix CoverageMappingReader on big endian
This makes the reader check the endianness of the object file its
given and behave appropriately. For the test I dug up a really old
linker and created a ppc-apple-darwin file for llvm-cov to read.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232422 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-16 21:40:18 +00:00
David Majnemer
759acf348d CodeGen: @llvm.eh.typeid.for replaced @llvm.eh.typeid.for.i32
We removed @llvm.eh.typeid.for.i32 and replaced it with
@llvm.eh.typeid.for quite some time ago.  Fix up some test cases which
never got updated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232421 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-16 21:36:38 +00:00
David Blaikie
f1d4614418 Test bitcode parsing error-handling for incorrect explicit type
(turns out I had regressed this when sinking handling of this type down
into GetElementPtrInst::Create - since that asserted before the error
handling was performed)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232420 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-16 21:35:48 +00:00