Vincent Lejeune
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512119770e
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R600: Schedule copy from phys register at beginning of block
It allows regalloc pass to remove them by trivially assigning associated reg
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183336 91177308-0d34-0410-b5e6-96231b3b80d8
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2013-06-05 20:27:35 +00:00 |
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Vincent Lejeune
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96fe0be43b
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R600: use capital letter for PV channel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183107 91177308-0d34-0410-b5e6-96231b3b80d8
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2013-06-03 15:44:35 +00:00 |
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Vincent Lejeune
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76fc2d077f
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R600: Use bottom up scheduling algorithm
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182129 91177308-0d34-0410-b5e6-96231b3b80d8
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2013-05-17 16:50:56 +00:00 |
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Vincent Lejeune
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92f24d403f
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R600: Prettier asmPrint of Alu
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180956 91177308-0d34-0410-b5e6-96231b3b80d8
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2013-05-02 21:52:30 +00:00 |
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Vincent Lejeune
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e3111964a0
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R600/SI: Use MULADD_IEEE/V_MAD_F32 instruction for mad pattern
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175446 91177308-0d34-0410-b5e6-96231b3b80d8
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2013-02-18 14:11:28 +00:00 |
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