Commit Graph

25 Commits

Author SHA1 Message Date
Eric Christopher
d474181920 ArrayRef-ize the Feature and Processor tables for SubtargetFeatures.
This removes arguments passed everywhere and allows the use of
standard iteration over lists.
Should be no functional change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208127 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-06 20:23:04 +00:00
Artyom Skrobov
85ae0340ba Reverting r199886 (Prevent repetitive warnings for unrecognized processors and features)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200083 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-25 16:56:18 +00:00
Artyom Skrobov
93681fa6c6 Prevent repetitive warnings for unrecognized processors and features
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199886 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-23 11:31:38 +00:00
Will Dietz
4df7c5baa1 MC: Don't assume incoming StringRef's are null terminated.
This can happen when processing command line arguments, which
are often stored as std::string's and later turned into
StringRef's via std::string::data().  Unfortunately this
is not guaranteed to return a null-terminated string
until C++11, causing breakage on platforms that don't do this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192558 91177308-0d34-0410-b5e6-96231b3b80d8
2013-10-13 22:09:26 +00:00
Craig Topper
773c07606e Fix X86 subtarget to not overwrite the autodetected features by calling InitMCProcessorInfo right after detecting them. Instead add a new function that only updates the scheduling model and call that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190919 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-18 05:54:09 +00:00
Chandler Carruth
d04a8d4b33 Use the new script to sort the includes of every file under lib.
Sooooo many of these had incorrect or strange main module includes.
I have manually inspected all of these, and fixed the main module
include to be the nearest plausible thing I could find. If you own or
care about any of these source files, I encourage you to take some time
and check that these edits were sensible. I can't have broken anything
(I strictly added headers, and reordered them, never removed), but they
may not be the headers you'd really like to identify as containing the
API being implemented.

Many forward declarations and missing includes were added to a header
files to allow them to parse cleanly when included first. The main
module rule does in fact have its merits. =]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169131 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-03 16:50:05 +00:00
Craig Topper
8e8f8724e1 Fix doxygen comment to match function name.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165094 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-03 06:47:18 +00:00
Andrew Trick
34aadd6334 Replaced ReInitMCSubtargetInfo with InitMCProcessor.
Now where we used to call ReInitMCSubtargetInfo, we actually recompute
the same information as InitMCSubtargetInfo instead of only setting
the feature bits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164105 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-18 05:33:15 +00:00
Andrew Trick
34301ceca8 TargetSchedModel API. Implement latency lookup, disabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164098 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-18 04:03:34 +00:00
Andrew Trick
e127dfd0b1 TableGen subtarget emitter. Initialize MCSubtargetInfo with the new machine model.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164092 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-18 03:18:56 +00:00
Andrew Trick
e1b5328717 Revert r164061-r164067. Most of the new subtarget emitter.
I have to work out the Target/CodeGen header dependencies
before putting this back.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164072 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-17 23:00:42 +00:00
Andrew Trick
a2a47d1c50 InitMCProcessor
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164066 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-17 22:19:12 +00:00
Andrew Trick
12886db4a7 TargetSchedModel API. Implement latency lookup, disabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164065 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-17 22:19:08 +00:00
Andrew Trick
db7afac457 TableGen subtarget emitter. Initialize MCSubtargetInfo with the new machine model.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164061 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-17 22:18:55 +00:00
Andrew Trick
99ab6c6035 TargetSchedModel interface. To be implemented...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163934 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14 20:26:46 +00:00
Andrew Trick
72d048b697 Define MC data tables for the new scheduling machine model.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163933 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14 20:26:41 +00:00
Roman Divacky
98eb98b0f2 Constify subtarget info properly so that we dont cast away the const in
the SubtargetInfoKV tables. Found by gcc48 -Wcast-qual.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163251 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 21:43:57 +00:00
Andrew Trick
2661b411cc I'm introducing a new machine model to simultaneously allow simple
subtarget CPU descriptions and support new features of
MachineScheduler.

MachineModel has three categories of data:
1) Basic properties for coarse grained instruction cost model.
2) Scheduler Read/Write resources for simple per-opcode and operand cost model (TBD).
3) Instruction itineraties for detailed per-cycle reservation tables.

These will all live side-by-side. Any subtarget can use any
combination of them. Instruction itineraries will not change in the
near term. In the long run, I expect them to only be relevant for
in-order VLIW machines that have complex contraints and require a
precise scheduling/bundling model. Once itineraries are only actively
used by VLIW-ish targets, they could be replaced by something more
appropriate for those targets.

This tablegen backend rewrite sets things up for introducing
MachineModel type #2: per opcode/operand cost model.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159891 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-07 04:00:00 +00:00
Andrew Trick
a11a6287a5 Tweak spelling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159889 91177308-0d34-0410-b5e6-96231b3b80d8
2012-07-07 03:59:48 +00:00
Andrew Trick
fc992996f7 misched: Added MultiIssueItineraries.
This allows a subtarget to explicitly specify the issue width and
other properties without providing pipeline stage details for every
instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157979 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-05 03:44:40 +00:00
Evan Cheng
59ee62d241 - Eliminate MCCodeEmitter's dependency on TargetMachine. It now uses MCInstrInfo
and MCSubtargetInfo.
- Added methods to update subtarget features (used when targets automatically
  detect subtarget features or switch modes).
- Teach X86Subtarget to update MCSubtargetInfo features bits since the
  MCSubtargetInfo layer can be shared with other modules.
- These fixes .code 16 / .code 32 support since mode switch is updated in
  MCSubtargetInfo so MC code emitter can do the right thing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134884 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-11 03:57:24 +00:00
Evan Cheng
ffc0e73046 Change createAsmParser to take a MCSubtargetInfo instead of triple,
CPU, and feature string. Parsing some asm directives can change
subtarget state (e.g. .code 16) and it must be reflected in other
modules (e.g. MCCodeEmitter). That is, the MCSubtargetInfo instance
must be shared.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134795 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-09 05:47:46 +00:00
Evan Cheng
0ddff1b535 Compute feature bits at time of MCSubtargetInfo initialization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134606 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-07 07:07:08 +00:00
Evan Cheng
2416b89621 Add getFeatureBits to extract feature bits for a given CPU.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134298 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-02 00:43:44 +00:00
Evan Cheng
94214703d9 - Added MCSubtargetInfo to capture subtarget features and scheduling
itineraries.
- Refactor TargetSubtarget to be based on MCSubtargetInfo.
- Change tablegen generated subtarget info to initialize MCSubtargetInfo
  and hide more details from targets.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134257 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-01 20:45:01 +00:00