Bill Wendling
80caf9c273
Add a comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145896 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 01:57:48 +00:00
Jim Grosbach
cb86509e7a
Tidy up value checking.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145895 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 01:53:17 +00:00
NAKAMURA Takumi
6482e91149
MipsAsmBackend.cpp, PPCAsmBackend.cpp: Fix -Asserts build to appease msvc.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145894 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 01:48:32 +00:00
Lang Hames
9ad7e07a0f
Update PBQP's analysis usage to reflect the requirements of the inline spiller.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145893 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 01:45:57 +00:00
Chad Rosier
ed42c5f778
[arm-fast-isel] Doublewords only require word-alignment.
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rdar://10528060
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145891 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 01:44:17 +00:00
Jakob Stoklund Olesen
3e572ac2fb
Align ARM constant pool islands via their basic block.
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Previously, all ARM::CONSTPOOL_ENTRY instructions had a hardwired
alignment of 4 bytes emitted by ARMAsmPrinter. Now the same alignment
is set on the basic block.
This is in preparation of supporting ARM constant pool islands with
different alignments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145890 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 01:43:02 +00:00
Jakob Stoklund Olesen
8c741b8064
Use logarithmic units for basic block alignment.
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This was actually a bit of a mess. TLI.setPrefLoopAlignment was clearly
documented as taking log2(bytes) units, but the x86 target would still
set a preferred loop alignment of '16'.
CodePlacementOpt passed this number on to the basic block, and
AsmPrinter interpreted it as bytes.
Now both MachineFunction and MachineBasicBlock use logarithmic
alignments.
Obviously, MachineConstantPool still measures alignments in bytes, so we
can emulate the thrill of using as.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145889 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 01:26:19 +00:00
Bill Wendling
79df986c60
The compact encoding of the registers are 3-bits each. Make sure we shift the
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value over that much.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145888 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 01:26:14 +00:00
Jim Grosbach
d9a6e8978d
Fix ARM handling of tBcc branch relaxation.
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rdar://10069056
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145885 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 01:08:19 +00:00
Jakob Stoklund Olesen
e80fba0e6c
Use an existing function.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145883 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 00:51:12 +00:00
Jakob Stoklund Olesen
757a3179b2
Fix unclear wording.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145882 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 00:51:09 +00:00
Jim Grosbach
370b78d795
Move target-specific logic out of generic MCAssembler.
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Whether a fixup needs relaxation for the associated instruction is a
target-specific function, as the FIXME indicated. Create a hook for that
and use it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145881 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 00:47:03 +00:00
Nick Lewycky
7c06741004
Expose a switch for the new gcov format.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145880 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 00:29:13 +00:00
Chad Rosier
dce42b75dc
Probably not a good idea to convert a single vector load into a memcpy. We
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don't do this now, but add a test case to prevent this from happening in the
future.
Additional test for rdar://9892684
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145879 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 00:19:08 +00:00
Jim Grosbach
f68a26b5d8
Tidy up. Hard tabs.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145878 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 00:13:09 +00:00
Jim Grosbach
91f2cce231
Tidy up. Hard tabs.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145877 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 00:12:12 +00:00
Nick Lewycky
e229248cb1
All these arguments are default anyways.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145876 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 00:11:58 +00:00
Jim Grosbach
fdedd48624
Tidy up. 80 columns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145875 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 00:11:13 +00:00
Jim Grosbach
f77d5b14af
Switch MCAssembler to method names starting w/ lower-case.
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per http://llvm.org/docs/CodingStandards.html#ll_naming
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145873 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 00:03:48 +00:00
Jim Grosbach
f503ef6800
Simple branch relaxation for Thumb2 Bcc instructions.
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Not right yet, as the rules for when to relax in the MCAssembler aren't
(yet) correct for ARM. This is a step in the proper direction, though.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145871 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05 23:45:46 +00:00
Jim Grosbach
5792051bfc
Tidy up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145870 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05 23:20:14 +00:00
Nick Lewycky
aa21e417f2
Silence tsan false-positives (tsan can't track things which are only safe due to
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memory fences) in statistics registration, which works the same way that
ManagedStatic registration does.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145869 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05 23:07:05 +00:00
Chad Rosier
a4b6fd5be0
Update comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145866 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05 22:53:09 +00:00
Chad Rosier
d8bd26ee24
Make the MemCpyOptimizer a bit more aggressive. I can't think of a scenerio
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where this would be bad as the backend shouldn't have a problem inlining small
memcpys.
rdar://10510150
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145865 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05 22:37:00 +00:00
Jim Grosbach
713c70238c
Tweak ADDrr fix. Bad check for explicit .w
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145863 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05 22:27:04 +00:00
Jim Grosbach
6e507c645d
Update tests for r145860. Add a few new ones.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145861 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05 22:21:28 +00:00
Jim Grosbach
927b9df4c6
Thumb2 prefer ADD register encoding T2 to T3 when possible.
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rdar://10529664
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145860 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05 22:16:39 +00:00
Bill Wendling
9bd5d044b7
Move 'returns_twice' definition into alphabetical place.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145854 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05 21:27:54 +00:00
Akira Hatanaka
d6bc5237d8
Add definitions of 64-bit extract and insert instrucions and make
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PerformANDCombine and PerformOrCombine aware of them. Test cases are included
too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145853 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05 21:26:34 +00:00
Akira Hatanaka
cee46abc16
Split ExtIns into two base classes and have instructions EXT and INS derive from
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them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145852 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05 21:14:28 +00:00
Jim Grosbach
da84786bee
Thumb2 prefer encoding T3 to T4 for ADD/SUB immediate instructions.
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rdar://10529348
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145851 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05 21:06:26 +00:00
Akira Hatanaka
2bf08ec854
Have LowerJumpTable support Mips64. Modify 2010-07-20-Switch.ll to test N64 and
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O32 with relocation-model=pic too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145850 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05 21:03:03 +00:00
Jim Grosbach
253ef7a779
ARM assembly parsing for the rest of the VMUL data type aliases.
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Finish up rdar://10522016.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145846 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05 20:29:59 +00:00
Jim Grosbach
422faab909
Fix previous commit. Oops.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145844 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05 20:12:26 +00:00
Jim Grosbach
45755a77ec
Tidy up. No functional change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145843 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05 20:09:44 +00:00
Jim Grosbach
afb500ace1
ARM assmebler parsing for two-operand VMUL instructions.
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Combined destination and first source operand for f32 variant of the VMUL
(by scalar) instruction.
rdar://10522016
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145842 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05 19:55:46 +00:00
Anna Zaks
e15402f92b
Change the Dominators recalculate() function to only rely on GraphTraits
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This is a patch by Guoping Long!
As part of utilizing LLVM Dominator computation in Clang, made two changes to LLVM dominators tree implementation:
- (1) Change the recalculate() template function to only rely on GraphTraits.
- (2) Add a size() method to GraphTraits template class to query the number of nodes in the graph.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145837 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05 19:17:04 +00:00
Hal Finkel
fef3f9aed3
Add test case - this input used to crash because of duplicate generation of SPILL_CRs
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145820 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05 17:55:22 +00:00
Hal Finkel
3fd0018af1
enable PPC register scavenging by default (update tests and remove some FIXMEs)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145819 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05 17:55:17 +00:00
Hal Finkel
9489487f98
don't include CR bit subregs in callee-saved list
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145818 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05 17:55:12 +00:00
Hal Finkel
c4785181a1
remove wasted space for extra bit copies of CR2 subregs
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145817 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05 17:55:06 +00:00
Hal Finkel
2e313caa36
add register pressure for CR regs
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145816 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05 17:54:17 +00:00
Benjamin Kramer
4da7f90b17
Add a little heuristic to Value::isUsedInBasicBlock to speed it up for small basic blocks.
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- Calling getUser in a loop is much more expensive than iterating over a few instructions.
- Use it instead of the open-coded loop in AddrModeMatcher.
- 5% speedup on ARMDisassembler.cpp Release builds.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145810 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05 17:23:27 +00:00
NAKAMURA Takumi
27de2a54f3
test/CodeGen/X86/pointer-vector.ll: Add explicit -mtriple=i686-linux.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145805 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05 07:54:57 +00:00
Craig Topper
1dc0fbc168
Remove some leftover remnants that once tried to create 64-bit MMX PALIGNR instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145804 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05 07:27:14 +00:00
Craig Topper
beabc6cc6d
Clean up and optimizations to the X86 shuffle lowering code. No functional change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145803 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05 06:56:46 +00:00
Nadav Rotem
1608769abe
Add support for vectors of pointers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145801 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-05 06:29:09 +00:00
Jakub Staszak
8e1b12ae68
Fix table of contents.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145793 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-04 20:44:25 +00:00
Jakub Staszak
b170e2de83
Add 'llvm.expect' intrinsic description.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145792 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-04 18:29:26 +00:00
Eric Christopher
309bedd7bc
Add inline subprogram names to the name lookup table since they may
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not get there any other way.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145789 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-04 06:02:38 +00:00