Kevin Enderby
d5705fe50d
Change X86 disassembly to print immediates values as signed by default. Special
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case those instructions that the immediate is not sign-extend. radr://8795217
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139028 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 20:01:23 +00:00
Jim Grosbach
8e0c7697fd
Tidy up. Formatting.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139024 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 18:46:15 +00:00
Bill Wendling
9dc31e8705
Update comments to reflect reality.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139023 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 18:43:33 +00:00
Jim Grosbach
d2990107a9
Tidy up. 80 columns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139022 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 18:43:25 +00:00
Jim Grosbach
5c1ac55542
Thumb2 parsing and encoding for AND (register).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139021 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 18:41:35 +00:00
Jakob Stoklund Olesen
8040e06434
Simplify by using isFullCopy().
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139019 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 18:18:29 +00:00
Bill Wendling
d199aa012b
Revert r138826 until PR10834 can be fixed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139018 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 18:15:04 +00:00
Jim Grosbach
f0851e5d95
Thumb2 parsing and encoding for ADD (register).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139017 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 18:14:46 +00:00
Duncan Sands
147272b8a7
Darwin wants ctors/dtors to be ordered the other way round to linux.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139015 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 18:07:19 +00:00
Kevin Enderby
98f213cd60
Fix the disassembly of the X86 "crc32w %ax, %eax" instruction. Bug 10702.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139014 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 18:03:03 +00:00
Jim Grosbach
ca52a7e38c
Tests for Thumb2 AND (immediate) instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139013 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 17:44:27 +00:00
Jakub Staszak
9469d5cf48
Extra CHECK-NOT to make sure that GVN transform works properly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139012 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 17:40:39 +00:00
Andrew Trick
dc07321164
-unroll-scev flag removal
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139010 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 17:36:14 +00:00
Andrew Trick
12d1ebe943
Enable SCEV-based unrolling by default.
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This changes loop unrolling to use the same mechanism for trip count
computation as indvars. This is a stronger check that tends to unroll
more loops. A very common side-effect is that many single iteration
loops will be removed sooner. The real goal was simply to remove
dependence on canonical IVs.
x86 is break even.
ARM performance changes to expect (+ is good):
External/SPEC/CFP2000/183.equake/183.equake +13%
SingleSource/Benchmarks/Dhrystone/fldry +21%
MultiSource/Applications/spiff/spiff +3%
SingleSource/Benchmarks/Stanford/Puzzle -14%
The Puzzle regression is actually an improvement in loop optimization
that defeats GVN: rdar://problem/10065079.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139009 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 17:26:28 +00:00
Jim Grosbach
aca878c5e6
Add FIXME. Thumb2 ADR encoding choice is non-trivial.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139008 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 17:21:59 +00:00
Jakub Staszak
8370d91f1e
Return undef value (instead of arbitrary) for wrong or undef index in
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ConstantVector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139007 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 17:01:40 +00:00
Jakub Staszak
4c6b8bee2a
ConstantVector returns arbitrary value for the wrong index.
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This fixes PR10813.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139006 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 15:43:43 +00:00
Jakub Staszak
8cec759339
Compare type size instead of type _store_ size to make sure that BitCastInst
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will be valid. This fixes PR10820.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139005 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 14:57:37 +00:00
Kalle Raiskila
989621f1f8
Pass signed (not unsigned) 10 bit field to SPU 'ori' instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139004 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 10:05:01 +00:00
Craig Topper
5ffedb9352
Make IC_VEX* not inherit from IC_*. Prevents instructions with no VEX form from disassembling to their non-VEX form. Also prevents weak filter collisons that were keeping valid VEX instructions from decoding properly. Make VEX_L* not inherit from VEX_* because the VEX.L bit always important. This stops packed int VEX encodings from being disassembled when specified with VEX.L=1. Fixes PR10831 and PR10806.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138997 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 04:17:54 +00:00
Bill Wendling
24fbb5875c
Perform the upgrading of the old EH to the new EH in a more sane manner.
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Perform the upgrading in steps.
* First, create a map of the invokes to the EH intrinsics.
* Next, take that mapping and determine if the invoke's unwind destination has a
single predecessor. If not, then create a new empty block to hold the new
landingpad instruction.
* Create a landingpad instruction into the uwnind destination. Fill it with the
values from the old selector. Map the old intrinsic calls to the new
landingpad values (there may be multiple landingpad instructions per instrinic
call pairs).
* Go through the old intrinsic calls, create a PHI node when necessary, and then
replace their values with the new values from the landingpad instructions.
* Delete all dead instructions.
* ???
* Profit!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138990 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 01:30:08 +00:00
Bill Wendling
b0b9a67f98
Update to new EH scheme.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138989 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 01:25:11 +00:00
Owen Anderson
a1c110045a
Merge the ARM disassembler header into the implementation file, since it is not externally exposed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138982 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 23:35:51 +00:00
Owen Anderson
a6804444e8
Fix 80 columns violations.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138980 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 23:23:50 +00:00
Dan Gohman
6b13cd4154
Revert r131152, r129796, r129761. This code is currently considered
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to be unreliable on platforms which require memcpy calls, and it is
complicating broader legalize cleanups. It is hoped that these cleanups
will make memcpy byval easier to implement in the future.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138977 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 23:07:08 +00:00
Benjamin Kramer
36a16015ac
Don't drop alignment info on local common symbols.
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- On COFF the .lcomm directive has an alignment argument.
- On ELF we fall back to .local + .comm
Based on a patch by NAKAMURA Takumi.
Fixes PR9337, PR9483 and PR10128.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138976 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 23:04:27 +00:00
Eli Friedman
7df496d2ad
Null-initialize to shut up -Wuninitialized warnings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138974 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 22:27:41 +00:00
James Molloy
ee06443945
Fix apparent build error caused by r138948 on certain versions of GCC with -Werror. Sorry for the inconvenience.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138973 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 22:01:14 +00:00
Bill Wendling
6bb4e7e8e8
Reduce indentation. No functionality change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138968 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 21:29:49 +00:00
Bill Wendling
c8c0fd3993
Change worklist driven deletion to be an iterative process.
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Duncan noticed this!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138967 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 21:28:33 +00:00
Eli Friedman
770e16fe17
Fix test; sorry for any inconvenience.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138966 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 21:25:42 +00:00
Eli Friedman
86b5db8c01
Fix an issue with the IR sink pass found by inspection. (I'm not sure anyone is actually using this, but might as well fix it since I found the issue.)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138965 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 21:21:24 +00:00
Eli Friedman
89e0f4b5b0
Add missing newline.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138964 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 21:20:11 +00:00
Nick Lewycky
833a003da0
Fix the build for us -Werror users.
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Remove broken emacs mode major notation marking a C++ file as C.
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138963 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 21:09:04 +00:00
Eli Friedman
81b4e434d9
Make isSafeToSpeculativelyExecute() return the right answer for some new instructions. Found by inspection; not sure what practical impact, if any, this has.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138962 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 21:03:03 +00:00
Benjamin Kramer
bcf47a5bce
XFAIL this test on arm until the backend is fixed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138955 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 18:40:03 +00:00
Benjamin Kramer
d4f27d7daa
This test depends on cmov being available.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138954 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 18:40:01 +00:00
Jakob Stoklund Olesen
4a0a18af4a
Permit remat of partial register defs when it is safe.
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An instruction may define part of a register where the other bits are
undefined. In that case, it is safe to rematerialize the instruction.
For example:
%vreg2:ssub_0<def> = VLDRS <cp#0>, 0, pred:14, pred:%noreg, %vreg2<imp-def>
The extra <imp-def> operand indicates that the instruction does not read
the other parts of the virtual register, so a remat is safe.
This patch simply allows multiple def operands for the virtual register.
It is MI->readsVirtualRegister() that determines if we depend on a
previous value so remat is impossible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138953 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 18:27:51 +00:00
Jim Grosbach
2f25d9b933
ARM 'rscs' mnemonic is carry-setting 'rsc', not 'rs' with a 'cs' condition code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138952 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 18:22:13 +00:00
Bruno Cardoso Lopes
a39ccdb9d4
Fix vbroadcast matching logic to early unmatch if the node doesn't have
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only one use. Fix PR10825.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138951 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 18:15:06 +00:00
James Molloy
c047dcade5
Fix up r137380 based on post-commit review by Jim Grosbach.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138948 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 18:02:14 +00:00
Owen Anderson
7f17b5a483
t2Bcc is allowed to have a predicate without a preceding IT instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138946 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 17:47:45 +00:00
Jakob Stoklund Olesen
ae779eea27
Revert r138794, "Do not try to rematerialize a value from a partial definition."
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The problem is fixed for all register allocators by r138944, so this
patch is no longer necessary.
<rdar://problem/10032939>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138945 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 17:25:18 +00:00
Jakob Stoklund Olesen
9d548d0343
Prevent remat of partial register redefinitions.
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An instruction that redefines only part of a larger register can never
be rematerialized since the virtual register value depends on the old
value in other parts of the register.
This was fixed for the inline spiller in r138794. This patch fixes the
problem for all register allocators, and includes a small test case.
<rdar://problem/10032939>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138944 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 17:18:50 +00:00
Evan Cheng
61560e205a
Teach MachineLICM reg pressure tracking code to deal with MVT::untyped. Sorry, I can't come up with a small test case. rdar://10043690
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138934 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 01:45:00 +00:00
Bill Wendling
00c30d58a5
Update to new EH scheme.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138933 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 01:28:25 +00:00
Bill Wendling
a8d1393093
Resubmit with fix. Properly remove the instructions except for landingpad, which should be removed only when its invokes are.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138932 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 01:28:11 +00:00
Bill Wendling
c1b4cd6c11
Submitted this too early.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138931 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 01:18:33 +00:00
Bill Wendling
1893cd3131
Don't DCE the landingpad instruction.
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The landingpad instruction can be removed only when its invokes are removed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138930 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 01:16:58 +00:00
Bill Wendling
65088e7d96
Update to new EH scheme.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138928 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 01:08:21 +00:00