Chris Lattner
e21492bc4e
eliminate use of getNode that takes vector<SDOperand>. Wrap a really long line.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29610 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-11 17:19:54 +00:00
Chris Lattner
79e490aa23
Convert vectors to fixed sized arrays and smallvectors. Eliminate use of getNode that takes a vector.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29609 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-11 17:18:05 +00:00
Chris Lattner
325f0a129e
Fix miscompilation of float vector returns. Compile code to this:
...
_func:
vsldoi v2, v3, v2, 12
vsldoi v2, v2, v2, 4
blr
instead of:
_func:
vsldoi v2, v3, v2, 12
vsldoi v2, v2, v2, 4
*** vor f1, v2, v2
blr
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29607 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-11 16:47:32 +00:00
Evan Cheng
64a752f7c7
Match tablegen changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29604 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-11 09:08:15 +00:00
Evan Cheng
bb7b844bec
CALLSEQ_* produces chain even if that's not needed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29603 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-11 09:03:33 +00:00
Evan Cheng
311ace0391
Convert more calls of getNode() that takes a vector to pass in the start of an array.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29601 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-11 07:35:45 +00:00
Rafael Espindola
a1ab92d8b7
correctly set LocalAreaOffset of TargetFrameInfo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29589 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-09 17:37:45 +00:00
Rafael Espindola
7a53bd0890
fix the spill code
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29583 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-09 16:41:12 +00:00
Rafael Espindola
2c8cdc6c1a
fix the loading of the link register in emitepilogue
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29580 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-09 13:15:47 +00:00
Rafael Espindola
46adf8119d
change the addressing mode of the str instruction to reg+imm
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29571 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-08 20:35:03 +00:00
Rafael Espindola
1a00946817
initial support for variable number of arguments
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29567 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-08 13:02:29 +00:00
Chris Lattner
bd564bfc63
Start eliminating temporary vectors used to create DAG nodes. Instead, pass
...
in the start of an array and a count of operands where applicable. In many
cases, the number of operands is known, so this static array can be allocated
on the stack, avoiding the heap. In many other cases, a SmallVector can be
used, which has the same benefit in the common cases.
I updated a lot of code calling getNode that takes a vector, but ran out of
time. The rest of the code should be updated, and these methods should be
removed.
We should also do the same thing to eliminate the methods that take a
vector of MVT::ValueTypes.
It would be extra nice to convert the dagiselemitter to avoid creating vectors
for operands when calling getTargetNode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29566 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-08 02:23:42 +00:00
Evan Cheng
f4b4c416d3
Eliminate reachability matrix. It has to be calculated before any instruction
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selection is done. That's rather expensive especially in situations where it
isn't really needed.
Move back to a searching the predecessors, but make use of topological order
to trim the search space.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29559 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-08 00:31:00 +00:00
Evan Cheng
2ef88a09b7
Match tablegen isel changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29549 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-07 22:28:20 +00:00
Evan Cheng
e46e1a5da7
Make XMM, FP register dwarf register numbers consistent with gcc.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29543 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-07 21:02:39 +00:00
Rafael Espindola
341b864c8d
use a 'register pressure reducing' scheduler
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make sure only one move is used in a hello world
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29520 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-04 12:48:42 +00:00
Rafael Espindola
6312da0fc7
Bug fix: always generate a RET_FLAG in LowerRET
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fixes ret_null.ll and call.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29519 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-03 22:50:11 +00:00
Chris Lattner
fb1fcf08c9
remove some more dead sparcv9 support stuff
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29506 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-03 18:55:44 +00:00
Chris Lattner
7a2144b060
remove a dead proto
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29505 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-03 18:51:04 +00:00
Jim Laskey
6b59a36564
Get darwin intel debugging up and running.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29504 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-03 17:27:09 +00:00
Rafael Espindola
f4fda80403
add and use ARMISD::RET_FLAG
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29499 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-03 17:02:20 +00:00
Evan Cheng
4876dc5b13
Reflect change to AssignTopologicalOrder().
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29480 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-02 22:01:32 +00:00
Evan Cheng
686c4a18f1
Use of vector<bool> causes some horrendous compile time regression (2x)!
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Looks like libstdc++ implementation does not scale very well. Switch back
to using directly managed arrays.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29469 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-02 09:18:33 +00:00
Nate Begeman
83a6d49102
Update the readme to remove duplicate information and clarify the loop
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problem.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29468 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-02 05:31:20 +00:00
Nate Begeman
8f74680c78
Disable LSR at -fast
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29467 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-02 05:29:40 +00:00
Rafael Espindola
1ed3af11b5
start comments with #
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move the constant pool to .text
correctly print loads of labels
mark R0, R1, R2 and R3 as caller save
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29451 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-01 18:53:10 +00:00
Rafael Espindola
06c1e7eacb
implement LowerConstantPool and LowerGlobalAddress
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29433 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-01 12:58:43 +00:00
Evan Cheng
db3cc3d7d6
Factor topological order code to SelectionDAG. Clean up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29430 91177308-0d34-0410-b5e6-96231b3b80d8
2006-08-01 08:17:22 +00:00
Chris Lattner
f76d180c95
Fix PR850 and CodeGen/X86/2006-07-31-SingleRegClass.ll.
...
The CFE refers to all single-register constraints (like "A") by their 16-bit
name, even though the 8 or 32-bit version of the register may be needed.
The X86 backend should realize what is going on and redecode the name back
to its proper form.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29420 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-31 23:26:50 +00:00
Rafael Espindola
6d581e8d15
handle GlobalValue::InternalLinkage in doFinalization
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29417 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-31 20:38:13 +00:00
Evan Cheng
ca3202893c
Remove a duplicate pattern.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29414 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-31 18:43:10 +00:00
Evan Cheng
043eb829cc
Remove a duplicate pattern/
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29413 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-31 18:42:49 +00:00
Chris Lattner
dacbe7b171
Make functions with an "asm" name propagate that asm name into the cbe.c file.
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This fixes link errors on programs with these on targets with prefixes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29390 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-28 20:58:47 +00:00
Chris Lattner
0d72a20630
Fix some ppc64 issues with vector code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29384 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-28 16:45:47 +00:00
Evan Cheng
37e1803a66
Can't spell.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29383 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-28 06:33:41 +00:00
Evan Cheng
ba27731f35
Some clean up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29382 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-28 06:05:06 +00:00
Evan Cheng
f2dfafcbc1
Rename IsFoldableBy to CanBeFoldedleBy
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29376 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-28 01:03:48 +00:00
Evan Cheng
2584d93acf
Node selected into address mode cannot be folded.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29374 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-28 00:49:31 +00:00
Evan Cheng
2641cad180
Remove InFlightSet hack. No longer needed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29373 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-28 00:47:19 +00:00
Evan Cheng
63ce5682e2
Another duh. Determine topological order before any target node is added.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29371 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-28 00:10:59 +00:00
Evan Cheng
0e2c36fcc2
Brain cramp..
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29370 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-27 23:35:40 +00:00
Evan Cheng
b3c334674d
Allocating too large an array for ReachibilityMatrix.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29367 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-27 22:35:40 +00:00
Evan Cheng
5fa5de80e2
Calculate the portion of reachbility matrix on demand.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29366 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-27 22:10:00 +00:00
Evan Cheng
8cbc93aadb
isNonImmUse is replaced by IsFoldableBy
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29365 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-27 21:19:10 +00:00
Evan Cheng
f141cc46fa
Resolve BB references with relocation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29351 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-27 18:21:10 +00:00
Evan Cheng
7e6e441394
synchronizeICache removeed from TargetJITInfo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29348 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-27 17:33:48 +00:00
Evan Cheng
a8df1b4296
Use reachbility information to determine whether a node can be folded into another during isel.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29346 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-27 16:44:36 +00:00
Rafael Espindola
b01c4bbb45
emit global constants
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29344 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-27 11:38:51 +00:00
Evan Cheng
33e9ad96c8
Remove NodeDepth
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29338 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-27 06:40:15 +00:00
Jim Laskey
ea348585c8
Use the predicate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29322 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-27 02:05:13 +00:00
Nate Begeman
2f1ae88445
Support jump tables when in PIC relocation model
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29318 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-27 01:13:04 +00:00
Jim Laskey
30ffe1b776
Prevent creation of MachineDebugInfo for intel unless it is darwin. RC842.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29317 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-27 01:12:23 +00:00
Evan Cheng
ae1d33f82d
New entry.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29310 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-26 21:49:52 +00:00
Chris Lattner
35d86fef1f
Rename RelocModel::PIC to PIC_, to avoid conflicts with -DPIC.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29307 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-26 21:12:04 +00:00
Evan Cheng
55fc28076f
- Refactor the code that resolve basic block references to a TargetJITInfo
...
method.
- Added synchronizeICache() to TargetJITInfo. It is called after each block
of code is emitted to flush the icache. This ensures correct execution
on targets that have separate dcache and icache.
- Added PPC / Mac OS X specific code to do icache flushing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29276 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-25 20:40:54 +00:00
Evan Cheng
55371739de
Can't commute shufps. The high / low parts elements come from different vectors.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29275 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-25 20:25:40 +00:00
Rafael Espindola
fac00a93a9
implement function calling of functions with up to 4 arguments
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29274 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-25 20:17:20 +00:00
Evan Cheng
46cd65dfa6
Done.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29262 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-21 23:07:23 +00:00
Rafael Espindola
44819cb20a
implemented sub
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correctly update the stack pointer in the prologue and epilogue
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29244 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-21 12:26:16 +00:00
Evan Cheng
625518002d
This opt is now handled in DAG combine.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29243 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-21 08:26:46 +00:00
Evan Cheng
1e1a88e8cc
A splat of a vector constant of all zero or all one is the vector constant.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29234 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-20 23:09:47 +00:00
Evan Cheng
3c62934268
Missing a space.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29233 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-20 22:52:28 +00:00
Evan Cheng
cbac2fa23a
Clean up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29228 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-20 21:37:39 +00:00
Evan Cheng
abb4d7829f
New entry.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29215 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-19 21:29:30 +00:00
Jim Laskey
c06fe8a5ac
Do once flag never set to true.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29214 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-19 19:33:08 +00:00
Jim Laskey
613f1f83fd
Tidy up a few things.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29213 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-19 19:32:06 +00:00
Jim Laskey
f19807cecb
Reduce size of routine. Shrinks .o by 37%.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29210 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-19 17:53:32 +00:00
Chris Lattner
2a785500e0
bswapped load/store instructions are only availble in indexed addressing form.
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As such, use xoaddr (indexed only), not xaddr for address selection.
This fixes CodeGen/PowerPC/2006-07-19-stwbrx-crash.ll, a crash compiling lencod.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29208 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-19 17:15:36 +00:00
Jim Laskey
e29c2f5ca0
Bug#834 ICE (crash in code generator?) when building PCH .
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Missing Darwin check in Intel ATT ASM printer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29204 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-19 11:54:50 +00:00
Evan Cheng
1c96953d2d
Misc. new entry.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29202 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-19 06:06:24 +00:00
Evan Cheng
1693e489e6
INC / DEC instructions have shorter code size than ADD32ri8, etc.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29194 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-19 00:27:29 +00:00
Evan Cheng
e6f32034db
Add code size to target instruction use it as the 3rd isel sorting tie-breaker.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29193 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-19 00:24:41 +00:00
Rafael Espindola
355746359e
initial prologue and epilogue implementation. Need to define add and sub before finishing it :-)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29175 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-18 17:00:30 +00:00
Chris Lattner
303c695529
Make the implicit def instructions look like other instrs.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29174 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-18 16:33:26 +00:00
Rafael Espindola
84b19be6ab
skeleton of a lowerCall implementation for ARM
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29159 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-16 01:02:57 +00:00
Chris Lattner
ba4733d901
Remove what little AIX support we have. It has never been tested and isn't
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complete.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29156 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-15 01:24:23 +00:00
Chris Lattner
a3b5939caa
Add an out-of-line virtual method for X86DwarfWriter to give it a home.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29153 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-14 23:05:05 +00:00
Chris Lattner
518f9c7ad0
Add missing PPC64 extload/truncstores
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29140 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-14 04:42:02 +00:00
Chris Lattner
1eeedaea59
Add a note
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29139 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-14 04:07:29 +00:00
Chris Lattner
a606b70cf5
Another fix in the rotate encodings, needed when the first two operands are not
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the same.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29136 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-13 21:52:41 +00:00
Chris Lattner
45c04fc676
Print negative immediates as negative values instead of large constants
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when using the immshifted addressing mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29130 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-12 23:24:02 +00:00
Chris Lattner
b2c0650ad3
Fix encoding of rotates, such as rldicl
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29128 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-12 22:08:13 +00:00
Chris Lattner
3bc8a765a9
Implement PPC64 relocations types
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29125 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-12 21:23:20 +00:00
Chris Lattner
3d6721a4a1
An overaggressive #ifdef allows a function to fall off the bottom of the
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function instead of returning a value. This sometimes allowed the ppc32 jit
to be used in 64-bit mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29123 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-12 20:42:10 +00:00
Chris Lattner
6d3465793f
Add information preventing several register class constraints from working.
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This implements PR828 and CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29118 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-12 16:59:49 +00:00
Chris Lattner
be6a039ad4
The PPC64 JIT needs register numbers to encode instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29114 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-11 20:53:55 +00:00
Evan Cheng
f7eb5d0b02
Emit inc / dec of registers as one byte instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29110 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-11 19:49:49 +00:00
Jim Laskey
16d42c6ac6
It was pointed out that DEBUG() is only available with -debug.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29106 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-11 18:25:13 +00:00
Jim Laskey
e37fe9b3a1
Ensure that dump calls that are associated with asserts are removed from
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non-debug build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29105 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-11 17:58:07 +00:00
Rafael Espindola
a4e64359aa
add the memri memory operand
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this makes it possible for ldr instructions with non-zero immediate
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29103 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-11 11:36:48 +00:00
Chris Lattner
f4dff84c86
Implement the inline asm 'A' constraint. This implements PR825 and
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CodeGen/X86/2006-07-10-InlineAsmAConstraint.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29101 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-11 02:54:03 +00:00
Chris Lattner
804e067042
In 64-bit mode, 64-bit GPRs are callee saved, not 32-bit ones.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29096 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-11 00:48:23 +00:00
Evan Cheng
20adf47dbc
New entry.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29091 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-10 21:42:16 +00:00
Evan Cheng
1e60c098cc
Fixed stack objects do not specify alignments, but their offsets are known.
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Use that information when doing the transformation to merge multiple loads
into a 128-bit load.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29090 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-10 21:37:44 +00:00
Chris Lattner
d998938459
Implement Regression/CodeGen/PowerPC/bswap-load-store.ll by folding bswaps
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into i16/i32 load/stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29089 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-10 20:56:58 +00:00
Chris Lattner
5c5f4ca6f1
Mark internal function static
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29085 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-10 19:53:12 +00:00
Rafael Espindola
aefe14299a
create the raddr addressing mode that matches any register and the frame index
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use raddr for the ldr instruction. This removes a dummy mov from the assembly output
remove SelectFrameIndex
remove isLoadFromStackSlot
remove isStoreToStackSlot
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29079 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-10 01:41:35 +00:00
Evan Cheng
206ee9d86c
X86 target specific DAG combine: turn build_vector (load x), (load x+4),
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(load x+8), (load x+12), <0, 1, 2, 3> to a single 128-bit load (aligned and
unaligned).
e.g.
__m128 test(float a, float b, float c, float d) {
return _mm_set_ps(d, c, b, a);
}
_test:
movups 4(%esp), %xmm0
ret
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29042 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-07 08:33:52 +00:00
Chris Lattner
90ac1c0775
Undisable ppc64 jit
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29011 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-06 17:10:42 +00:00
Evan Cheng
152ed05353
Added option -code-model to set code model (only used in 64-bit) mode. Valid
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values include small, kernel, medium, large, and default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29009 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-06 01:53:36 +00:00