Commit Graph

39812 Commits

Author SHA1 Message Date
Duncan Sands
24080a9878 The accumulator tail recursion transform claims to work for any associative
operation, but the way it's implemented requires the operation to also be
commutative.  So add a check for commutativity (and tweak the corresponding
comments).  This makes no difference in practice since every associative
LLVM instruction is also commutative!  Here's an example to show the need
for commutativity: the accum_recursion.ll testcase calculates the factorial
function.  Before the transformation the result of a call is
  ((((1*1)*2)*3)...)*x
while afterwards it is
  (((1*x)*(x-1))...*2)*1
which clearly requires both associativity and commutativity of * to be equal
to the original.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108056 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-10 20:31:42 +00:00
Jakob Stoklund Olesen
92c1f72c54 Emit COPY instructions instead of using copyRegToReg in InstrEmitter,
ScheduleDAGEmit, TwoAddressLowering, and PHIElimination.

This switches the bulk of register copies to using COPY, but many less used
copyRegToReg calls remain.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108050 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-10 19:08:25 +00:00
Jakob Stoklund Olesen
2b336bc4fe Don't emit st(0)/st(1) copies as FpMOV instructions. Use FpSET_ST? instead.
Based on a patch by Rafael Espíndola.

Attempt to make the FpSET_ST1 hack more robust, but we are still relying on
FpSET_ST0 preceeding it. This is only for supporting really weird x87 inline
asm.

We support:

  FpSET_ST0
  INLINEASM

  FpSET_ST0
  FpSET_ST1
  INLINEASM

with and without kills on the arguments. We don't support:

  FpSET_ST1
  FpSET_ST0
  INLINEASM

nor

  FpSET_ST1
  INLINEASM

Just Don't Do It!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108047 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-10 17:42:34 +00:00
Dan Gohman
3cd26a2909 Insert IMPLICIT_DEF instructions at the current insert position, not
at the end of the block.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108045 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-10 13:55:45 +00:00
Chandler Carruth
68eec39bca Add parentheses yet again to satisfy GCC's warnings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108043 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-10 12:06:22 +00:00
Dan Gohman
84023e0fbe Reapply bottom-up fast-isel, with several fixes for x86-32:
- Check getBytesToPopOnReturn().
 - Eschew ST0 and ST1 for return values.
 - Fix the PIC base register initialization so that it doesn't ever
   fail to end up the top of the entry block.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108039 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-10 09:00:22 +00:00
Jakob Stoklund Olesen
d737fcafc4 An x86 function returns a floating point value in st(0), and we must make sure
it is popped, even if it is ununsed. A CopyFromReg node is too weak to represent
the required sideeffect, so insert an FpGET_ST0 instruction directly instead.

This will matter when CopyFromReg gets lowered to a generic COPY instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108037 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-10 04:04:25 +00:00
Devang Patel
7a029b6d7e Update DBG_VALUE to refer appropriate stack slot in case of a spill.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108023 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 21:48:31 +00:00
Bruno Cardoso Lopes
58dbf3784d Declare YMM subregisters in the right way! Thanks Jakob
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108022 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 21:46:19 +00:00
Bruno Cardoso Lopes
d52e78efac Add AVX 256-bit packed MOVNT variants
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108021 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 21:42:42 +00:00
Jakob Stoklund Olesen
61905c8ab3 Remember the *_TC opcodes for load/store
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108020 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 21:27:55 +00:00
Bruno Cardoso Lopes
2bfb8f6ef8 Add AVX 256-bit unpack and interleave
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108017 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 21:20:35 +00:00
Jakob Stoklund Olesen
8ea324093c Fix small bug in isMoveInstr -> COPY translation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108013 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 20:55:49 +00:00
Jakob Stoklund Olesen
1f32340d95 Automatically fold COPY instructions into stack load/store.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108012 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 20:43:13 +00:00
Jakob Stoklund Olesen
9c50e8b890 Fix a few tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108011 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 20:43:09 +00:00
Jakob Stoklund Olesen
90fc0f4443 Remat uncoalescable COPY instrs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108010 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 20:43:05 +00:00
Jim Grosbach
6c7d3a16b3 In the presence of variable sized objects, allocate an emergency spill slot.
rdar://8131327

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108008 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 20:27:06 +00:00
Bill Wendling
8886c495a3 Clarify what mysterious check means.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108005 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 19:44:12 +00:00
Dan Gohman
aa7426070d Fix MachineLICM to actually visit inner loops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108001 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 18:49:45 +00:00
Bruno Cardoso Lopes
e86b01c153 Start the support for AVX instructions with 256-bit %ymm registers. A couple of
notes:
- The instructions are being added with dummy placeholder patterns using some 256
  specifiers, this is not meant to work now, but since there are some multiclasses
  generic enough to accept them,  when we go for codegen, the stuff will be already
  there.
- Add VEX encoding bits to support YMM
- Add MOVUPS and MOVAPS in the first round
- Use "Y" as suffix for those Instructions: MOVUPSYrr, ...
- All AVX instructions in X86InstrSSE.td will move soon to a new X86InstrAVX
  file.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107996 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 18:27:43 +00:00
Jakob Stoklund Olesen
e05442d508 Change TII::foldMemoryOperand API to require the machine instruction to be
inserted in a MBB, and return an already inserted MI.

This target API change is necessary to allow foldMemoryOperand to call
storeToStackSlot and loadFromStackSlot when folding a COPY to a stack slot
reference in a target independent way.

The foldMemoryOperandImpl hook is going to change in the same way, but I'll wait
until COPY folding is actually implemented. Most targets only fold copies and
won't need to specialize this hook at all.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107991 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 17:29:08 +00:00
Gabor Greif
e664267ae7 cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107990 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 16:51:20 +00:00
Gabor Greif
19e5ada58a remove useless cast and fix typos in comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107989 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 16:42:04 +00:00
Gabor Greif
f64f9cf7ec cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107988 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 16:39:02 +00:00
Bob Wilson
02266e29f9 --- Reverse-merging r107947 into '.':
U    utils/TableGen/FastISelEmitter.cpp
--- Reverse-merging r107943 into '.':
U    test/CodeGen/X86/fast-isel.ll
U    test/CodeGen/X86/fast-isel-loads.ll
U    include/llvm/Target/TargetLowering.h
U    include/llvm/Support/PassNameParser.h
U    include/llvm/CodeGen/FunctionLoweringInfo.h
U    include/llvm/CodeGen/CallingConvLower.h
U    include/llvm/CodeGen/FastISel.h
U    include/llvm/CodeGen/SelectionDAGISel.h
U    lib/CodeGen/LLVMTargetMachine.cpp
U    lib/CodeGen/CallingConvLower.cpp
U    lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
U    lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
U    lib/CodeGen/SelectionDAG/FastISel.cpp
U    lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
U    lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
U    lib/CodeGen/SelectionDAG/InstrEmitter.cpp
U    lib/CodeGen/SelectionDAG/TargetLowering.cpp
U    lib/Target/XCore/XCoreISelLowering.cpp
U    lib/Target/XCore/XCoreISelLowering.h
U    lib/Target/X86/X86ISelLowering.cpp
U    lib/Target/X86/X86FastISel.cpp
U    lib/Target/X86/X86ISelLowering.h


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107987 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 16:37:18 +00:00
Gabor Greif
9085fcab82 cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107984 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 16:31:08 +00:00
Gabor Greif
bf2eefdb0d cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107983 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 16:26:41 +00:00
Gabor Greif
8ba992ad52 cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107982 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 16:22:36 +00:00
Gabor Greif
e80ba4f884 cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107981 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 16:17:52 +00:00
Gabor Greif
03f09a3e32 cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107980 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 16:08:33 +00:00
Gabor Greif
c654d1b8c1 cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107979 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 16:01:21 +00:00
Gabor Greif
d7cc5215f1 cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107978 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 15:53:42 +00:00
Gabor Greif
1f2c0c9ead cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107977 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 15:52:36 +00:00
Gabor Greif
7656018c22 cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107976 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 15:40:10 +00:00
Gabor Greif
7556cf541b cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107975 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 15:25:42 +00:00
Gabor Greif
5896935423 cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107974 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 15:25:09 +00:00
Gabor Greif
fc36c0f21f cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107972 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 15:01:36 +00:00
Gabor Greif
1d3ae029c4 cache result of operator* (found by inspection)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107971 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 14:48:08 +00:00
Gabor Greif
0814985887 cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107969 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 14:36:49 +00:00
Gabor Greif
a29742df5f cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107968 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 14:29:14 +00:00
Gabor Greif
5891ac8be8 cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107967 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 14:28:41 +00:00
Gabor Greif
5417a03b55 cache result of operator*
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107966 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 14:18:23 +00:00
Gabor Greif
9672414017 cache operator*'s result (in multiple functions)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107965 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 14:02:13 +00:00
Gabor Greif
517e124d53 do not repeatedly dereference use_iterator
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107963 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 13:17:13 +00:00
Gabor Greif
b654435712 do not repeatedly dereference use_iterator
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107962 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 12:23:50 +00:00
Jakob Stoklund Olesen
8154f96f44 Avoid creating %physreg:subidx operands in SimpleRegisterCoalescing::RemoveCopyByCommutingDef.
This fixes PR7602.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107957 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 05:56:21 +00:00
Jakob Stoklund Olesen
846a31881f Deal with a few remaining spots that assume physical registers have live intervals.
This fixes PR7601.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107955 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 04:35:38 +00:00
Bruno Cardoso Lopes
be95c15903 Merge VEX enums with other x86 enum forms. Also fix all checks of which VEX
fields to use. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107952 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 01:56:45 +00:00
Jakob Stoklund Olesen
665eb12466 Fix broken isCopy handling in TrimLiveIntervalToLastUse.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107950 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 01:27:21 +00:00
Jakob Stoklund Olesen
1769cccfc8 Handle COPY in VirtRegRewriter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107949 91177308-0d34-0410-b5e6-96231b3b80d8
2010-07-09 01:27:19 +00:00