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3 Commits

Author SHA1 Message Date
Tom Stellard 9a256300f8 R600/SI: Emit config values in register value pairs. 
Instead of emitting config values in a predefined order, the code
emitter will now emit a 32-bit register index followed by the 32-bit
config value.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179546 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-15 17:51:35 +00:00
Tom Stellard bf1efe6421 R600/SI: Emit configuration value in the .AMDGPU.config ELF section 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179545 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-15 17:51:30 +00:00
Tom Stellard 3a63bf27c5 R600: Emit ELF formatted code rather than raw ISA. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179544 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-04-15 17:51:21 +00:00