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4 Commits

Author SHA1 Message Date
Eric Christopher
75a8b23e10 [x86] Rename In32BitMode predicate to Not64BitMode 
That's what it actually means, and with 16-bit support it's going to be
a little more relevant since in a few corner cases we may actually want
to distinguish between 16-bit and 32-bit mode (for example the bare 'push'
aliases to pushw/pushl etc.)

Patch by David Woodhouse

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197768 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-12-20 02:04:49 +00:00
Craig Topper
418eb3df74 Changed register names (and pointer keywords) to be lower case when using Intel X86 assembler syntax. 
Patch by Richard Mitton.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187476 91177308-0d34-0410-b5e6-96231b3b80d8
 2013-07-31 02:47:52 +00:00
Jia Liu
31d157ae1a Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150878 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-18 12:03:15 +00:00
Craig Topper
a771330366 Add X86InstrSVM.td that I forgot to add in r150873. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150874 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-18 08:34:12 +00:00