6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-12-15 20:29:48 +00:00
Code Issues Projects Releases Wiki Activity
99,869 Commits 39 Branches 0 Tags 277 MiB
ea120b6bb5
Commit Graph

2 Commits

Author SHA1 Message Date
NAKAMURA Takumi
34cb54bea8 llvm/test/CodeGen/X86/fold-vex.ll: Add explicit triple. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171029 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-24 11:14:06 +00:00
Nadav Rotem
ace0c2fad7 Some x86 instructions can load/store one of the operands to memory. On SSE, this memory needs to be aligned. 
When these instructions are encoded in VEX (on AVX) there is no such requirement. This changes the folding
tables and removes the alignment restrictions from VEX-encoded instructions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171024 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-12-24 09:40:33 +00:00